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authorLinus Torvalds <torvalds@linux-foundation.org>2010-08-03 17:31:24 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2010-08-03 17:31:24 -0400
commitbe82ae0238b0453afcf4a76f0512b7dde34ba500 (patch)
treeaaa3f5f11fd51fd73365ee1a2164aad9a03de060 /arch/arm/mach-ux500
parent4b4fd27c0b5ec638a1f06ced9226fd95229dbbf0 (diff)
parent7b70c4275f28702b76b273c8534c38f8313812e9 (diff)
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (291 commits) ARM: AMBA: Add pclk support to AMBA bus infrastructure ARM: 6278/2: fix regression in RealView after the introduction of pclk ARM: 6277/1: mach-shmobile: Allow users to select HZ, default to 128 ARM: 6276/1: mach-shmobile: remove duplicate NR_IRQS_LEGACY ARM: 6246/1: mmci: support larger MMCIDATALENGTH register ARM: 6245/1: mmci: enable hardware flow control on Ux500 variants ARM: 6244/1: mmci: add variant data and default MCICLOCK support ARM: 6243/1: mmci: pass power_mode to the translate_vdd callback ARM: 6274/1: add global control registers definition header file for nuc900 mx2_camera: fix type of dma buffer virtual address pointer mx2_camera: Add soc_camera support for i.MX25/i.MX27 arm/imx/gpio: add spinlock protection ARM: Add support for the LPC32XX arch ARM: LPC32XX: Arch config menu supoport and makefiles ARM: LPC32XX: Phytec 3250 platform support ARM: LPC32XX: Misc support functions ARM: LPC32XX: Serial support code ARM: LPC32XX: System suspend support ARM: LPC32XX: GPIO, timer, and IRQ drivers ARM: LPC32XX: Clock driver ...
Diffstat (limited to 'arch/arm/mach-ux500')
-rw-r--r--arch/arm/mach-ux500/board-mop500.c36
-rw-r--r--arch/arm/mach-ux500/clock.c4
-rw-r--r--arch/arm/mach-ux500/devices-db8500.c14
-rw-r--r--arch/arm/mach-ux500/include/mach/irqs-board-mop500.h23
-rw-r--r--arch/arm/mach-ux500/include/mach/irqs-db5500.h85
-rw-r--r--arch/arm/mach-ux500/include/mach/irqs-db8500.h96
-rw-r--r--arch/arm/mach-ux500/include/mach/irqs.h22
-rw-r--r--arch/arm/mach-ux500/pins-db8500.h742
8 files changed, 1006 insertions, 16 deletions
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index bb8d7b771817..0e8fd135a57d 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -13,19 +13,42 @@
13#include <linux/interrupt.h> 13#include <linux/interrupt.h>
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/io.h> 15#include <linux/io.h>
16#include <linux/gpio.h>
16#include <linux/amba/bus.h> 17#include <linux/amba/bus.h>
17#include <linux/amba/pl022.h> 18#include <linux/amba/pl022.h>
18#include <linux/spi/spi.h> 19#include <linux/spi/spi.h>
20#include <linux/mfd/ab8500.h>
19 21
20#include <asm/mach-types.h> 22#include <asm/mach-types.h>
21#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
22 24
25#include <plat/pincfg.h>
23#include <plat/i2c.h> 26#include <plat/i2c.h>
24 27
25#include <mach/hardware.h> 28#include <mach/hardware.h>
26#include <mach/setup.h> 29#include <mach/setup.h>
27#include <mach/devices.h> 30#include <mach/devices.h>
28 31
32#include "pins-db8500.h"
33
34static pin_cfg_t mop500_pins[] = {
35 /* SSP0 */
36 GPIO143_SSP0_CLK,
37 GPIO144_SSP0_FRM,
38 GPIO145_SSP0_RXD,
39 GPIO146_SSP0_TXD,
40
41 /* I2C */
42 GPIO147_I2C0_SCL,
43 GPIO148_I2C0_SDA,
44 GPIO16_I2C1_SCL,
45 GPIO17_I2C1_SDA,
46 GPIO10_I2C2_SDA,
47 GPIO11_I2C2_SCL,
48 GPIO229_I2C3_SDA,
49 GPIO230_I2C3_SCL,
50};
51
29static void ab4500_spi_cs_control(u32 command) 52static void ab4500_spi_cs_control(u32 command)
30{ 53{
31 /* set the FRM signal, which is CS - TODO */ 54 /* set the FRM signal, which is CS - TODO */
@@ -48,15 +71,20 @@ struct pl022_config_chip ab4500_chip_info = {
48 .cs_control = ab4500_spi_cs_control, 71 .cs_control = ab4500_spi_cs_control,
49}; 72};
50 73
74static struct ab8500_platform_data ab8500_platdata = {
75 .irq_base = MOP500_AB8500_IRQ_BASE,
76};
77
51static struct spi_board_info u8500_spi_devices[] = { 78static struct spi_board_info u8500_spi_devices[] = {
52 { 79 {
53 .modalias = "ab8500", 80 .modalias = "ab8500",
54 .controller_data = &ab4500_chip_info, 81 .controller_data = &ab4500_chip_info,
82 .platform_data = &ab8500_platdata,
55 .max_speed_hz = 12000000, 83 .max_speed_hz = 12000000,
56 .bus_num = 0, 84 .bus_num = 0,
57 .chip_select = 0, 85 .chip_select = 0,
58 .mode = SPI_MODE_0, 86 .mode = SPI_MODE_0,
59 .irq = IRQ_AB4500, 87 .irq = IRQ_DB8500_AB8500,
60 }, 88 },
61}; 89};
62 90
@@ -118,6 +146,10 @@ static void __init u8500_init_machine(void)
118{ 146{
119 int i; 147 int i;
120 148
149 u8500_init_devices();
150
151 nmk_config_pins(mop500_pins, ARRAY_SIZE(mop500_pins));
152
121 u8500_i2c0_device.dev.platform_data = &u8500_i2c0_data; 153 u8500_i2c0_device.dev.platform_data = &u8500_i2c0_data;
122 ux500_i2c1_device.dev.platform_data = &u8500_i2c1_data; 154 ux500_i2c1_device.dev.platform_data = &u8500_i2c1_data;
123 ux500_i2c2_device.dev.platform_data = &u8500_i2c2_data; 155 ux500_i2c2_device.dev.platform_data = &u8500_i2c2_data;
@@ -133,8 +165,6 @@ static void __init u8500_init_machine(void)
133 165
134 spi_register_board_info(u8500_spi_devices, 166 spi_register_board_info(u8500_spi_devices,
135 ARRAY_SIZE(u8500_spi_devices)); 167 ARRAY_SIZE(u8500_spi_devices));
136
137 u8500_init_devices();
138} 168}
139 169
140MACHINE_START(U8500, "ST-Ericsson MOP500 platform") 170MACHINE_START(U8500, "ST-Ericsson MOP500 platform")
diff --git a/arch/arm/mach-ux500/clock.c b/arch/arm/mach-ux500/clock.c
index 0a1318fc8e2b..d8ab7f184fe4 100644
--- a/arch/arm/mach-ux500/clock.c
+++ b/arch/arm/mach-ux500/clock.c
@@ -453,7 +453,11 @@ static DEFINE_PRCC_CLK_CUSTOM(7, mtu0_ed, 2, -1, NULL, clk_mtu_get_rate, 0);
453static DEFINE_PRCC_CLK(7, wdg_ed, 1, -1, NULL); 453static DEFINE_PRCC_CLK(7, wdg_ed, 1, -1, NULL);
454static DEFINE_PRCC_CLK(7, cfgreg_ed, 0, -1, NULL); 454static DEFINE_PRCC_CLK(7, cfgreg_ed, 0, -1, NULL);
455 455
456static struct clk clk_dummy_apb_pclk;
457
456static struct clk_lookup u8500_common_clks[] = { 458static struct clk_lookup u8500_common_clks[] = {
459 CLK(dummy_apb_pclk, NULL, "apb_pclk"),
460
457 /* Peripheral Cluster #1 */ 461 /* Peripheral Cluster #1 */
458 CLK(gpio0, "gpio.0", NULL), 462 CLK(gpio0, "gpio.0", NULL),
459 CLK(gpio0, "gpio.1", NULL), 463 CLK(gpio0, "gpio.1", NULL),
diff --git a/arch/arm/mach-ux500/devices-db8500.c b/arch/arm/mach-ux500/devices-db8500.c
index 822903421943..654fca944e65 100644
--- a/arch/arm/mach-ux500/devices-db8500.c
+++ b/arch/arm/mach-ux500/devices-db8500.c
@@ -65,7 +65,7 @@ struct amba_device u8500_ssp0_device = {
65 .end = U8500_SSP0_BASE + SZ_4K - 1, 65 .end = U8500_SSP0_BASE + SZ_4K - 1,
66 .flags = IORESOURCE_MEM, 66 .flags = IORESOURCE_MEM,
67 }, 67 },
68 .irq = {IRQ_SSP0, NO_IRQ }, 68 .irq = {IRQ_DB8500_SSP0, NO_IRQ },
69 /* ST-Ericsson modified id */ 69 /* ST-Ericsson modified id */
70 .periphid = SSP_PER_ID, 70 .periphid = SSP_PER_ID,
71}; 71};
@@ -77,8 +77,8 @@ static struct resource u8500_i2c0_resources[] = {
77 .flags = IORESOURCE_MEM, 77 .flags = IORESOURCE_MEM,
78 }, 78 },
79 [1] = { 79 [1] = {
80 .start = IRQ_I2C0, 80 .start = IRQ_DB8500_I2C0,
81 .end = IRQ_I2C0, 81 .end = IRQ_DB8500_I2C0,
82 .flags = IORESOURCE_IRQ, 82 .flags = IORESOURCE_IRQ,
83 } 83 }
84}; 84};
@@ -97,8 +97,8 @@ static struct resource u8500_i2c4_resources[] = {
97 .flags = IORESOURCE_MEM, 97 .flags = IORESOURCE_MEM,
98 }, 98 },
99 [1] = { 99 [1] = {
100 .start = IRQ_I2C4, 100 .start = IRQ_DB8500_I2C4,
101 .end = IRQ_I2C4, 101 .end = IRQ_DB8500_I2C4,
102 .flags = IORESOURCE_IRQ, 102 .flags = IORESOURCE_IRQ,
103 } 103 }
104}; 104};
@@ -130,8 +130,8 @@ static struct resource dma40_resources[] = {
130 .name = "lcla", 130 .name = "lcla",
131 }, 131 },
132 [3] = { 132 [3] = {
133 .start = IRQ_DMA, 133 .start = IRQ_DB8500_DMA,
134 .end = IRQ_DMA, 134 .end = IRQ_DB8500_DMA,
135 .flags = IORESOURCE_IRQ} 135 .flags = IORESOURCE_IRQ}
136}; 136};
137 137
diff --git a/arch/arm/mach-ux500/include/mach/irqs-board-mop500.h b/arch/arm/mach-ux500/include/mach/irqs-board-mop500.h
new file mode 100644
index 000000000000..cca4f705601e
--- /dev/null
+++ b/arch/arm/mach-ux500/include/mach/irqs-board-mop500.h
@@ -0,0 +1,23 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * Author: Rabin Vincent <rabin.vincent@stericsson.com>
5 * License terms: GNU General Public License (GPL) version 2
6 */
7
8#ifndef __MACH_IRQS_BOARD_MOP500_H
9#define __MACH_IRQS_BOARD_MOP500_H
10
11#define AB8500_NR_IRQS 104
12
13#define MOP500_AB8500_IRQ_BASE IRQ_BOARD_START
14#define MOP500_AB8500_IRQ_END (MOP500_AB8500_IRQ_BASE \
15 + AB8500_NR_IRQS)
16#define MOP500_IRQ_END MOP500_AB8500_IRQ_END
17
18#if MOP500_IRQ_END > IRQ_BOARD_END
19#undef IRQ_BOARD_END
20#define IRQ_BOARD_END MOP500_IRQ_END
21#endif
22
23#endif
diff --git a/arch/arm/mach-ux500/include/mach/irqs-db5500.h b/arch/arm/mach-ux500/include/mach/irqs-db5500.h
new file mode 100644
index 000000000000..6fbfe5e2065a
--- /dev/null
+++ b/arch/arm/mach-ux500/include/mach/irqs-db5500.h
@@ -0,0 +1,85 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * Author: Rabin Vincent <rabin.vincent@stericsson.com>
5 * License terms: GNU General Public License (GPL) version 2
6 */
7
8#ifndef __MACH_IRQS_DB5500_H
9#define __MACH_IRQS_DB5500_H
10
11#define IRQ_DB5500_MTU0 (IRQ_SHPI_START + 4)
12#define IRQ_DB5500_SPI2 (IRQ_SHPI_START + 6)
13#define IRQ_DB5500_PMU0 (IRQ_SHPI_START + 7)
14#define IRQ_DB5500_SPI0 (IRQ_SHPI_START + 8)
15#define IRQ_DB5500_RTT (IRQ_SHPI_START + 9)
16#define IRQ_DB5500_PKA (IRQ_SHPI_START + 10)
17#define IRQ_DB5500_UART0 (IRQ_SHPI_START + 11)
18#define IRQ_DB5500_I2C3 (IRQ_SHPI_START + 12)
19#define IRQ_DB5500_L2CC (IRQ_SHPI_START + 13)
20#define IRQ_DB5500_MSP0 (IRQ_SHPI_START + 14)
21#define IRQ_DB5500_CRYP1 (IRQ_SHPI_START + 15)
22#define IRQ_DB5500_PMU1 (IRQ_SHPI_START + 16)
23#define IRQ_DB5500_MTU1 (IRQ_SHPI_START + 17)
24#define IRQ_DB5500_RTC (IRQ_SHPI_START + 18)
25#define IRQ_DB5500_UART1 (IRQ_SHPI_START + 19)
26#define IRQ_DB5500_USB_WAKEUP (IRQ_SHPI_START + 20)
27#define IRQ_DB5500_I2C0 (IRQ_SHPI_START + 21)
28#define IRQ_DB5500_I2C1 (IRQ_SHPI_START + 22)
29#define IRQ_DB5500_USBOTG (IRQ_SHPI_START + 23)
30#define IRQ_DB5500_DMA_SECURE (IRQ_SHPI_START + 24)
31#define IRQ_DB5500_DMA (IRQ_SHPI_START + 25)
32#define IRQ_DB5500_UART2 (IRQ_SHPI_START + 26)
33#define IRQ_DB5500_ICN_PMU1 (IRQ_SHPI_START + 27)
34#define IRQ_DB5500_ICN_PMU2 (IRQ_SHPI_START + 28)
35#define IRQ_DB5500_UART3 (IRQ_SHPI_START + 29)
36#define IRQ_DB5500_SPI3 (IRQ_SHPI_START + 30)
37#define IRQ_DB5500_SDMMC4 (IRQ_SHPI_START + 31)
38#define IRQ_DB5500_IRRC (IRQ_SHPI_START + 33)
39#define IRQ_DB5500_IRDA_FT (IRQ_SHPI_START + 34)
40#define IRQ_DB5500_IRDA_SD (IRQ_SHPI_START + 35)
41#define IRQ_DB5500_IRDA_FI (IRQ_SHPI_START + 36)
42#define IRQ_DB5500_IRDA_FD (IRQ_SHPI_START + 37)
43#define IRQ_DB5500_FSMC_CODEREADY (IRQ_SHPI_START + 38)
44#define IRQ_DB5500_FSMC_NANDWAIT (IRQ_SHPI_START + 39)
45#define IRQ_DB5500_AB5500 (IRQ_SHPI_START + 40)
46#define IRQ_DB5500_SDMMC2 (IRQ_SHPI_START + 41)
47#define IRQ_DB5500_SIA (IRQ_SHPI_START + 42)
48#define IRQ_DB5500_SIA2 (IRQ_SHPI_START + 43)
49#define IRQ_DB5500_HVA (IRQ_SHPI_START + 44)
50#define IRQ_DB5500_HVA2 (IRQ_SHPI_START + 45)
51#define IRQ_DB5500_PRCMU0 (IRQ_SHPI_START + 46)
52#define IRQ_DB5500_PRCMU1 (IRQ_SHPI_START + 47)
53#define IRQ_DB5500_DISP (IRQ_SHPI_START + 48)
54#define IRQ_DB5500_SDMMC1 (IRQ_SHPI_START + 50)
55#define IRQ_DB5500_MSP1 (IRQ_SHPI_START + 52)
56#define IRQ_DB5500_KBD (IRQ_SHPI_START + 53)
57#define IRQ_DB5500_I2C2 (IRQ_SHPI_START + 55)
58#define IRQ_DB5500_B2R2 (IRQ_SHPI_START + 56)
59#define IRQ_DB5500_CRYP0 (IRQ_SHPI_START + 57)
60#define IRQ_DB5500_SDMMC3 (IRQ_SHPI_START + 59)
61#define IRQ_DB5500_SDMMC0 (IRQ_SHPI_START + 60)
62#define IRQ_DB5500_HSEM (IRQ_SHPI_START + 61)
63#define IRQ_DB5500_SBAG (IRQ_SHPI_START + 63)
64#define IRQ_DB5500_SPI1 (IRQ_SHPI_START + 96)
65#define IRQ_DB5500_MSP2 (IRQ_SHPI_START + 98)
66#define IRQ_DB5500_SRPTIMER (IRQ_SHPI_START + 101)
67#define IRQ_DB5500_CTI0 (IRQ_SHPI_START + 108)
68#define IRQ_DB5500_CTI1 (IRQ_SHPI_START + 109)
69#define IRQ_DB5500_ICN_ERR (IRQ_SHPI_START + 110)
70#define IRQ_DB5500_MALI_PPMMU (IRQ_SHPI_START + 112)
71#define IRQ_DB5500_MALI_PP (IRQ_SHPI_START + 113)
72#define IRQ_DB5500_MALI_GPMMU (IRQ_SHPI_START + 114)
73#define IRQ_DB5500_MALI_GP (IRQ_SHPI_START + 115)
74#define IRQ_DB5500_MALI (IRQ_SHPI_START + 116)
75#define IRQ_DB5500_PRCMU_SEM (IRQ_SHPI_START + 118)
76#define IRQ_DB5500_GPIO0 (IRQ_SHPI_START + 119)
77#define IRQ_DB5500_GPIO1 (IRQ_SHPI_START + 120)
78#define IRQ_DB5500_GPIO2 (IRQ_SHPI_START + 121)
79#define IRQ_DB5500_GPIO3 (IRQ_SHPI_START + 122)
80#define IRQ_DB5500_GPIO4 (IRQ_SHPI_START + 123)
81#define IRQ_DB5500_GPIO5 (IRQ_SHPI_START + 124)
82#define IRQ_DB5500_GPIO6 (IRQ_SHPI_START + 125)
83#define IRQ_DB5500_GPIO7 (IRQ_SHPI_START + 126)
84
85#endif
diff --git a/arch/arm/mach-ux500/include/mach/irqs-db8500.h b/arch/arm/mach-ux500/include/mach/irqs-db8500.h
new file mode 100644
index 000000000000..8b5d9f0a1633
--- /dev/null
+++ b/arch/arm/mach-ux500/include/mach/irqs-db8500.h
@@ -0,0 +1,96 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * Author: Rabin Vincent <rabin.vincent@stericsson.com>
5 * License terms: GNU General Public License (GPL) version 2
6 */
7
8#ifndef __MACH_IRQS_DB8500_H
9#define __MACH_IRQS_DB8500_H
10
11#define IRQ_DB8500_MTU0 (IRQ_SHPI_START + 4)
12#define IRQ_DB8500_SPI2 (IRQ_SHPI_START + 6)
13#define IRQ_DB8500_PMU (IRQ_SHPI_START + 7)
14#define IRQ_DB8500_SPI0 (IRQ_SHPI_START + 8)
15#define IRQ_DB8500_RTT (IRQ_SHPI_START + 9)
16#define IRQ_DB8500_PKA (IRQ_SHPI_START + 10)
17#define IRQ_DB8500_UART0 (IRQ_SHPI_START + 11)
18#define IRQ_DB8500_I2C3 (IRQ_SHPI_START + 12)
19#define IRQ_DB8500_L2CC (IRQ_SHPI_START + 13)
20#define IRQ_DB8500_SSP0 (IRQ_SHPI_START + 14)
21#define IRQ_DB8500_CRYP1 (IRQ_SHPI_START + 15)
22#define IRQ_DB8500_MSP1_RX (IRQ_SHPI_START + 16)
23#define IRQ_DB8500_MTU1 (IRQ_SHPI_START + 17)
24#define IRQ_DB8500_RTC (IRQ_SHPI_START + 18)
25#define IRQ_DB8500_UART1 (IRQ_SHPI_START + 19)
26#define IRQ_DB8500_USB_WAKEUP (IRQ_SHPI_START + 20)
27#define IRQ_DB8500_I2C0 (IRQ_SHPI_START + 21)
28#define IRQ_DB8500_I2C1 (IRQ_SHPI_START + 22)
29#define IRQ_DB8500_USBOTG (IRQ_SHPI_START + 23)
30#define IRQ_DB8500_DMA_SECURE (IRQ_SHPI_START + 24)
31#define IRQ_DB8500_DMA (IRQ_SHPI_START + 25)
32#define IRQ_DB8500_UART2 (IRQ_SHPI_START + 26)
33#define IRQ_DB8500_ICN_PMU1 (IRQ_SHPI_START + 27)
34#define IRQ_DB8500_ICN_PMU2 (IRQ_SHPI_START + 28)
35#define IRQ_DB8500_HSIR_EXCEP (IRQ_SHPI_START + 29)
36#define IRQ_DB8500_MSP0 (IRQ_SHPI_START + 31)
37#define IRQ_DB8500_HSIR_CH0_OVRRUN (IRQ_SHPI_START + 32)
38#define IRQ_DB8500_HSIR_CH1_OVRRUN (IRQ_SHPI_START + 33)
39#define IRQ_DB8500_HSIR_CH2_OVRRUN (IRQ_SHPI_START + 34)
40#define IRQ_DB8500_HSIR_CH3_OVRRUN (IRQ_SHPI_START + 35)
41#define IRQ_DB8500_HSIR_CH4_OVRRUN (IRQ_SHPI_START + 36)
42#define IRQ_DB8500_HSIR_CH5_OVRRUN (IRQ_SHPI_START + 37)
43#define IRQ_DB8500_HSIR_CH6_OVRRUN (IRQ_SHPI_START + 38)
44#define IRQ_DB8500_HSIR_CH7_OVRRUN (IRQ_SHPI_START + 39)
45#define IRQ_DB8500_AB8500 (IRQ_SHPI_START + 40)
46#define IRQ_DB8500_SDMMC2 (IRQ_SHPI_START + 41)
47#define IRQ_DB8500_SIA (IRQ_SHPI_START + 42)
48#define IRQ_DB8500_SIA2 (IRQ_SHPI_START + 43)
49#define IRQ_DB8500_SVA (IRQ_SHPI_START + 44)
50#define IRQ_DB8500_SVA2 (IRQ_SHPI_START + 45)
51#define IRQ_DB8500_PRCMU0 (IRQ_SHPI_START + 46)
52#define IRQ_DB8500_PRCMU1 (IRQ_SHPI_START + 47)
53#define IRQ_DB8500_DISP (IRQ_SHPI_START + 48)
54#define IRQ_DB8500_SPI3 (IRQ_SHPI_START + 49)
55#define IRQ_DB8500_SDMMC1 (IRQ_SHPI_START + 50)
56#define IRQ_DB8500_I2C4 (IRQ_SHPI_START + 51)
57#define IRQ_DB8500_SSP1 (IRQ_SHPI_START + 52)
58#define IRQ_DB8500_SKE (IRQ_SHPI_START + 53)
59#define IRQ_DB8500_KB (IRQ_SHPI_START + 54)
60#define IRQ_DB8500_I2C2 (IRQ_SHPI_START + 55)
61#define IRQ_DB8500_B2R2 (IRQ_SHPI_START + 56)
62#define IRQ_DB8500_CRYP0 (IRQ_SHPI_START + 57)
63#define IRQ_DB8500_SDMMC3 (IRQ_SHPI_START + 59)
64#define IRQ_DB8500_SDMMC0 (IRQ_SHPI_START + 60)
65#define IRQ_DB8500_HSEM (IRQ_SHPI_START + 61)
66#define IRQ_DB8500_MSP1 (IRQ_SHPI_START + 62)
67#define IRQ_DB8500_SBAG (IRQ_SHPI_START + 63)
68#define IRQ_DB8500_SPI1 (IRQ_SHPI_START + 96)
69#define IRQ_DB8500_SRPTIMER (IRQ_SHPI_START + 97)
70#define IRQ_DB8500_MSP2 (IRQ_SHPI_START + 98)
71#define IRQ_DB8500_SDMMC4 (IRQ_SHPI_START + 99)
72#define IRQ_DB8500_SDMMC5 (IRQ_SHPI_START + 100)
73#define IRQ_DB8500_HSIRD0 (IRQ_SHPI_START + 104)
74#define IRQ_DB8500_HSIRD1 (IRQ_SHPI_START + 105)
75#define IRQ_DB8500_HSITD0 (IRQ_SHPI_START + 106)
76#define IRQ_DB8500_HSITD1 (IRQ_SHPI_START + 107)
77#define IRQ_DB8500_CTI0 (IRQ_SHPI_START + 108)
78#define IRQ_DB8500_CTI1 (IRQ_SHPI_START + 109)
79#define IRQ_DB8500_ICN_ERR (IRQ_SHPI_START + 110)
80#define IRQ_DB8500_MALI_PPMMU (IRQ_SHPI_START + 112)
81#define IRQ_DB8500_MALI_PP (IRQ_SHPI_START + 113)
82#define IRQ_DB8500_MALI_GPMMU (IRQ_SHPI_START + 114)
83#define IRQ_DB8500_MALI_GP (IRQ_SHPI_START + 115)
84#define IRQ_DB8500_MALI (IRQ_SHPI_START + 116)
85#define IRQ_DB8500_PRCMU_SEM (IRQ_SHPI_START + 118)
86#define IRQ_DB8500_GPIO0 (IRQ_SHPI_START + 119)
87#define IRQ_DB8500_GPIO1 (IRQ_SHPI_START + 120)
88#define IRQ_DB8500_GPIO2 (IRQ_SHPI_START + 121)
89#define IRQ_DB8500_GPIO3 (IRQ_SHPI_START + 122)
90#define IRQ_DB8500_GPIO4 (IRQ_SHPI_START + 123)
91#define IRQ_DB8500_GPIO5 (IRQ_SHPI_START + 124)
92#define IRQ_DB8500_GPIO6 (IRQ_SHPI_START + 125)
93#define IRQ_DB8500_GPIO7 (IRQ_SHPI_START + 126)
94#define IRQ_DB8500_GPIO8 (IRQ_SHPI_START + 127)
95
96#endif
diff --git a/arch/arm/mach-ux500/include/mach/irqs.h b/arch/arm/mach-ux500/include/mach/irqs.h
index 7970684b1d09..10385bdc2b77 100644
--- a/arch/arm/mach-ux500/include/mach/irqs.h
+++ b/arch/arm/mach-ux500/include/mach/irqs.h
@@ -10,7 +10,8 @@
10#ifndef ASM_ARCH_IRQS_H 10#ifndef ASM_ARCH_IRQS_H
11#define ASM_ARCH_IRQS_H 11#define ASM_ARCH_IRQS_H
12 12
13#include <mach/hardware.h> 13#include <mach/irqs-db5500.h>
14#include <mach/irqs-db8500.h>
14 15
15#define IRQ_LOCALTIMER 29 16#define IRQ_LOCALTIMER 29
16#define IRQ_LOCALWDOG 30 17#define IRQ_LOCALWDOG 30
@@ -67,12 +68,21 @@
67/* There are 128 shared peripheral interrupts assigned to 68/* There are 128 shared peripheral interrupts assigned to
68 * INTID[160:32]. The first 32 interrupts are reserved. 69 * INTID[160:32]. The first 32 interrupts are reserved.
69 */ 70 */
70#define U8500_SOC_NR_IRQS 161 71#define DBX500_NR_INTERNAL_IRQS 161
71 72
72/* After chip-specific IRQ numbers we have the GPIO ones */ 73/* After chip-specific IRQ numbers we have the GPIO ones */
73#define NOMADIK_NR_GPIO 288 74#define NOMADIK_NR_GPIO 288
74#define NOMADIK_GPIO_TO_IRQ(gpio) ((gpio) + U8500_SOC_NR_IRQS) 75#define NOMADIK_GPIO_TO_IRQ(gpio) ((gpio) + DBX500_NR_INTERNAL_IRQS)
75#define NOMADIK_IRQ_TO_GPIO(irq) ((irq) - U8500_SOC_NR_IRQS) 76#define NOMADIK_IRQ_TO_GPIO(irq) ((irq) - DBX500_NR_INTERNAL_IRQS)
76#define NR_IRQS NOMADIK_GPIO_TO_IRQ(NOMADIK_NR_GPIO) 77#define IRQ_BOARD_START NOMADIK_GPIO_TO_IRQ(NOMADIK_NR_GPIO)
77 78
78#endif /*ASM_ARCH_IRQS_H*/ 79/* This will be overridden by board-specific irq headers */
80#define IRQ_BOARD_END IRQ_BOARD_START
81
82#ifdef CONFIG_MACH_U8500_MOP
83#include <mach/irqs-board-mop500.h>
84#endif
85
86#define NR_IRQS IRQ_BOARD_END
87
88#endif /* ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-ux500/pins-db8500.h b/arch/arm/mach-ux500/pins-db8500.h
new file mode 100644
index 000000000000..9055d5d3233c
--- /dev/null
+++ b/arch/arm/mach-ux500/pins-db8500.h
@@ -0,0 +1,742 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License terms: GNU General Public License, version 2
5 * Author: Rabin Vincent <rabin.vincent@stericsson.com>
6 */
7
8#ifndef __MACH_PINS_DB8500_H
9#define __MACH_PINS_DB8500_H
10
11/*
12 * TODO: Eventually encode all non-board specific pull up/down configuration
13 * here.
14 */
15
16#define GPIO0_GPIO PIN_CFG(0, GPIO)
17#define GPIO0_U0_CTSn PIN_CFG(0, ALT_A)
18#define GPIO0_TRIG_OUT PIN_CFG(0, ALT_B)
19#define GPIO0_IP_TDO PIN_CFG(0, ALT_C)
20
21#define GPIO1_GPIO PIN_CFG(1, GPIO)
22#define GPIO1_U0_RTSn PIN_CFG(1, ALT_A)
23#define GPIO1_TRIG_IN PIN_CFG(1, ALT_B)
24#define GPIO1_IP_TDI PIN_CFG(1, ALT_C)
25
26#define GPIO2_GPIO PIN_CFG(2, GPIO)
27#define GPIO2_U0_RXD PIN_CFG(2, ALT_A)
28#define GPIO2_NONE PIN_CFG(2, ALT_B)
29#define GPIO2_IP_TMS PIN_CFG(2, ALT_C)
30
31#define GPIO3_GPIO PIN_CFG(3, GPIO)
32#define GPIO3_U0_TXD PIN_CFG(3, ALT_A)
33#define GPIO3_NONE PIN_CFG(3, ALT_B)
34#define GPIO3_IP_TCK PIN_CFG(3, ALT_C)
35
36#define GPIO4_GPIO PIN_CFG(4, GPIO)
37#define GPIO4_U1_RXD PIN_CFG(4, ALT_A)
38#define GPIO4_I2C4_SCL PIN_CFG_PULL(4, ALT_B, UP)
39#define GPIO4_IP_TRSTn PIN_CFG(4, ALT_C)
40
41#define GPIO5_GPIO PIN_CFG(5, GPIO)
42#define GPIO5_U1_TXD PIN_CFG(5, ALT_A)
43#define GPIO5_I2C4_SDA PIN_CFG_PULL(5, ALT_B, UP)
44#define GPIO5_IP_GPIO6 PIN_CFG(5, ALT_C)
45
46#define GPIO6_GPIO PIN_CFG(6, GPIO)
47#define GPIO6_U1_CTSn PIN_CFG(6, ALT_A)
48#define GPIO6_I2C1_SCL PIN_CFG_PULL(6, ALT_B, UP)
49#define GPIO6_IP_GPIO0 PIN_CFG(6, ALT_C)
50
51#define GPIO7_GPIO PIN_CFG(7, GPIO)
52#define GPIO7_U1_RTSn PIN_CFG(7, ALT_A)
53#define GPIO7_I2C1_SDA PIN_CFG_PULL(7, ALT_B, UP)
54#define GPIO7_IP_GPIO1 PIN_CFG(7, ALT_C)
55
56#define GPIO8_GPIO PIN_CFG(8, GPIO)
57#define GPIO8_IPI2C_SDA PIN_CFG_PULL(8, ALT_A, UP)
58#define GPIO8_I2C2_SDA PIN_CFG_PULL(8, ALT_B, UP)
59
60#define GPIO9_GPIO PIN_CFG(9, GPIO)
61#define GPIO9_IPI2C_SCL PIN_CFG_PULL(9, ALT_A, UP)
62#define GPIO9_I2C2_SCL PIN_CFG_PULL(9, ALT_B, UP)
63
64#define GPIO10_GPIO PIN_CFG(10, GPIO)
65#define GPIO10_IPI2C_SDA PIN_CFG_PULL(10, ALT_A, UP)
66#define GPIO10_I2C2_SDA PIN_CFG_PULL(10, ALT_B, UP)
67#define GPIO10_IP_GPIO3 PIN_CFG(10, ALT_C)
68
69#define GPIO11_GPIO PIN_CFG(11, GPIO)
70#define GPIO11_IPI2C_SCL PIN_CFG_PULL(11, ALT_A, UP)
71#define GPIO11_I2C2_SCL PIN_CFG_PULL(11, ALT_B, UP)
72#define GPIO11_IP_GPIO2 PIN_CFG(11, ALT_C)
73
74#define GPIO12_GPIO PIN_CFG(12, GPIO)
75#define GPIO12_MSP0_TXD PIN_CFG(12, ALT_A)
76#define GPIO12_MSP0_RXD PIN_CFG(12, ALT_B)
77
78#define GPIO13_GPIO PIN_CFG(13, GPIO)
79#define GPIO13_MSP0_TFS PIN_CFG(13, ALT_A)
80
81#define GPIO14_GPIO PIN_CFG(14, GPIO)
82#define GPIO14_MSP0_TCK PIN_CFG(14, ALT_A)
83
84#define GPIO15_GPIO PIN_CFG(15, GPIO)
85#define GPIO15_MSP0_RXD PIN_CFG(15, ALT_A)
86#define GPIO15_MSP0_TXD PIN_CFG(15, ALT_B)
87
88#define GPIO16_GPIO PIN_CFG(16, GPIO)
89#define GPIO16_MSP0_RFS PIN_CFG(16, ALT_A)
90#define GPIO16_I2C1_SCL PIN_CFG_PULL(16, ALT_B, UP)
91#define GPIO16_SLIM0_DAT PIN_CFG(16, ALT_C)
92
93#define GPIO17_GPIO PIN_CFG(17, GPIO)
94#define GPIO17_MSP0_RCK PIN_CFG(17, ALT_A)
95#define GPIO17_I2C1_SDA PIN_CFG_PULL(17, ALT_B, UP)
96#define GPIO17_SLIM0_CLK PIN_CFG(17, ALT_C)
97
98#define GPIO18_GPIO PIN_CFG(18, GPIO)
99#define GPIO18_MC0_CMDDIR PIN_CFG(18, ALT_A)
100#define GPIO18_U2_RXD PIN_CFG(18, ALT_B)
101#define GPIO18_MS_IEP PIN_CFG(18, ALT_C)
102
103#define GPIO19_GPIO PIN_CFG(19, GPIO)
104#define GPIO19_MC0_DAT0DIR PIN_CFG(19, ALT_A)
105#define GPIO19_U2_TXD PIN_CFG(19, ALT_B)
106#define GPIO19_MS_DAT0DIR PIN_CFG(19, ALT_C)
107
108#define GPIO20_GPIO PIN_CFG(20, GPIO)
109#define GPIO20_MC0_DAT2DIR PIN_CFG(20, ALT_A)
110#define GPIO20_UARTMOD_TXD PIN_CFG(20, ALT_B)
111#define GPIO20_IP_TRIGOUT PIN_CFG(20, ALT_C)
112
113#define GPIO21_GPIO PIN_CFG(21, GPIO)
114#define GPIO21_MC0_DAT31DIR PIN_CFG(21, ALT_A)
115#define GPIO21_MSP0_SCK PIN_CFG(21, ALT_B)
116#define GPIO21_MS_DAT31DIR PIN_CFG(21, ALT_C)
117
118#define GPIO22_GPIO PIN_CFG(22, GPIO)
119#define GPIO22_MC0_FBCLK PIN_CFG(22, ALT_A)
120#define GPIO22_UARTMOD_RXD PIN_CFG(22, ALT_B)
121#define GPIO22_MS_FBCLK PIN_CFG(22, ALT_C)
122
123#define GPIO23_GPIO PIN_CFG(23, GPIO)
124#define GPIO23_MC0_CLK PIN_CFG(23, ALT_A)
125#define GPIO23_STMMOD_CLK PIN_CFG(23, ALT_B)
126#define GPIO23_MS_CLK PIN_CFG(23, ALT_C)
127
128#define GPIO24_GPIO PIN_CFG(24, GPIO)
129#define GPIO24_MC0_CMD PIN_CFG(24, ALT_A)
130#define GPIO24_UARTMOD_RXD PIN_CFG(24, ALT_B)
131#define GPIO24_MS_BS PIN_CFG(24, ALT_C)
132
133#define GPIO25_GPIO PIN_CFG(25, GPIO)
134#define GPIO25_MC0_DAT0 PIN_CFG(25, ALT_A)
135#define GPIO25_STMMOD_DAT0 PIN_CFG(25, ALT_B)
136#define GPIO25_MS_DAT0 PIN_CFG(25, ALT_C)
137
138#define GPIO26_GPIO PIN_CFG(26, GPIO)
139#define GPIO26_MC0_DAT1 PIN_CFG(26, ALT_A)
140#define GPIO26_STMMOD_DAT1 PIN_CFG(26, ALT_B)
141#define GPIO26_MS_DAT1 PIN_CFG(26, ALT_C)
142
143#define GPIO27_GPIO PIN_CFG(27, GPIO)
144#define GPIO27_MC0_DAT2 PIN_CFG(27, ALT_A)
145#define GPIO27_STMMOD_DAT2 PIN_CFG(27, ALT_B)
146#define GPIO27_MS_DAT2 PIN_CFG(27, ALT_C)
147
148#define GPIO28_GPIO PIN_CFG(28, GPIO)
149#define GPIO28_MC0_DAT3 PIN_CFG(28, ALT_A)
150#define GPIO28_STMMOD_DAT3 PIN_CFG(28, ALT_B)
151#define GPIO28_MS_DAT3 PIN_CFG(28, ALT_C)
152
153#define GPIO29_GPIO PIN_CFG(29, GPIO)
154#define GPIO29_MC0_DAT4 PIN_CFG(29, ALT_A)
155#define GPIO29_SPI3_CLK PIN_CFG(29, ALT_B)
156#define GPIO29_U2_RXD PIN_CFG(29, ALT_C)
157
158#define GPIO30_GPIO PIN_CFG(30, GPIO)
159#define GPIO30_MC0_DAT5 PIN_CFG(30, ALT_A)
160#define GPIO30_SPI3_RXD PIN_CFG(30, ALT_B)
161#define GPIO30_U2_TXD PIN_CFG(30, ALT_C)
162
163#define GPIO31_GPIO PIN_CFG(31, GPIO)
164#define GPIO31_MC0_DAT6 PIN_CFG(31, ALT_A)
165#define GPIO31_SPI3_FRM PIN_CFG(31, ALT_B)
166#define GPIO31_U2_CTSn PIN_CFG(31, ALT_C)
167
168#define GPIO32_GPIO PIN_CFG(32, GPIO)
169#define GPIO32_MC0_DAT7 PIN_CFG(32, ALT_A)
170#define GPIO32_SPI3_TXD PIN_CFG(32, ALT_B)
171#define GPIO32_U2_RTSn PIN_CFG(32, ALT_C)
172
173#define GPIO33_GPIO PIN_CFG(33, GPIO)
174#define GPIO33_MSP1_TXD PIN_CFG(33, ALT_A)
175#define GPIO33_MSP1_RXD PIN_CFG(33, ALT_B)
176#define GPIO33_U0_DTRn PIN_CFG(33, ALT_C)
177
178#define GPIO34_GPIO PIN_CFG(34, GPIO)
179#define GPIO34_MSP1_TFS PIN_CFG(34, ALT_A)
180#define GPIO34_NONE PIN_CFG(34, ALT_B)
181#define GPIO34_U0_DCDn PIN_CFG(34, ALT_C)
182
183#define GPIO35_GPIO PIN_CFG(35, GPIO)
184#define GPIO35_MSP1_TCK PIN_CFG(35, ALT_A)
185#define GPIO35_NONE PIN_CFG(35, ALT_B)
186#define GPIO35_U0_DSRn PIN_CFG(35, ALT_C)
187
188#define GPIO36_GPIO PIN_CFG(36, GPIO)
189#define GPIO36_MSP1_RXD PIN_CFG(36, ALT_A)
190#define GPIO36_MSP1_TXD PIN_CFG(36, ALT_B)
191#define GPIO36_U0_RIn PIN_CFG(36, ALT_C)
192
193#define GPIO64_GPIO PIN_CFG(64, GPIO)
194#define GPIO64_LCDB_DE PIN_CFG(64, ALT_A)
195#define GPIO64_KP_O1 PIN_CFG(64, ALT_B)
196#define GPIO64_IP_GPIO4 PIN_CFG(64, ALT_C)
197
198#define GPIO65_GPIO PIN_CFG(65, GPIO)
199#define GPIO65_LCDB_HSO PIN_CFG(65, ALT_A)
200#define GPIO65_KP_O0 PIN_CFG(65, ALT_B)
201#define GPIO65_IP_GPIO5 PIN_CFG(65, ALT_C)
202
203#define GPIO66_GPIO PIN_CFG(66, GPIO)
204#define GPIO66_LCDB_VSO PIN_CFG(66, ALT_A)
205#define GPIO66_KP_I1 PIN_CFG(66, ALT_B)
206#define GPIO66_IP_GPIO6 PIN_CFG(66, ALT_C)
207
208#define GPIO67_GPIO PIN_CFG(67, GPIO)
209#define GPIO67_LCDB_CLK PIN_CFG(67, ALT_A)
210#define GPIO67_KP_I0 PIN_CFG(67, ALT_B)
211#define GPIO67_IP_GPIO7 PIN_CFG(67, ALT_C)
212
213#define GPIO68_GPIO PIN_CFG(68, GPIO)
214#define GPIO68_LCD_VSI0 PIN_CFG(68, ALT_A)
215#define GPIO68_KP_O7 PIN_CFG(68, ALT_B)
216#define GPIO68_SM_CLE PIN_CFG(68, ALT_C)
217
218#define GPIO69_GPIO PIN_CFG(69, GPIO)
219#define GPIO69_LCD_VSI1 PIN_CFG(69, ALT_A)
220#define GPIO69_KP_I7 PIN_CFG(69, ALT_B)
221#define GPIO69_SM_ALE PIN_CFG(69, ALT_C)
222
223#define GPIO70_GPIO PIN_CFG(70, GPIO)
224#define GPIO70_LCD_D0 PIN_CFG(70, ALT_A)
225#define GPIO70_KP_O5 PIN_CFG(70, ALT_B)
226#define GPIO70_STMAPE_CLK PIN_CFG(70, ALT_C)
227
228#define GPIO71_GPIO PIN_CFG(71, GPIO)
229#define GPIO71_LCD_D1 PIN_CFG(71, ALT_A)
230#define GPIO71_KP_O4 PIN_CFG(71, ALT_B)
231#define GPIO71_STMAPE_DAT3 PIN_CFG(71, ALT_C)
232
233#define GPIO72_GPIO PIN_CFG(72, GPIO)
234#define GPIO72_LCD_D2 PIN_CFG(72, ALT_A)
235#define GPIO72_KP_O3 PIN_CFG(72, ALT_B)
236#define GPIO72_STMAPE_DAT2 PIN_CFG(72, ALT_C)
237
238#define GPIO73_GPIO PIN_CFG(73, GPIO)
239#define GPIO73_LCD_D3 PIN_CFG(73, ALT_A)
240#define GPIO73_KP_O2 PIN_CFG(73, ALT_B)
241#define GPIO73_STMAPE_DAT1 PIN_CFG(73, ALT_C)
242
243#define GPIO74_GPIO PIN_CFG(74, GPIO)
244#define GPIO74_LCD_D4 PIN_CFG(74, ALT_A)
245#define GPIO74_KP_I5 PIN_CFG(74, ALT_B)
246#define GPIO74_STMAPE_DAT0 PIN_CFG(74, ALT_C)
247
248#define GPIO75_GPIO PIN_CFG(75, GPIO)
249#define GPIO75_LCD_D5 PIN_CFG(75, ALT_A)
250#define GPIO75_KP_I4 PIN_CFG(75, ALT_B)
251#define GPIO75_U2_RXD PIN_CFG(75, ALT_C)
252
253#define GPIO76_GPIO PIN_CFG(76, GPIO)
254#define GPIO76_LCD_D6 PIN_CFG(76, ALT_A)
255#define GPIO76_KP_I3 PIN_CFG(76, ALT_B)
256#define GPIO76_U2_TXD PIN_CFG(76, ALT_C)
257
258#define GPIO77_GPIO PIN_CFG(77, GPIO)
259#define GPIO77_LCD_D7 PIN_CFG(77, ALT_A)
260#define GPIO77_KP_I2 PIN_CFG(77, ALT_B)
261#define GPIO77_NONE PIN_CFG(77, ALT_C)
262
263#define GPIO78_GPIO PIN_CFG(78, GPIO)
264#define GPIO78_LCD_D8 PIN_CFG(78, ALT_A)
265#define GPIO78_KP_O6 PIN_CFG(78, ALT_B)
266#define GPIO78_IP_GPIO2 PIN_CFG(78, ALT_C)
267
268#define GPIO79_GPIO PIN_CFG(79, GPIO)
269#define GPIO79_LCD_D9 PIN_CFG(79, ALT_A)
270#define GPIO79_KP_I6 PIN_CFG(79, ALT_B)
271#define GPIO79_IP_GPIO3 PIN_CFG(79, ALT_C)
272
273#define GPIO80_GPIO PIN_CFG(80, GPIO)
274#define GPIO80_LCD_D10 PIN_CFG(80, ALT_A)
275#define GPIO80_KP_SKA0 PIN_CFG(80, ALT_B)
276#define GPIO80_IP_GPIO4 PIN_CFG(80, ALT_C)
277
278#define GPIO81_GPIO PIN_CFG(81, GPIO)
279#define GPIO81_LCD_D11 PIN_CFG(81, ALT_A)
280#define GPIO81_KP_SKB0 PIN_CFG(81, ALT_B)
281#define GPIO81_IP_GPIO5 PIN_CFG(81, ALT_C)
282
283#define GPIO82_GPIO PIN_CFG(82, GPIO)
284#define GPIO82_LCD_D12 PIN_CFG(82, ALT_A)
285#define GPIO82_KP_O5 PIN_CFG(82, ALT_B)
286
287#define GPIO83_GPIO PIN_CFG(83, GPIO)
288#define GPIO83_LCD_D13 PIN_CFG(83, ALT_A)
289#define GPIO83_KP_O4 PIN_CFG(83, ALT_B)
290
291#define GPIO84_GPIO PIN_CFG(84, GPIO)
292#define GPIO84_LCD_D14 PIN_CFG(84, ALT_A)
293#define GPIO84_KP_I5 PIN_CFG(84, ALT_B)
294
295#define GPIO85_GPIO PIN_CFG(85, GPIO)
296#define GPIO85_LCD_D15 PIN_CFG(85, ALT_A)
297#define GPIO85_KP_I4 PIN_CFG(85, ALT_B)
298
299#define GPIO86_GPIO PIN_CFG(86, GPIO)
300#define GPIO86_LCD_D16 PIN_CFG(86, ALT_A)
301#define GPIO86_SM_ADQ0 PIN_CFG(86, ALT_B)
302#define GPIO86_MC5_DAT0 PIN_CFG(86, ALT_C)
303
304#define GPIO87_GPIO PIN_CFG(87, GPIO)
305#define GPIO87_LCD_D17 PIN_CFG(87, ALT_A)
306#define GPIO87_SM_ADQ1 PIN_CFG(87, ALT_B)
307#define GPIO87_MC5_DAT1 PIN_CFG(87, ALT_C)
308
309#define GPIO88_GPIO PIN_CFG(88, GPIO)
310#define GPIO88_LCD_D18 PIN_CFG(88, ALT_A)
311#define GPIO88_SM_ADQ2 PIN_CFG(88, ALT_B)
312#define GPIO88_MC5_DAT2 PIN_CFG(88, ALT_C)
313
314#define GPIO89_GPIO PIN_CFG(89, GPIO)
315#define GPIO89_LCD_D19 PIN_CFG(89, ALT_A)
316#define GPIO89_SM_ADQ3 PIN_CFG(89, ALT_B)
317#define GPIO89_MC5_DAT3 PIN_CFG(89, ALT_C)
318
319#define GPIO90_GPIO PIN_CFG(90, GPIO)
320#define GPIO90_LCD_D20 PIN_CFG(90, ALT_A)
321#define GPIO90_SM_ADQ4 PIN_CFG(90, ALT_B)
322#define GPIO90_MC5_CMD PIN_CFG(90, ALT_C)
323
324#define GPIO91_GPIO PIN_CFG(91, GPIO)
325#define GPIO91_LCD_D21 PIN_CFG(91, ALT_A)
326#define GPIO91_SM_ADQ5 PIN_CFG(91, ALT_B)
327#define GPIO91_MC5_FBCLK PIN_CFG(91, ALT_C)
328
329#define GPIO92_GPIO PIN_CFG(92, GPIO)
330#define GPIO92_LCD_D22 PIN_CFG(92, ALT_A)
331#define GPIO92_SM_ADQ6 PIN_CFG(92, ALT_B)
332#define GPIO92_MC5_CLK PIN_CFG(92, ALT_C)
333
334#define GPIO93_GPIO PIN_CFG(93, GPIO)
335#define GPIO93_LCD_D23 PIN_CFG(93, ALT_A)
336#define GPIO93_SM_ADQ7 PIN_CFG(93, ALT_B)
337#define GPIO93_MC5_DAT4 PIN_CFG(93, ALT_C)
338
339#define GPIO94_GPIO PIN_CFG(94, GPIO)
340#define GPIO94_KP_O7 PIN_CFG(94, ALT_A)
341#define GPIO94_SM_ADVn PIN_CFG(94, ALT_B)
342#define GPIO94_MC5_DAT5 PIN_CFG(94, ALT_C)
343
344#define GPIO95_GPIO PIN_CFG(95, GPIO)
345#define GPIO95_KP_I7 PIN_CFG(95, ALT_A)
346#define GPIO95_SM_CS0n PIN_CFG(95, ALT_B)
347#define GPIO95_SM_PS0n PIN_CFG(95, ALT_C)
348
349#define GPIO96_GPIO PIN_CFG(96, GPIO)
350#define GPIO96_KP_O6 PIN_CFG(96, ALT_A)
351#define GPIO96_SM_OEn PIN_CFG(96, ALT_B)
352#define GPIO96_MC5_DAT6 PIN_CFG(96, ALT_C)
353
354#define GPIO97_GPIO PIN_CFG(97, GPIO)
355#define GPIO97_KP_I6 PIN_CFG(97, ALT_A)
356#define GPIO97_SM_WEn PIN_CFG(97, ALT_B)
357#define GPIO97_MC5_DAT7 PIN_CFG(97, ALT_C)
358
359#define GPIO128_GPIO PIN_CFG(128, GPIO)
360#define GPIO128_MC2_CLK PIN_CFG(128, ALT_A)
361#define GPIO128_SM_CKO PIN_CFG(128, ALT_B)
362
363#define GPIO129_GPIO PIN_CFG(129, GPIO)
364#define GPIO129_MC2_CMD PIN_CFG(129, ALT_A)
365#define GPIO129_SM_WAIT0n PIN_CFG(129, ALT_B)
366
367#define GPIO130_GPIO PIN_CFG(130, GPIO)
368#define GPIO130_MC2_FBCLK PIN_CFG(130, ALT_A)
369#define GPIO130_SM_FBCLK PIN_CFG(130, ALT_B)
370#define GPIO130_MC2_RSTN PIN_CFG(130, ALT_C)
371
372#define GPIO131_GPIO PIN_CFG(131, GPIO)
373#define GPIO131_MC2_DAT0 PIN_CFG(131, ALT_A)
374#define GPIO131_SM_ADQ8 PIN_CFG(131, ALT_B)
375
376#define GPIO132_GPIO PIN_CFG(132, GPIO)
377#define GPIO132_MC2_DAT1 PIN_CFG(132, ALT_A)
378#define GPIO132_SM_ADQ9 PIN_CFG(132, ALT_B)
379
380#define GPIO133_GPIO PIN_CFG(133, GPIO)
381#define GPIO133_MC2_DAT2 PIN_CFG(133, ALT_A)
382#define GPIO133_SM_ADQ10 PIN_CFG(133, ALT_B)
383
384#define GPIO134_GPIO PIN_CFG(134, GPIO)
385#define GPIO134_MC2_DAT3 PIN_CFG(134, ALT_A)
386#define GPIO134_SM_ADQ11 PIN_CFG(134, ALT_B)
387
388#define GPIO135_GPIO PIN_CFG(135, GPIO)
389#define GPIO135_MC2_DAT4 PIN_CFG(135, ALT_A)
390#define GPIO135_SM_ADQ12 PIN_CFG(135, ALT_B)
391
392#define GPIO136_GPIO PIN_CFG(136, GPIO)
393#define GPIO136_MC2_DAT5 PIN_CFG(136, ALT_A)
394#define GPIO136_SM_ADQ13 PIN_CFG(136, ALT_B)
395
396#define GPIO137_GPIO PIN_CFG(137, GPIO)
397#define GPIO137_MC2_DAT6 PIN_CFG(137, ALT_A)
398#define GPIO137_SM_ADQ14 PIN_CFG(137, ALT_B)
399
400#define GPIO138_GPIO PIN_CFG(138, GPIO)
401#define GPIO138_MC2_DAT7 PIN_CFG(138, ALT_A)
402#define GPIO138_SM_ADQ15 PIN_CFG(138, ALT_B)
403
404#define GPIO139_GPIO PIN_CFG(139, GPIO)
405#define GPIO139_SSP1_RXD PIN_CFG(139, ALT_A)
406#define GPIO139_SM_WAIT1n PIN_CFG(139, ALT_B)
407#define GPIO139_KP_O8 PIN_CFG(139, ALT_C)
408
409#define GPIO140_GPIO PIN_CFG(140, GPIO)
410#define GPIO140_SSP1_TXD PIN_CFG(140, ALT_A)
411#define GPIO140_IP_GPIO7 PIN_CFG(140, ALT_B)
412#define GPIO140_KP_SKA1 PIN_CFG(140, ALT_C)
413
414#define GPIO141_GPIO PIN_CFG(141, GPIO)
415#define GPIO141_SSP1_CLK PIN_CFG(141, ALT_A)
416#define GPIO141_IP_GPIO2 PIN_CFG(141, ALT_B)
417#define GPIO141_KP_O9 PIN_CFG(141, ALT_C)
418
419#define GPIO142_GPIO PIN_CFG(142, GPIO)
420#define GPIO142_SSP1_FRM PIN_CFG(142, ALT_A)
421#define GPIO142_IP_GPIO3 PIN_CFG(142, ALT_B)
422#define GPIO142_KP_SKB1 PIN_CFG(142, ALT_C)
423
424#define GPIO143_GPIO PIN_CFG(143, GPIO)
425#define GPIO143_SSP0_CLK PIN_CFG(143, ALT_A)
426
427#define GPIO144_GPIO PIN_CFG(144, GPIO)
428#define GPIO144_SSP0_FRM PIN_CFG(144, ALT_A)
429
430#define GPIO145_GPIO PIN_CFG(145, GPIO)
431#define GPIO145_SSP0_RXD PIN_CFG(145, ALT_A)
432
433#define GPIO146_GPIO PIN_CFG(146, GPIO)
434#define GPIO146_SSP0_TXD PIN_CFG(146, ALT_A)
435
436#define GPIO147_GPIO PIN_CFG(147, GPIO)
437#define GPIO147_I2C0_SCL PIN_CFG_PULL(147, ALT_A, UP)
438
439#define GPIO148_GPIO PIN_CFG(148, GPIO)
440#define GPIO148_I2C0_SDA PIN_CFG_PULL(148, ALT_A, UP)
441
442#define GPIO149_GPIO PIN_CFG(149, GPIO)
443#define GPIO149_IP_GPIO0 PIN_CFG(149, ALT_A)
444#define GPIO149_SM_CS1n PIN_CFG(149, ALT_B)
445#define GPIO149_SM_PS1n PIN_CFG(149, ALT_C)
446
447#define GPIO150_GPIO PIN_CFG(150, GPIO)
448#define GPIO150_IP_GPIO1 PIN_CFG(150, ALT_A)
449#define GPIO150_LCDA_CLK PIN_CFG(150, ALT_B)
450
451#define GPIO151_GPIO PIN_CFG(151, GPIO)
452#define GPIO151_KP_SKA0 PIN_CFG(151, ALT_A)
453#define GPIO151_LCD_VSI0 PIN_CFG(151, ALT_B)
454#define GPIO151_KP_O8 PIN_CFG(151, ALT_C)
455
456#define GPIO152_GPIO PIN_CFG(152, GPIO)
457#define GPIO152_KP_SKB0 PIN_CFG(152, ALT_A)
458#define GPIO152_LCD_VSI1 PIN_CFG(152, ALT_B)
459#define GPIO152_KP_O9 PIN_CFG(152, ALT_C)
460
461#define GPIO153_GPIO PIN_CFG(153, GPIO)
462#define GPIO153_KP_I7 PIN_CFG(153, ALT_A)
463#define GPIO153_LCD_D24 PIN_CFG(153, ALT_B)
464#define GPIO153_U2_RXD PIN_CFG(153, ALT_C)
465
466#define GPIO154_GPIO PIN_CFG(154, GPIO)
467#define GPIO154_KP_I6 PIN_CFG(154, ALT_A)
468#define GPIO154_LCD_D25 PIN_CFG(154, ALT_B)
469#define GPIO154_U2_TXD PIN_CFG(154, ALT_C)
470
471#define GPIO155_GPIO PIN_CFG(155, GPIO)
472#define GPIO155_KP_I5 PIN_CFG(155, ALT_A)
473#define GPIO155_LCD_D26 PIN_CFG(155, ALT_B)
474#define GPIO155_STMAPE_CLK PIN_CFG(155, ALT_C)
475
476#define GPIO156_GPIO PIN_CFG(156, GPIO)
477#define GPIO156_KP_I4 PIN_CFG(156, ALT_A)
478#define GPIO156_LCD_D27 PIN_CFG(156, ALT_B)
479#define GPIO156_STMAPE_DAT3 PIN_CFG(156, ALT_C)
480
481#define GPIO157_GPIO PIN_CFG(157, GPIO)
482#define GPIO157_KP_O7 PIN_CFG(157, ALT_A)
483#define GPIO157_LCD_D28 PIN_CFG(157, ALT_B)
484#define GPIO157_STMAPE_DAT2 PIN_CFG(157, ALT_C)
485
486#define GPIO158_GPIO PIN_CFG(158, GPIO)
487#define GPIO158_KP_O6 PIN_CFG(158, ALT_A)
488#define GPIO158_LCD_D29 PIN_CFG(158, ALT_B)
489#define GPIO158_STMAPE_DAT1 PIN_CFG(158, ALT_C)
490
491#define GPIO159_GPIO PIN_CFG(159, GPIO)
492#define GPIO159_KP_O5 PIN_CFG(159, ALT_A)
493#define GPIO159_LCD_D30 PIN_CFG(159, ALT_B)
494#define GPIO159_STMAPE_DAT0 PIN_CFG(159, ALT_C)
495
496#define GPIO160_GPIO PIN_CFG(160, GPIO)
497#define GPIO160_KP_O4 PIN_CFG(160, ALT_A)
498#define GPIO160_LCD_D31 PIN_CFG(160, ALT_B)
499#define GPIO160_NONE PIN_CFG(160, ALT_C)
500
501#define GPIO161_GPIO PIN_CFG(161, GPIO)
502#define GPIO161_KP_I3 PIN_CFG(161, ALT_A)
503#define GPIO161_LCD_D32 PIN_CFG(161, ALT_B)
504#define GPIO161_UARTMOD_RXD PIN_CFG(161, ALT_C)
505
506#define GPIO162_GPIO PIN_CFG(162, GPIO)
507#define GPIO162_KP_I2 PIN_CFG(162, ALT_A)
508#define GPIO162_LCD_D33 PIN_CFG(162, ALT_B)
509#define GPIO162_UARTMOD_TXD PIN_CFG(162, ALT_C)
510
511#define GPIO163_GPIO PIN_CFG(163, GPIO)
512#define GPIO163_KP_I1 PIN_CFG(163, ALT_A)
513#define GPIO163_LCD_D34 PIN_CFG(163, ALT_B)
514#define GPIO163_STMMOD_CLK PIN_CFG(163, ALT_C)
515
516#define GPIO164_GPIO PIN_CFG(164, GPIO)
517#define GPIO164_KP_I0 PIN_CFG(164, ALT_A)
518#define GPIO164_LCD_D35 PIN_CFG(164, ALT_B)
519#define GPIO164_STMMOD_DAT3 PIN_CFG(164, ALT_C)
520
521#define GPIO165_GPIO PIN_CFG(165, GPIO)
522#define GPIO165_KP_O3 PIN_CFG(165, ALT_A)
523#define GPIO165_LCD_D36 PIN_CFG(165, ALT_B)
524#define GPIO165_STMMOD_DAT2 PIN_CFG(165, ALT_C)
525
526#define GPIO166_GPIO PIN_CFG(166, GPIO)
527#define GPIO166_KP_O2 PIN_CFG(166, ALT_A)
528#define GPIO166_LCD_D37 PIN_CFG(166, ALT_B)
529#define GPIO166_STMMOD_DAT1 PIN_CFG(166, ALT_C)
530
531#define GPIO167_GPIO PIN_CFG(167, GPIO)
532#define GPIO167_KP_O1 PIN_CFG(167, ALT_A)
533#define GPIO167_LCD_D38 PIN_CFG(167, ALT_B)
534#define GPIO167_STMMOD_DAT0 PIN_CFG(167, ALT_C)
535
536#define GPIO168_GPIO PIN_CFG(168, GPIO)
537#define GPIO168_KP_O0 PIN_CFG(168, ALT_A)
538#define GPIO168_LCD_D39 PIN_CFG(168, ALT_B)
539#define GPIO168_NONE PIN_CFG(168, ALT_C)
540
541#define GPIO169_GPIO PIN_CFG(169, GPIO)
542#define GPIO169_RF_PURn PIN_CFG(169, ALT_A)
543#define GPIO169_LCDA_DE PIN_CFG(169, ALT_B)
544#define GPIO169_USBSIM_PDC PIN_CFG(169, ALT_C)
545
546#define GPIO170_GPIO PIN_CFG(170, GPIO)
547#define GPIO170_MODEM_STATE PIN_CFG(170, ALT_A)
548#define GPIO170_LCDA_VSO PIN_CFG(170, ALT_B)
549#define GPIO170_KP_SKA1 PIN_CFG(170, ALT_C)
550
551#define GPIO171_GPIO PIN_CFG(171, GPIO)
552#define GPIO171_MODEM_PWREN PIN_CFG(171, ALT_A)
553#define GPIO171_LCDA_HSO PIN_CFG(171, ALT_B)
554#define GPIO171_KP_SKB1 PIN_CFG(171, ALT_C)
555
556#define GPIO192_GPIO PIN_CFG(192, GPIO)
557#define GPIO192_MSP2_SCK PIN_CFG(192, ALT_A)
558
559#define GPIO193_GPIO PIN_CFG(193, GPIO)
560#define GPIO193_MSP2_TXD PIN_CFG(193, ALT_A)
561
562#define GPIO194_GPIO PIN_CFG(194, GPIO)
563#define GPIO194_MSP2_TCK PIN_CFG(194, ALT_A)
564
565#define GPIO195_GPIO PIN_CFG(195, GPIO)
566#define GPIO195_MSP2_TFS PIN_CFG(195, ALT_A)
567
568#define GPIO196_GPIO PIN_CFG(196, GPIO)
569#define GPIO196_MSP2_RXD PIN_CFG(196, ALT_A)
570
571#define GPIO197_GPIO PIN_CFG(197, GPIO)
572#define GPIO197_MC4_DAT3 PIN_CFG(197, ALT_A)
573
574#define GPIO198_GPIO PIN_CFG(198, GPIO)
575#define GPIO198_MC4_DAT2 PIN_CFG(198, ALT_A)
576
577#define GPIO199_GPIO PIN_CFG(199, GPIO)
578#define GPIO199_MC4_DAT1 PIN_CFG(199, ALT_A)
579
580#define GPIO200_GPIO PIN_CFG(200, GPIO)
581#define GPIO200_MC4_DAT0 PIN_CFG(200, ALT_A)
582
583#define GPIO201_GPIO PIN_CFG(201, GPIO)
584#define GPIO201_MC4_CMD PIN_CFG(201, ALT_A)
585
586#define GPIO202_GPIO PIN_CFG(202, GPIO)
587#define GPIO202_MC4_FBCLK PIN_CFG(202, ALT_A)
588#define GPIO202_PWL PIN_CFG(202, ALT_B)
589#define GPIO202_MC4_RSTN PIN_CFG(202, ALT_C)
590
591#define GPIO203_GPIO PIN_CFG(203, GPIO)
592#define GPIO203_MC4_CLK PIN_CFG(203, ALT_A)
593
594#define GPIO204_GPIO PIN_CFG(204, GPIO)
595#define GPIO204_MC4_DAT7 PIN_CFG(204, ALT_A)
596
597#define GPIO205_GPIO PIN_CFG(205, GPIO)
598#define GPIO205_MC4_DAT6 PIN_CFG(205, ALT_A)
599
600#define GPIO206_GPIO PIN_CFG(206, GPIO)
601#define GPIO206_MC4_DAT5 PIN_CFG(206, ALT_A)
602
603#define GPIO207_GPIO PIN_CFG(207, GPIO)
604#define GPIO207_MC4_DAT4 PIN_CFG(207, ALT_A)
605
606#define GPIO208_GPIO PIN_CFG(208, GPIO)
607#define GPIO208_MC1_CLK PIN_CFG(208, ALT_A)
608
609#define GPIO209_GPIO PIN_CFG(209, GPIO)
610#define GPIO209_MC1_FBCLK PIN_CFG(209, ALT_A)
611#define GPIO209_SPI1_CLK PIN_CFG(209, ALT_B)
612
613#define GPIO210_GPIO PIN_CFG(210, GPIO)
614#define GPIO210_MC1_CMD PIN_CFG(210, ALT_A)
615
616#define GPIO211_GPIO PIN_CFG(211, GPIO)
617#define GPIO211_MC1_DAT0 PIN_CFG(211, ALT_A)
618
619#define GPIO212_GPIO PIN_CFG(212, GPIO)
620#define GPIO212_MC1_DAT1 PIN_CFG(212, ALT_A)
621#define GPIO212_SPI1_FRM PIN_CFG(212, ALT_B)
622
623#define GPIO213_GPIO PIN_CFG(213, GPIO)
624#define GPIO213_MC1_DAT2 PIN_CFG(213, ALT_A)
625#define GPIO213_SPI1_TXD PIN_CFG(213, ALT_B)
626
627#define GPIO214_GPIO PIN_CFG(214, GPIO)
628#define GPIO214_MC1_DAT3 PIN_CFG(214, ALT_A)
629#define GPIO214_SPI1_RXD PIN_CFG(214, ALT_B)
630
631#define GPIO215_GPIO PIN_CFG(215, GPIO)
632#define GPIO215_MC1_CMDDIR PIN_CFG(215, ALT_A)
633#define GPIO215_MC3_DAT2DIR PIN_CFG(215, ALT_B)
634#define GPIO215_CLKOUT1 PIN_CFG(215, ALT_C)
635
636#define GPIO216_GPIO PIN_CFG(216, GPIO)
637#define GPIO216_MC1_DAT2DIR PIN_CFG(216, ALT_A)
638#define GPIO216_MC3_CMDDIR PIN_CFG(216, ALT_B)
639#define GPIO216_I2C3_SDA PIN_CFG_PULL(216, ALT_C, UP)
640
641#define GPIO217_GPIO PIN_CFG(217, GPIO)
642#define GPIO217_MC1_DAT0DIR PIN_CFG(217, ALT_A)
643#define GPIO217_MC3_DAT31DIR PIN_CFG(217, ALT_B)
644#define GPIO217_CLKOUT2 PIN_CFG(217, ALT_C)
645
646#define GPIO218_GPIO PIN_CFG(218, GPIO)
647#define GPIO218_MC1_DAT31DIR PIN_CFG(218, ALT_A)
648#define GPIO218_MC3_DAT0DIR PIN_CFG(218, ALT_B)
649#define GPIO218_I2C3_SCL PIN_CFG_PULL(218, ALT_C, UP)
650
651#define GPIO219_GPIO PIN_CFG(219, GPIO)
652#define GPIO219_HSIR_FLA0 PIN_CFG(219, ALT_A)
653#define GPIO219_MC3_CLK PIN_CFG(219, ALT_B)
654
655#define GPIO220_GPIO PIN_CFG(220, GPIO)
656#define GPIO220_HSIR_DAT0 PIN_CFG(220, ALT_A)
657#define GPIO220_MC3_FBCLK PIN_CFG(220, ALT_B)
658#define GPIO220_SPI0_CLK PIN_CFG(220, ALT_C)
659
660#define GPIO221_GPIO PIN_CFG(221, GPIO)
661#define GPIO221_HSIR_RDY0 PIN_CFG(221, ALT_A)
662#define GPIO221_MC3_CMD PIN_CFG(221, ALT_B)
663
664#define GPIO222_GPIO PIN_CFG(222, GPIO)
665#define GPIO222_HSIT_FLA0 PIN_CFG(222, ALT_A)
666#define GPIO222_MC3_DAT0 PIN_CFG(222, ALT_B)
667
668#define GPIO223_GPIO PIN_CFG(223, GPIO)
669#define GPIO223_HSIT_DAT0 PIN_CFG(223, ALT_A)
670#define GPIO223_MC3_DAT1 PIN_CFG(223, ALT_B)
671#define GPIO223_SPI0_FRM PIN_CFG(223, ALT_C)
672
673#define GPIO224_GPIO PIN_CFG(224, GPIO)
674#define GPIO224_HSIT_RDY0 PIN_CFG(224, ALT_A)
675#define GPIO224_MC3_DAT2 PIN_CFG(224, ALT_B)
676#define GPIO224_SPI0_TXD PIN_CFG(224, ALT_C)
677
678#define GPIO225_GPIO PIN_CFG(225, GPIO)
679#define GPIO225_HSIT_CAWAKE0 PIN_CFG(225, ALT_A)
680#define GPIO225_MC3_DAT3 PIN_CFG(225, ALT_B)
681#define GPIO225_SPI0_RXD PIN_CFG(225, ALT_C)
682
683#define GPIO226_GPIO PIN_CFG(226, GPIO)
684#define GPIO226_HSIT_ACWAKE0 PIN_CFG(226, ALT_A)
685#define GPIO226_PWL PIN_CFG(226, ALT_B)
686#define GPIO226_USBSIM_PDC PIN_CFG(226, ALT_C)
687
688#define GPIO227_GPIO PIN_CFG(227, GPIO)
689#define GPIO227_CLKOUT1 PIN_CFG(227, ALT_A)
690
691#define GPIO228_GPIO PIN_CFG(228, GPIO)
692#define GPIO228_CLKOUT2 PIN_CFG(228, ALT_A)
693
694#define GPIO229_GPIO PIN_CFG(229, GPIO)
695#define GPIO229_CLKOUT1 PIN_CFG(229, ALT_A)
696#define GPIO229_PWL PIN_CFG(229, ALT_B)
697#define GPIO229_I2C3_SDA PIN_CFG_PULL(229, ALT_C, UP)
698
699#define GPIO230_GPIO PIN_CFG(230, GPIO)
700#define GPIO230_CLKOUT2 PIN_CFG(230, ALT_A)
701#define GPIO230_PWL PIN_CFG(230, ALT_B)
702#define GPIO230_I2C3_SCL PIN_CFG_PULL(230, ALT_C, UP)
703
704#define GPIO256_GPIO PIN_CFG(256, GPIO)
705#define GPIO256_USB_NXT PIN_CFG(256, ALT_A)
706
707#define GPIO257_GPIO PIN_CFG(257, GPIO)
708#define GPIO257_USB_STP PIN_CFG(257, ALT_A)
709
710#define GPIO258_GPIO PIN_CFG(258, GPIO)
711#define GPIO258_USB_XCLK PIN_CFG(258, ALT_A)
712#define GPIO258_NONE PIN_CFG(258, ALT_B)
713#define GPIO258_DDR_TRIG PIN_CFG(258, ALT_C)
714
715#define GPIO259_GPIO PIN_CFG(259, GPIO)
716#define GPIO259_USB_DIR PIN_CFG(259, ALT_A)
717
718#define GPIO260_GPIO PIN_CFG(260, GPIO)
719#define GPIO260_USB_DAT7 PIN_CFG(260, ALT_A)
720
721#define GPIO261_GPIO PIN_CFG(261, GPIO)
722#define GPIO261_USB_DAT6 PIN_CFG(261, ALT_A)
723
724#define GPIO262_GPIO PIN_CFG(262, GPIO)
725#define GPIO262_USB_DAT5 PIN_CFG(262, ALT_A)
726
727#define GPIO263_GPIO PIN_CFG(263, GPIO)
728#define GPIO263_USB_DAT4 PIN_CFG(263, ALT_A)
729
730#define GPIO264_GPIO PIN_CFG(264, GPIO)
731#define GPIO264_USB_DAT3 PIN_CFG(264, ALT_A)
732
733#define GPIO265_GPIO PIN_CFG(265, GPIO)
734#define GPIO265_USB_DAT2 PIN_CFG(265, ALT_A)
735
736#define GPIO266_GPIO PIN_CFG(266, GPIO)
737#define GPIO266_USB_DAT1 PIN_CFG(266, ALT_A)
738
739#define GPIO267_GPIO PIN_CFG(267, GPIO)
740#define GPIO267_USB_DAT0 PIN_CFG(267, ALT_A)
741
742#endif
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-11 12:06:06 -0500