aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-ux500
diff options
context:
space:
mode:
authorLinus Walleij <linus.walleij@linaro.org>2012-05-06 19:33:24 -0400
committerLinus Walleij <linus.walleij@linaro.org>2012-05-11 05:14:18 -0400
commita09806607fd20bed2f8c41fe22793386790a14aa (patch)
tree92507b0f7db7a08213cd681905d8b5907b7f401f /arch/arm/mach-ux500
parent3b64c09b376ae2a82cccdb25aa0c3bc3c3be9d14 (diff)
ARM: ux500: switch to using pinctrl for uart0
UART0 had a hack that enabled its pins on init and put it to sleep on the exit callback. Replace this with the pinctrl calls to do the same thing and update the runtime table with the two apropriate states for runtime/active and idle. Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/mach-ux500')
-rw-r--r--arch/arm/mach-ux500/board-mop500-pins.c19
-rw-r--r--arch/arm/mach-ux500/board-mop500.c62
2 files changed, 60 insertions, 21 deletions
diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c
index 157af7ee5cdc..dccd29d6fff6 100644
--- a/arch/arm/mach-ux500/board-mop500-pins.c
+++ b/arch/arm/mach-ux500/board-mop500-pins.c
@@ -45,6 +45,10 @@ BIAS(gpio_in_pu_slpm_gpio_nopull, PIN_INPUT_PULLUP|PIN_GPIOMODE_ENABLED|PIN_SLPM
45BIAS(gpio_in_pd_slpm_gpio_nopull, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED|PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL); 45BIAS(gpio_in_pd_slpm_gpio_nopull, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED|PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL);
46BIAS(gpio_out_hi, PIN_OUTPUT_HIGH|PIN_GPIOMODE_ENABLED); 46BIAS(gpio_out_hi, PIN_OUTPUT_HIGH|PIN_GPIOMODE_ENABLED);
47BIAS(gpio_out_lo, PIN_OUTPUT_LOW|PIN_GPIOMODE_ENABLED); 47BIAS(gpio_out_lo, PIN_OUTPUT_LOW|PIN_GPIOMODE_ENABLED);
48/* Sleep modes */
49BIAS(sleep_in_wkup_pdis, PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
50BIAS(sleep_out_hi_wkup_pdis, PIN_SLPM_OUTPUT_HIGH|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
51BIAS(sleep_out_wkup_pdis, PIN_SLPM_DIR_OUTPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
48 52
49/* We use these to define hog settings that are always done on boot */ 53/* We use these to define hog settings that are always done on boot */
50#define DB8500_MUX_HOG(group,func) \ 54#define DB8500_MUX_HOG(group,func) \
@@ -58,6 +62,10 @@ BIAS(gpio_out_lo, PIN_OUTPUT_LOW|PIN_GPIOMODE_ENABLED);
58#define DB8500_PIN(pin,conf,dev) \ 62#define DB8500_PIN(pin,conf,dev) \
59 PIN_MAP_CONFIGS_PIN_DEFAULT(dev, "pinctrl-db8500", pin, conf) 63 PIN_MAP_CONFIGS_PIN_DEFAULT(dev, "pinctrl-db8500", pin, conf)
60 64
65#define DB8500_PIN_SLEEP(pin,conf,dev) \
66 PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_SLEEP, "pinctrl-db8500", \
67 pin, conf)
68
61/* Pin control settings */ 69/* Pin control settings */
62static struct pinctrl_map __initdata mop500_family_pinmap[] = { 70static struct pinctrl_map __initdata mop500_family_pinmap[] = {
63 /* 71 /*
@@ -115,6 +123,17 @@ static struct pinctrl_map __initdata mop500_family_pinmap[] = {
115 * converted to the pinctrl model. Here we model them as "default" 123 * converted to the pinctrl model. Here we model them as "default"
116 * states. 124 * states.
117 */ 125 */
126 /* Mux in UART0 after initialization */
127 DB8500_MUX("u0_a_1", "u0", "uart0"),
128 DB8500_PIN("GPIO0_AJ5", in_pu, "uart0"), /* CTS */
129 DB8500_PIN("GPIO1_AJ3", out_hi, "uart0"), /* RTS */
130 DB8500_PIN("GPIO2_AH4", in_pu, "uart0"), /* RXD */
131 DB8500_PIN("GPIO3_AH3", out_hi, "uart0"), /* TXD */
132 /* Sleep state for UART0 */
133 DB8500_PIN_SLEEP("GPIO0_AJ5", sleep_in_wkup_pdis, "uart0"),
134 DB8500_PIN_SLEEP("GPIO1_AJ3", sleep_out_hi_wkup_pdis, "uart0"),
135 DB8500_PIN_SLEEP("GPIO2_AH4", sleep_in_wkup_pdis, "uart0"),
136 DB8500_PIN_SLEEP("GPIO3_AH3", sleep_out_wkup_pdis, "uart0"),
118 /* Mux in LCD data lines 8 thru 11 and LCDA CLK for MCDE TVOUT */ 137 /* Mux in LCD data lines 8 thru 11 and LCDA CLK for MCDE TVOUT */
119 DB8500_MUX("lcd_d8_d11_a_1", "lcd", "mcde-tvout"), 138 DB8500_MUX("lcd_d8_d11_a_1", "lcd", "mcde-tvout"),
120 DB8500_MUX("lcdaclk_b_1", "lcda", "mcde-tvout"), 139 DB8500_MUX("lcdaclk_b_1", "lcda", "mcde-tvout"),
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index e5c0e6e25cf6..1dc31652b97a 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -30,18 +30,17 @@
30#include <linux/smsc911x.h> 30#include <linux/smsc911x.h>
31#include <linux/gpio_keys.h> 31#include <linux/gpio_keys.h>
32#include <linux/delay.h> 32#include <linux/delay.h>
33
34#include <linux/of.h> 33#include <linux/of.h>
35#include <linux/of_platform.h> 34#include <linux/of_platform.h>
36
37#include <linux/leds.h> 35#include <linux/leds.h>
36#include <linux/pinctrl/consumer.h>
37
38#include <asm/mach-types.h> 38#include <asm/mach-types.h>
39#include <asm/mach/arch.h> 39#include <asm/mach/arch.h>
40#include <asm/hardware/gic.h> 40#include <asm/hardware/gic.h>
41 41
42#include <plat/i2c.h> 42#include <plat/i2c.h>
43#include <plat/ste_dma40.h> 43#include <plat/ste_dma40.h>
44#include <plat/pincfg.h>
45#include <plat/gpio-nomadik.h> 44#include <plat/gpio-nomadik.h>
46 45
47#include <mach/hardware.h> 46#include <mach/hardware.h>
@@ -49,7 +48,6 @@
49#include <mach/devices.h> 48#include <mach/devices.h>
50#include <mach/irqs.h> 49#include <mach/irqs.h>
51 50
52#include "pins-db8500.h"
53#include "ste-dma40-db8500.h" 51#include "ste-dma40-db8500.h"
54#include "devices-db8500.h" 52#include "devices-db8500.h"
55#include "board-mop500.h" 53#include "board-mop500.h"
@@ -522,14 +520,6 @@ static struct stedma40_chan_cfg uart2_dma_cfg_tx = {
522}; 520};
523#endif 521#endif
524 522
525
526static pin_cfg_t mop500_pins_uart0[] = {
527 GPIO0_U0_CTSn | PIN_INPUT_PULLUP,
528 GPIO1_U0_RTSn | PIN_OUTPUT_HIGH,
529 GPIO2_U0_RXD | PIN_INPUT_PULLUP,
530 GPIO3_U0_TXD | PIN_OUTPUT_HIGH,
531};
532
533#define PRCC_K_SOFTRST_SET 0x18 523#define PRCC_K_SOFTRST_SET 0x18
534#define PRCC_K_SOFTRST_CLEAR 0x1C 524#define PRCC_K_SOFTRST_CLEAR 0x1C
535static void ux500_uart0_reset(void) 525static void ux500_uart0_reset(void)
@@ -550,24 +540,33 @@ static void ux500_uart0_reset(void)
550 udelay(1); 540 udelay(1);
551} 541}
552 542
543/* This needs to be referenced by callbacks */
544struct pinctrl *u0_p;
545struct pinctrl_state *u0_def;
546struct pinctrl_state *u0_sleep;
547
553static void ux500_uart0_init(void) 548static void ux500_uart0_init(void)
554{ 549{
555 int ret; 550 int ret;
556 551
557 ret = nmk_config_pins(mop500_pins_uart0, 552 if (IS_ERR(u0_p) || IS_ERR(u0_def))
558 ARRAY_SIZE(mop500_pins_uart0)); 553 return;
559 if (ret < 0) 554
560 pr_err("pl011: uart pins_enable failed\n"); 555 ret = pinctrl_select_state(u0_p, u0_def);
556 if (ret)
557 pr_err("could not set UART0 defstate\n");
561} 558}
562 559
563static void ux500_uart0_exit(void) 560static void ux500_uart0_exit(void)
564{ 561{
565 int ret; 562 int ret;
566 563
567 ret = nmk_config_pins_sleep(mop500_pins_uart0, 564 if (IS_ERR(u0_p) || IS_ERR(u0_sleep))
568 ARRAY_SIZE(mop500_pins_uart0)); 565 return;
569 if (ret < 0) 566
570 pr_err("pl011: uart pins_disable failed\n"); 567 ret = pinctrl_select_state(u0_p, u0_sleep);
568 if (ret)
569 pr_err("could not set UART0 idlestate\n");
571} 570}
572 571
573static struct amba_pl011_data uart0_plat = { 572static struct amba_pl011_data uart0_plat = {
@@ -599,7 +598,28 @@ static struct amba_pl011_data uart2_plat = {
599 598
600static void __init mop500_uart_init(struct device *parent) 599static void __init mop500_uart_init(struct device *parent)
601{ 600{
602 db8500_add_uart0(parent, &uart0_plat); 601 struct amba_device *uart0_device;
602
603 uart0_device = db8500_add_uart0(parent, &uart0_plat);
604 if (uart0_device) {
605 u0_p = pinctrl_get(&uart0_device->dev);
606 if (IS_ERR(u0_p))
607 dev_err(&uart0_device->dev,
608 "could not get UART0 pinctrl\n");
609 else {
610 u0_def = pinctrl_lookup_state(u0_p,
611 PINCTRL_STATE_DEFAULT);
612 if (IS_ERR(u0_def)) {
613 dev_err(&uart0_device->dev,
614 "could not get UART0 defstate\n");
615 }
616 u0_sleep = pinctrl_lookup_state(u0_p,
617 PINCTRL_STATE_SLEEP);
618 if (IS_ERR(u0_sleep))
619 dev_err(&uart0_device->dev,
620 "could not get UART0 idlestate\n");
621 }
622 }
603 db8500_add_uart1(parent, &uart1_plat); 623 db8500_add_uart1(parent, &uart1_plat);
604 db8500_add_uart2(parent, &uart2_plat); 624 db8500_add_uart2(parent, &uart2_plat);
605} 625}