diff options
author | Linus Walleij <linus.walleij@linaro.org> | 2013-11-13 04:32:20 -0500 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2013-11-26 15:01:55 -0500 |
commit | 3bfdebbaebed8238ac7fb7934791b0231e0f1e65 (patch) | |
tree | 92b6fa0eedc3a2af47d4dd6d391a1b4570f881a0 /arch/arm/mach-ux500 | |
parent | 618111ca9adc1a871ddcbfd953342e94975c3b34 (diff) |
ARM: ux500: move UART pin control to the device tree
This moves the static, device-tied pin control configuration
out of the board file board-mop500-pins.c and into the device
tree.
We create a new .dtsi-file to be shared between all the
MOP500-related boards, that include all HREF variants and
the Snowball board. Assign pin states for HREF and Snowball
boards alike.
Cc: Lee Jones <lee.jones@linaro.org>
Cc: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/mach-ux500')
-rw-r--r-- | arch/arm/mach-ux500/board-mop500-pins.c | 52 |
1 files changed, 0 insertions, 52 deletions
diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c index 0efb1560fc35..c6225191141f 100644 --- a/arch/arm/mach-ux500/board-mop500-pins.c +++ b/arch/arm/mach-ux500/board-mop500-pins.c | |||
@@ -65,16 +65,12 @@ BIAS(slpm_in_nopull_wkup_pdis, PIN_SLEEPMODE_ENABLED| | |||
65 | PIN_SLPM_INPUT_NOPULL|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); | 65 | PIN_SLPM_INPUT_NOPULL|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); |
66 | BIAS(slpm_in_pu_wkup_pdis_en, PIN_SLEEPMODE_ENABLED|PIN_SLPM_INPUT_PULLUP| | 66 | BIAS(slpm_in_pu_wkup_pdis_en, PIN_SLEEPMODE_ENABLED|PIN_SLPM_INPUT_PULLUP| |
67 | PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_ENABLED); | 67 | PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_ENABLED); |
68 | BIAS(slpm_out_wkup_pdis, PIN_SLEEPMODE_ENABLED| | ||
69 | PIN_SLPM_DIR_OUTPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); | ||
70 | BIAS(out_lo_wkup_pdis, PIN_SLPM_OUTPUT_LOW| | 68 | BIAS(out_lo_wkup_pdis, PIN_SLPM_OUTPUT_LOW| |
71 | PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); | 69 | PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); |
72 | BIAS(in_wkup_pdis_en, PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE| | 70 | BIAS(in_wkup_pdis_en, PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE| |
73 | PIN_SLPM_PDIS_ENABLED); | 71 | PIN_SLPM_PDIS_ENABLED); |
74 | BIAS(in_wkup_pdis, PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE| | 72 | BIAS(in_wkup_pdis, PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE| |
75 | PIN_SLPM_PDIS_DISABLED); | 73 | PIN_SLPM_PDIS_DISABLED); |
76 | BIAS(out_wkup_pdis, PIN_SLPM_DIR_OUTPUT|PIN_SLPM_WAKEUP_ENABLE| | ||
77 | PIN_SLPM_PDIS_DISABLED); | ||
78 | 74 | ||
79 | /* We use these to define hog settings that are always done on boot */ | 75 | /* We use these to define hog settings that are always done on boot */ |
80 | #define DB8500_MUX_HOG(group,func) \ | 76 | #define DB8500_MUX_HOG(group,func) \ |
@@ -376,50 +372,10 @@ static struct pinctrl_map __initdata mop500_family_pinmap[] = { | |||
376 | */ | 372 | */ |
377 | DB8500_PIN_HOG("GPIO218_AH11", gpio_in_pu), | 373 | DB8500_PIN_HOG("GPIO218_AH11", gpio_in_pu), |
378 | /* | 374 | /* |
379 | * UART0, we do not mux in u0 here. | ||
380 | * uart-0 pins gpio configuration should be kept intact to prevent | ||
381 | * a glitch in tx line when the tty dev is opened. Later these pins | ||
382 | * are configured by uart driver | ||
383 | */ | ||
384 | DB8500_PIN_HOG("GPIO0_AJ5", in_pu), /* CTS */ | ||
385 | DB8500_PIN_HOG("GPIO1_AJ3", out_hi), /* RTS */ | ||
386 | DB8500_PIN_HOG("GPIO2_AH4", in_pu), /* RXD */ | ||
387 | DB8500_PIN_HOG("GPIO3_AH3", out_hi), /* TXD */ | ||
388 | /* | ||
389 | * Mux in UART2 on altfunction C and set pull-ups. | ||
390 | * TODO: is this used on U8500 variants and Snowball really? | ||
391 | * The setting on GPIO31 conflicts with magnetometer use on hrefv60 | ||
392 | */ | ||
393 | /* default state for UART2 */ | ||
394 | DB8500_MUX("u2rxtx_c_1", "u2", "uart2"), | ||
395 | DB8500_PIN("GPIO29_W2", in_pu, "uart2"), /* RXD */ | ||
396 | DB8500_PIN("GPIO30_W3", out_hi, "uart2"), /* TXD */ | ||
397 | /* Sleep state for UART2 */ | ||
398 | DB8500_PIN_SLEEP("GPIO29_W2", in_wkup_pdis, "uart2"), | ||
399 | DB8500_PIN_SLEEP("GPIO30_W3", out_wkup_pdis, "uart2"), | ||
400 | /* | ||
401 | * The following pin sets were known as "runtime pins" before being | 375 | * The following pin sets were known as "runtime pins" before being |
402 | * converted to the pinctrl model. Here we model them as "default" | 376 | * converted to the pinctrl model. Here we model them as "default" |
403 | * states. | 377 | * states. |
404 | */ | 378 | */ |
405 | /* Mux in UART0 after initialization */ | ||
406 | DB8500_MUX("u0_a_1", "u0", "uart0"), | ||
407 | DB8500_PIN("GPIO0_AJ5", in_pu, "uart0"), /* CTS */ | ||
408 | DB8500_PIN("GPIO1_AJ3", out_hi, "uart0"), /* RTS */ | ||
409 | DB8500_PIN("GPIO2_AH4", in_pu, "uart0"), /* RXD */ | ||
410 | DB8500_PIN("GPIO3_AH3", out_hi, "uart0"), /* TXD */ | ||
411 | /* Sleep state for UART0 */ | ||
412 | DB8500_PIN_SLEEP("GPIO0_AJ5", slpm_in_wkup_pdis, "uart0"), | ||
413 | DB8500_PIN_SLEEP("GPIO1_AJ3", slpm_out_hi_wkup_pdis, "uart0"), | ||
414 | DB8500_PIN_SLEEP("GPIO2_AH4", slpm_in_wkup_pdis, "uart0"), | ||
415 | DB8500_PIN_SLEEP("GPIO3_AH3", slpm_out_wkup_pdis, "uart0"), | ||
416 | /* Mux in UART1 after initialization */ | ||
417 | DB8500_MUX("u1rxtx_a_1", "u1", "uart1"), | ||
418 | DB8500_PIN("GPIO4_AH6", in_pu, "uart1"), /* RXD */ | ||
419 | DB8500_PIN("GPIO5_AG6", out_hi, "uart1"), /* TXD */ | ||
420 | /* Sleep state for UART1 */ | ||
421 | DB8500_PIN_SLEEP("GPIO4_AH6", slpm_in_wkup_pdis, "uart1"), | ||
422 | DB8500_PIN_SLEEP("GPIO5_AG6", slpm_out_wkup_pdis, "uart1"), | ||
423 | /* MSP1 for ALSA codec */ | 379 | /* MSP1 for ALSA codec */ |
424 | DB8500_MUX_HOG("msp1txrx_a_1", "msp1"), | 380 | DB8500_MUX_HOG("msp1txrx_a_1", "msp1"), |
425 | DB8500_MUX_HOG("msp1_a_1", "msp1"), | 381 | DB8500_MUX_HOG("msp1_a_1", "msp1"), |
@@ -822,10 +778,6 @@ static struct pinctrl_map __initdata mop500_pinmap[] = { | |||
822 | DB8500_PIN_HOG("GPIO7_AG5", in_pu), | 778 | DB8500_PIN_HOG("GPIO7_AG5", in_pu), |
823 | /* TC35892 IRQ, pull up the line, let the driver mux in the pin */ | 779 | /* TC35892 IRQ, pull up the line, let the driver mux in the pin */ |
824 | DB8500_PIN_HOG("GPIO217_AH12", gpio_in_pu), | 780 | DB8500_PIN_HOG("GPIO217_AH12", gpio_in_pu), |
825 | /* Mux in UART1 and set the pull-ups */ | ||
826 | DB8500_MUX_HOG("u1rxtx_a_1", "u1"), | ||
827 | DB8500_PIN_HOG("GPIO4_AH6", in_pu), /* RXD */ | ||
828 | DB8500_PIN_HOG("GPIO5_AG6", out_hi), /* TXD */ | ||
829 | /* | 781 | /* |
830 | * Runtime stuff: make it possible to mux in the SKE keypad | 782 | * Runtime stuff: make it possible to mux in the SKE keypad |
831 | * and bias the pins | 783 | * and bias the pins |
@@ -971,10 +923,6 @@ static struct pinctrl_map __initdata hrefv60_pinmap[] = { | |||
971 | }; | 923 | }; |
972 | 924 | ||
973 | static struct pinctrl_map __initdata u9500_pinmap[] = { | 925 | static struct pinctrl_map __initdata u9500_pinmap[] = { |
974 | /* Mux in UART1 (just RX/TX) and set the pull-ups */ | ||
975 | DB8500_MUX_HOG("u1rxtx_a_1", "u1"), | ||
976 | DB8500_PIN_HOG("GPIO4_AH6", in_pu), | ||
977 | DB8500_PIN_HOG("GPIO5_AG6", out_hi), | ||
978 | /* WLAN_IRQ line */ | 926 | /* WLAN_IRQ line */ |
979 | DB8500_PIN_HOG("GPIO144_B13", gpio_in_pu), | 927 | DB8500_PIN_HOG("GPIO144_B13", gpio_in_pu), |
980 | /* HSI */ | 928 | /* HSI */ |