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authorLinus Walleij <linus.walleij@stericsson.com>2010-08-19 05:27:49 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-09-02 10:46:19 -0400
commitf946738ca882c365a963043de471f45e91ab0a95 (patch)
tree1f4beb6514b94e980e093b0b52bd22189b2563f2 /arch/arm/mach-ux500/include
parent2bfc96a127bc1cc94d26bfaa40159966064f9c8c (diff)
ARM: 6331/1: ux500 cpu/SoC version macros v2
This patch adds support for checking if the digital baseband (DB) System-on-Chip (aka "cpu) ASIC hardware version is 1.0, 1.1 or 2.0. We print the result in the bootlog, the functions are then used for runtime decisions based on hardware version. Signed-off-by: Mattias Wallin <mattias.wallin@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-ux500/include')
-rw-r--r--arch/arm/mach-ux500/include/mach/db8500-regs.h2
-rw-r--r--arch/arm/mach-ux500/include/mach/hardware.h23
-rw-r--r--arch/arm/mach-ux500/include/mach/setup.h7
3 files changed, 28 insertions, 4 deletions
diff --git a/arch/arm/mach-ux500/include/mach/db8500-regs.h b/arch/arm/mach-ux500/include/mach/db8500-regs.h
index f000218210c9..f07d0986409d 100644
--- a/arch/arm/mach-ux500/include/mach/db8500-regs.h
+++ b/arch/arm/mach-ux500/include/mach/db8500-regs.h
@@ -30,8 +30,6 @@
30#define U8500_ICN_BASE 0x81000000 30#define U8500_ICN_BASE 0x81000000
31 31
32#define U8500_BOOT_ROM_BASE 0x90000000 32#define U8500_BOOT_ROM_BASE 0x90000000
33/* ASIC ID is at 0xff4 offset within this region */
34#define U8500_ASIC_ID_BASE 0x9001F000
35 33
36#define U8500_PER6_BASE 0xa03c0000 34#define U8500_PER6_BASE 0xa03c0000
37#define U8500_PER5_BASE 0xa03e0000 35#define U8500_PER5_BASE 0xa03e0000
diff --git a/arch/arm/mach-ux500/include/mach/hardware.h b/arch/arm/mach-ux500/include/mach/hardware.h
index 8656379a8309..32e883a8f2a2 100644
--- a/arch/arm/mach-ux500/include/mach/hardware.h
+++ b/arch/arm/mach-ux500/include/mach/hardware.h
@@ -104,16 +104,35 @@ static inline bool cpu_is_u8500(void)
104#endif 104#endif
105} 105}
106 106
107#define CPUID_DB8500ED 0x410fc090
108#define CPUID_DB8500V1 0x411fc091
109#define CPUID_DB8500V2 0x412fc091
110
107static inline bool cpu_is_u8500ed(void) 111static inline bool cpu_is_u8500ed(void)
108{ 112{
109 return cpu_is_u8500() && (read_cpuid_id() & 15) == 0; 113 return cpu_is_u8500() && (read_cpuid_id() == CPUID_DB8500ED);
110} 114}
111 115
112static inline bool cpu_is_u8500v1(void) 116static inline bool cpu_is_u8500v1(void)
113{ 117{
114 return cpu_is_u8500() && (read_cpuid_id() & 15) == 1; 118 return cpu_is_u8500() && (read_cpuid_id() == CPUID_DB8500V1);
119}
120
121static inline bool cpu_is_u8500v2(void)
122{
123 return cpu_is_u8500() && (read_cpuid_id() == CPUID_DB8500V2);
115} 124}
116 125
126#ifdef CONFIG_UX500_SOC_DB8500
127bool cpu_is_u8500v10(void);
128bool cpu_is_u8500v11(void);
129bool cpu_is_u8500v20(void);
130#else
131static inline bool cpu_is_u8500v10(void) { return false; }
132static inline bool cpu_is_u8500v11(void) { return false; }
133static inline bool cpu_is_u8500v20(void) { return false; }
134#endif
135
117static inline bool cpu_is_u5500(void) 136static inline bool cpu_is_u5500(void)
118{ 137{
119#ifdef CONFIG_UX500_SOC_DB5500 138#ifdef CONFIG_UX500_SOC_DB5500
diff --git a/arch/arm/mach-ux500/include/mach/setup.h b/arch/arm/mach-ux500/include/mach/setup.h
index e978dbd9e210..54bbe648bf58 100644
--- a/arch/arm/mach-ux500/include/mach/setup.h
+++ b/arch/arm/mach-ux500/include/mach/setup.h
@@ -38,4 +38,11 @@ extern struct sys_timer ux500_timer;
38 .type = MT_DEVICE, \ 38 .type = MT_DEVICE, \
39} 39}
40 40
41#define __MEM_DEV_DESC(x, sz) { \
42 .virtual = IO_ADDRESS(x), \
43 .pfn = __phys_to_pfn(x), \
44 .length = sz, \
45 .type = MT_MEMORY, \
46}
47
41#endif /* __ASM_ARCH_SETUP_H */ 48#endif /* __ASM_ARCH_SETUP_H */