ARM: ux500: core U9540 support

This adds support for the U9540 variant of the U8500 series. This
is an application processor without internal modem. This is the
most basic part with ASIC ID, CPU-related fixes, IRQ list, register
ranges, timer, UART, and L2 cache setup. This is based on a patch
by Michel Jaouen which was rewritten to fit with the latest 3.3
kernel.

ChangeLog v1->v2: deleted the irqs-db9540.h file since we expect to
  migrate to using Device Tree for getting the IRQs to devices.
ChangeLog v2->v3: introduced a fixed virtual offset for the ROM
  as suggested by Arnd Bergmann.

Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Sebastien Pasdeloup <sebastien.pasdeloup-nonst@stericsson.com>
Signed-off-by: Michel Jaouen <michel.jaouen@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

1 files changed, 6 insertions, 0 deletions

diff --git a/arch/arm/mach-ux500/include/mach/db8500-regs.h b/arch/arm/mach-ux500/include/mach/db8500-regs.h
index 9ec20b96d8f2..1530d493879d 100644
--- a/arch/arm/mach-ux500/include/mach/db8500-regs.h
+++ b/arch/arm/mach-ux500/include/mach/db8500-regs.h
@@ -41,6 +41,10 @@
 /* ASIC ID is at 0xbf4 offset within this region */
 #define U8500_ASIC_ID_BASE      0x9001D000
 
+#define U9540_BOOT_ROM_BASE     0xFFFE0000
+/* ASIC ID is at 0xbf4 offset within this region */
+#define U9540_ASIC_ID_BASE      0xFFFFD000
+
 #define U8500_PER6_BASE         0xa03c0000
 #define U8500_PER7_BASE         0xa03d0000
 #define U8500_PER5_BASE         0xa03e0000
@@ -96,7 +100,9 @@
 #define U8500_SCR_BASE          (U8500_PER4_BASE + 0x05000)
 #define U8500_DMC_BASE          (U8500_PER4_BASE + 0x06000)
 #define U8500_PRCMU_BASE        (U8500_PER4_BASE + 0x07000)
+#define U9540_DMC1_BASE         (U8500_PER4_BASE + 0x0A000)
 #define U8500_PRCMU_TCDM_BASE   (U8500_PER4_BASE + 0x68000)
+#define U9540_PRCMU_TCDM_BASE   (U8500_PER4_BASE + 0x6A000)
 #define U8500_PRCMU_TCPM_BASE   (U8500_PER4_BASE + 0x60000)
 #define U8500_PRCMU_TIMER_3_BASE (U8500_PER4_BASE + 0x07338)
 #define U8500_PRCMU_TIMER_4_BASE (U8500_PER4_BASE + 0x07450)