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authorLinus Walleij <linus.walleij@stericsson.com>2010-05-27 18:21:26 -0400
committerDan Williams <dan.j.williams@intel.com>2010-05-27 18:21:26 -0400
commit7b8ddb06e54ad98edeb7951f317aee4d1feda9d6 (patch)
treec18c268a0bf1b9eaeb5825d3e84bb3617c6c5fdb /arch/arm/mach-ux500/include/mach/db8500-regs.h
parentb3040e40675ec2c43542331cd30d4ee3dae797e8 (diff)
DMAENGINE: DMA40 U8500 platform configuration
This completes the DMA40 support with the platform-specific configuration for U8500/DB8500. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Reviewed-by: Alessandro Rubini <rubini@unipv.it> Cc: STEricsson_nomadik_linux@list.st.com Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> [fixed up dma40_{tx|rx}_map declaration/initialization] Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'arch/arm/mach-ux500/include/mach/db8500-regs.h')
-rw-r--r--arch/arm/mach-ux500/include/mach/db8500-regs.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/mach-ux500/include/mach/db8500-regs.h b/arch/arm/mach-ux500/include/mach/db8500-regs.h
index 9169e1e382a3..85fc6a80b386 100644
--- a/arch/arm/mach-ux500/include/mach/db8500-regs.h
+++ b/arch/arm/mach-ux500/include/mach/db8500-regs.h
@@ -7,6 +7,18 @@
7#ifndef __MACH_DB8500_REGS_H 7#ifndef __MACH_DB8500_REGS_H
8#define __MACH_DB8500_REGS_H 8#define __MACH_DB8500_REGS_H
9 9
10/* Base address and bank offsets for ESRAM */
11#define U8500_ESRAM_BASE 0x40000000
12#define U8500_ESRAM_BANK_SIZE 0x00020000
13#define U8500_ESRAM_BANK0 U8500_ESRAM_BASE
14#define U8500_ESRAM_BANK1 (U8500_ESRAM_BASE + U8500_ESRAM_BANK_SIZE)
15#define U8500_ESRAM_BANK2 (U8500_ESRAM_BANK1 + U8500_ESRAM_BANK_SIZE)
16#define U8500_ESRAM_BANK3 (U8500_ESRAM_BANK2 + U8500_ESRAM_BANK_SIZE)
17#define U8500_ESRAM_BANK4 (U8500_ESRAM_BANK3 + U8500_ESRAM_BANK_SIZE)
18/* Use bank 4 for DMA LCLA and LCPA */
19#define U8500_DMA_LCLA_BASE U8500_ESRAM_BANK4
20#define U8500_DMA_LCPA_BASE (U8500_ESRAM_BANK4 + 0x4000)
21
10#define U8500_PER3_BASE 0x80000000 22#define U8500_PER3_BASE 0x80000000
11#define U8500_STM_BASE 0x80100000 23#define U8500_STM_BASE 0x80100000
12#define U8500_STM_REG_BASE (U8500_STM_BASE + 0xF000) 24#define U8500_STM_REG_BASE (U8500_STM_BASE + 0xF000)