diff options
author | Linus Walleij <linus.walleij@linaro.org> | 2012-09-18 07:23:02 -0400 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2012-09-27 07:43:14 -0400 |
commit | 4c854723c8bea457d3418ea2f398b6cfbcb3988e (patch) | |
tree | 6f88def0d3ca707fa4a2c5f230069c05c5498106 /arch/arm/mach-ux500/board-mop500-pins.c | |
parent | 0fda8f00c6f4b9b2d3a1e47b3505cd4b0a1aac61 (diff) |
ARM: ux500: tidy up pin sleep modes
This named the sleep mode pin configurations as *slpm* rather
than *sleep* to correspond better with the settings from the
datasheet. It also defines an optional sleep mode for the SPI
controller SPI2.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/mach-ux500/board-mop500-pins.c')
-rw-r--r-- | arch/arm/mach-ux500/board-mop500-pins.c | 47 |
1 files changed, 28 insertions, 19 deletions
diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c index a96b945976e4..8bca81141dea 100644 --- a/arch/arm/mach-ux500/board-mop500-pins.c +++ b/arch/arm/mach-ux500/board-mop500-pins.c | |||
@@ -32,14 +32,14 @@ static enum custom_pin_cfg_t pinsfor; | |||
32 | BIAS(pd, PIN_PULL_DOWN); | 32 | BIAS(pd, PIN_PULL_DOWN); |
33 | BIAS(slpm_gpio_nopull, PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL); | 33 | BIAS(slpm_gpio_nopull, PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL); |
34 | BIAS(in_nopull, PIN_INPUT_NOPULL); | 34 | BIAS(in_nopull, PIN_INPUT_NOPULL); |
35 | BIAS(in_nopull_sleep_nowkup, PIN_INPUT_NOPULL|PIN_SLPM_WAKEUP_DISABLE); | 35 | BIAS(in_nopull_slpm_nowkup, PIN_INPUT_NOPULL|PIN_SLPM_WAKEUP_DISABLE); |
36 | BIAS(in_pu, PIN_INPUT_PULLUP); | 36 | BIAS(in_pu, PIN_INPUT_PULLUP); |
37 | BIAS(in_pd, PIN_INPUT_PULLDOWN); | 37 | BIAS(in_pd, PIN_INPUT_PULLDOWN); |
38 | BIAS(in_pd_slpm_in_pu, PIN_INPUT_PULLDOWN|PIN_SLPM_INPUT_PULLUP); | 38 | BIAS(in_pd_slpm_in_pu, PIN_INPUT_PULLDOWN|PIN_SLPM_INPUT_PULLUP); |
39 | BIAS(in_pu_slpm_out_lo, PIN_INPUT_PULLUP|PIN_SLPM_OUTPUT_LOW); | 39 | BIAS(in_pu_slpm_out_lo, PIN_INPUT_PULLUP|PIN_SLPM_OUTPUT_LOW); |
40 | BIAS(out_hi, PIN_OUTPUT_HIGH); | 40 | BIAS(out_hi, PIN_OUTPUT_HIGH); |
41 | BIAS(out_lo, PIN_OUTPUT_LOW); | 41 | BIAS(out_lo, PIN_OUTPUT_LOW); |
42 | BIAS(out_lo_sleep_nowkup, PIN_OUTPUT_LOW|PIN_SLPM_WAKEUP_DISABLE); | 42 | BIAS(out_lo_slpm_nowkup, PIN_OUTPUT_LOW|PIN_SLPM_WAKEUP_DISABLE); |
43 | /* These also force them into GPIO mode */ | 43 | /* These also force them into GPIO mode */ |
44 | BIAS(gpio_in_pu, PIN_INPUT_PULLUP|PIN_GPIOMODE_ENABLED); | 44 | BIAS(gpio_in_pu, PIN_INPUT_PULLUP|PIN_GPIOMODE_ENABLED); |
45 | BIAS(gpio_in_pd, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED); | 45 | BIAS(gpio_in_pd, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED); |
@@ -48,11 +48,13 @@ BIAS(gpio_in_pd_slpm_gpio_nopull, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED|PIN_SL | |||
48 | BIAS(gpio_out_hi, PIN_OUTPUT_HIGH|PIN_GPIOMODE_ENABLED); | 48 | BIAS(gpio_out_hi, PIN_OUTPUT_HIGH|PIN_GPIOMODE_ENABLED); |
49 | BIAS(gpio_out_lo, PIN_OUTPUT_LOW|PIN_GPIOMODE_ENABLED); | 49 | BIAS(gpio_out_lo, PIN_OUTPUT_LOW|PIN_GPIOMODE_ENABLED); |
50 | /* Sleep modes */ | 50 | /* Sleep modes */ |
51 | BIAS(sleep_in_wkup_pdis, PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); | 51 | BIAS(slpm_in_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); |
52 | BIAS(sleep_in_nopull_wkup, PIN_INPUT_NOPULL|PIN_SLPM_WAKEUP_ENABLE); | 52 | BIAS(slpm_in_nopull_wkup, PIN_SLEEPMODE_ENABLED|PIN_SLPM_DIR_INPUT|PIN_SLPM_PULL_NONE|PIN_SLPM_WAKEUP_ENABLE); |
53 | BIAS(sleep_out_hi_wkup_pdis, PIN_SLPM_OUTPUT_HIGH|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); | 53 | BIAS(slpm_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); |
54 | BIAS(sleep_out_lo_wkup, PIN_OUTPUT_LOW|PIN_SLPM_WAKEUP_ENABLE); | 54 | BIAS(slpm_out_hi_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_OUTPUT_HIGH|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); |
55 | BIAS(sleep_out_wkup_pdis, PIN_SLPM_DIR_OUTPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); | 55 | BIAS(slpm_out_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); |
56 | BIAS(slpm_out_lo_wkup, PIN_SLEEPMODE_ENABLED|PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_ENABLE); | ||
57 | BIAS(slpm_out_lo_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); | ||
56 | 58 | ||
57 | /* We use these to define hog settings that are always done on boot */ | 59 | /* We use these to define hog settings that are always done on boot */ |
58 | #define DB8500_MUX_HOG(group,func) \ | 60 | #define DB8500_MUX_HOG(group,func) \ |
@@ -65,6 +67,9 @@ BIAS(sleep_out_wkup_pdis, PIN_SLPM_DIR_OUTPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PD | |||
65 | PIN_MAP_MUX_GROUP_DEFAULT(dev, "pinctrl-db8500", group, func) | 67 | PIN_MAP_MUX_GROUP_DEFAULT(dev, "pinctrl-db8500", group, func) |
66 | #define DB8500_PIN(pin,conf,dev) \ | 68 | #define DB8500_PIN(pin,conf,dev) \ |
67 | PIN_MAP_CONFIGS_PIN_DEFAULT(dev, "pinctrl-db8500", pin, conf) | 69 | PIN_MAP_CONFIGS_PIN_DEFAULT(dev, "pinctrl-db8500", pin, conf) |
70 | #define DB8500_PIN_SLEEP(pin, conf, dev) \ | ||
71 | PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_SLEEP, "pinctrl-db8500", \ | ||
72 | pin, conf) | ||
68 | 73 | ||
69 | #define DB8500_PIN_SLEEP(pin,conf,dev) \ | 74 | #define DB8500_PIN_SLEEP(pin,conf,dev) \ |
70 | PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_SLEEP, "pinctrl-db8500", \ | 75 | PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_SLEEP, "pinctrl-db8500", \ |
@@ -134,22 +139,22 @@ static struct pinctrl_map __initdata mop500_family_pinmap[] = { | |||
134 | DB8500_PIN("GPIO2_AH4", in_pu, "uart0"), /* RXD */ | 139 | DB8500_PIN("GPIO2_AH4", in_pu, "uart0"), /* RXD */ |
135 | DB8500_PIN("GPIO3_AH3", out_hi, "uart0"), /* TXD */ | 140 | DB8500_PIN("GPIO3_AH3", out_hi, "uart0"), /* TXD */ |
136 | /* UART0 sleep state */ | 141 | /* UART0 sleep state */ |
137 | DB8500_PIN_SLEEP("GPIO0_AJ5", sleep_in_wkup_pdis, "uart0"), | 142 | DB8500_PIN_SLEEP("GPIO0_AJ5", slpm_in_wkup_pdis, "uart0"), |
138 | DB8500_PIN_SLEEP("GPIO1_AJ3", sleep_out_hi_wkup_pdis, "uart0"), | 143 | DB8500_PIN_SLEEP("GPIO1_AJ3", slpm_out_hi_wkup_pdis, "uart0"), |
139 | DB8500_PIN_SLEEP("GPIO2_AH4", sleep_in_wkup_pdis, "uart0"), | 144 | DB8500_PIN_SLEEP("GPIO2_AH4", slpm_in_wkup_pdis, "uart0"), |
140 | DB8500_PIN_SLEEP("GPIO3_AH3", sleep_out_wkup_pdis, "uart0"), | 145 | DB8500_PIN_SLEEP("GPIO3_AH3", slpm_out_wkup_pdis, "uart0"), |
141 | /* MSP1 for ALSA codec */ | 146 | /* MSP1 for ALSA codec */ |
142 | DB8500_MUX("msp1txrx_a_1", "msp1", "ux500-msp-i2s.1"), | 147 | DB8500_MUX("msp1txrx_a_1", "msp1", "ux500-msp-i2s.1"), |
143 | DB8500_MUX("msp1_a_1", "msp1", "ux500-msp-i2s.1"), | 148 | DB8500_MUX("msp1_a_1", "msp1", "ux500-msp-i2s.1"), |
144 | DB8500_PIN("GPIO33_AF2", out_lo_sleep_nowkup, "ux500-msp-i2s.1"), | 149 | DB8500_PIN("GPIO33_AF2", out_lo_slpm_nowkup, "ux500-msp-i2s.1"), |
145 | DB8500_PIN("GPIO34_AE1", in_nopull_sleep_nowkup, "ux500-msp-i2s.1"), | 150 | DB8500_PIN("GPIO34_AE1", in_nopull_slpm_nowkup, "ux500-msp-i2s.1"), |
146 | DB8500_PIN("GPIO35_AE2", in_nopull_sleep_nowkup, "ux500-msp-i2s.1"), | 151 | DB8500_PIN("GPIO35_AE2", in_nopull_slpm_nowkup, "ux500-msp-i2s.1"), |
147 | DB8500_PIN("GPIO36_AG2", in_nopull_sleep_nowkup, "ux500-msp-i2s.1"), | 152 | DB8500_PIN("GPIO36_AG2", in_nopull_slpm_nowkup, "ux500-msp-i2s.1"), |
148 | /* MSP1 sleep state */ | 153 | /* MSP1 sleep state */ |
149 | DB8500_PIN_SLEEP("GPIO33_AF2", sleep_out_lo_wkup, "ux500-msp-i2s.1"), | 154 | DB8500_PIN_SLEEP("GPIO33_AF2", slpm_out_lo_wkup, "ux500-msp-i2s.1"), |
150 | DB8500_PIN_SLEEP("GPIO34_AE1", sleep_in_nopull_wkup, "ux500-msp-i2s.1"), | 155 | DB8500_PIN_SLEEP("GPIO34_AE1", slpm_in_nopull_wkup, "ux500-msp-i2s.1"), |
151 | DB8500_PIN_SLEEP("GPIO35_AE2", sleep_in_nopull_wkup, "ux500-msp-i2s.1"), | 156 | DB8500_PIN_SLEEP("GPIO35_AE2", slpm_in_nopull_wkup, "ux500-msp-i2s.1"), |
152 | DB8500_PIN_SLEEP("GPIO36_AG2", sleep_in_nopull_wkup, "ux500-msp-i2s.1"), | 157 | DB8500_PIN_SLEEP("GPIO36_AG2", slpm_in_nopull_wkup, "ux500-msp-i2s.1"), |
153 | /* Mux in LCD data lines 8 thru 11 and LCDA CLK for MCDE TVOUT */ | 158 | /* Mux in LCD data lines 8 thru 11 and LCDA CLK for MCDE TVOUT */ |
154 | DB8500_MUX("lcd_d8_d11_a_1", "lcd", "mcde-tvout"), | 159 | DB8500_MUX("lcd_d8_d11_a_1", "lcd", "mcde-tvout"), |
155 | DB8500_MUX("lcdaclk_b_1", "lcda", "mcde-tvout"), | 160 | DB8500_MUX("lcdaclk_b_1", "lcda", "mcde-tvout"), |
@@ -224,6 +229,10 @@ static struct pinctrl_map __initdata mop500_family_pinmap[] = { | |||
224 | DB8500_PIN("GPIO218_AH11", in_pd, "spi2"), /* RXD */ | 229 | DB8500_PIN("GPIO218_AH11", in_pd, "spi2"), /* RXD */ |
225 | DB8500_PIN("GPIO215_AH13", out_lo, "spi2"), /* TXD */ | 230 | DB8500_PIN("GPIO215_AH13", out_lo, "spi2"), /* TXD */ |
226 | DB8500_PIN("GPIO217_AH12", out_lo, "spi2"), /* CLK */ | 231 | DB8500_PIN("GPIO217_AH12", out_lo, "spi2"), /* CLK */ |
232 | /* SPI2 sleep state */ | ||
233 | DB8500_PIN_SLEEP("GPIO218_AH11", slpm_in_wkup_pdis, "spi2"), /* RXD */ | ||
234 | DB8500_PIN_SLEEP("GPIO215_AH13", slpm_out_lo_wkup_pdis, "spi2"), /* TXD */ | ||
235 | DB8500_PIN_SLEEP("GPIO217_AH12", slpm_wkup_pdis, "spi2"), /* CLK */ | ||
227 | }; | 236 | }; |
228 | 237 | ||
229 | /* | 238 | /* |