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authorLinus Walleij <linus.walleij@linaro.org>2012-10-17 07:16:46 -0400
committerLinus Walleij <linus.walleij@linaro.org>2012-11-11 13:06:01 -0500
commitd4a31ee8997b2fbd82837182363cf8fa84abf347 (patch)
tree64a6563c9fc0f7444a039ad99dffa609ceba21dd /arch/arm/mach-u300
parent604bb7da77803cc01366c85fd5bcbc88b6dbe33a (diff)
ARM: U300: bump IRQs to offset 32
The U300 IRQs were bumped once to offset to 1 (in order to avoid using IRQ 0 which is now NO_IRQ). This was OK as we were still passing the number of irqs in the .nr_irqs field of the machine, with descriptors allocated at boot time. However .nr_irqs should be 0, leading the system to reserve the first 16 IRQs. Then the VIC driver will complain that IRQs 1 thru 15 are pre-allocated, so to avoid this and use free descriptors, move all IRQs up to offset 32. This will all be done away with as we migrate to device tree, so it is an interim solution. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/mach-u300')
-rw-r--r--arch/arm/mach-u300/core.c2
-rw-r--r--arch/arm/mach-u300/include/mach/irqs.h116
2 files changed, 59 insertions, 59 deletions
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index b8efac4daed8..603c08ec8786 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -1804,7 +1804,7 @@ MACHINE_START(U300, "Ericsson AB U335 S335/B335 Prototype Board")
1804 /* Maintainer: Linus Walleij <linus.walleij@stericsson.com> */ 1804 /* Maintainer: Linus Walleij <linus.walleij@stericsson.com> */
1805 .atag_offset = 0x100, 1805 .atag_offset = 0x100,
1806 .map_io = u300_map_io, 1806 .map_io = u300_map_io,
1807 .nr_irqs = NR_IRQS_U300, 1807 .nr_irqs = 0,
1808 .init_irq = u300_init_irq, 1808 .init_irq = u300_init_irq,
1809 .handle_irq = vic_handle_irq, 1809 .handle_irq = vic_handle_irq,
1810 .timer = &u300_timer, 1810 .timer = &u300_timer,
diff --git a/arch/arm/mach-u300/include/mach/irqs.h b/arch/arm/mach-u300/include/mach/irqs.h
index e27425a63fa1..e85ec3868d04 100644
--- a/arch/arm/mach-u300/include/mach/irqs.h
+++ b/arch/arm/mach-u300/include/mach/irqs.h
@@ -12,70 +12,70 @@
12#ifndef __MACH_IRQS_H 12#ifndef __MACH_IRQS_H
13#define __MACH_IRQS_H 13#define __MACH_IRQS_H
14 14
15#define IRQ_U300_INTCON0_START 1 15#define IRQ_U300_INTCON0_START 32
16#define IRQ_U300_INTCON1_START 33 16#define IRQ_U300_INTCON1_START 64
17/* These are on INTCON0 - 30 lines */ 17/* These are on INTCON0 - 30 lines */
18#define IRQ_U300_IRQ0_EXT 1 18#define IRQ_U300_IRQ0_EXT 32
19#define IRQ_U300_IRQ1_EXT 2 19#define IRQ_U300_IRQ1_EXT 33
20#define IRQ_U300_DMA 3 20#define IRQ_U300_DMA 34
21#define IRQ_U300_VIDEO_ENC_0 4 21#define IRQ_U300_VIDEO_ENC_0 35
22#define IRQ_U300_VIDEO_ENC_1 5 22#define IRQ_U300_VIDEO_ENC_1 36
23#define IRQ_U300_AAIF_RX 6 23#define IRQ_U300_AAIF_RX 37
24#define IRQ_U300_AAIF_TX 7 24#define IRQ_U300_AAIF_TX 38
25#define IRQ_U300_AAIF_VGPIO 8 25#define IRQ_U300_AAIF_VGPIO 39
26#define IRQ_U300_AAIF_WAKEUP 9 26#define IRQ_U300_AAIF_WAKEUP 40
27#define IRQ_U300_PCM_I2S0_FRAME 10 27#define IRQ_U300_PCM_I2S0_FRAME 41
28#define IRQ_U300_PCM_I2S0_FIFO 11 28#define IRQ_U300_PCM_I2S0_FIFO 42
29#define IRQ_U300_PCM_I2S1_FRAME 12 29#define IRQ_U300_PCM_I2S1_FRAME 43
30#define IRQ_U300_PCM_I2S1_FIFO 13 30#define IRQ_U300_PCM_I2S1_FIFO 44
31#define IRQ_U300_XGAM_GAMCON 14 31#define IRQ_U300_XGAM_GAMCON 45
32#define IRQ_U300_XGAM_CDI 15 32#define IRQ_U300_XGAM_CDI 46
33#define IRQ_U300_XGAM_CDICON 16 33#define IRQ_U300_XGAM_CDICON 47
34#define IRQ_U300_XGAM_PDI 18 34#define IRQ_U300_XGAM_PDI 49
35#define IRQ_U300_XGAM_PDICON 19 35#define IRQ_U300_XGAM_PDICON 50
36#define IRQ_U300_XGAM_GAMEACC 20 36#define IRQ_U300_XGAM_GAMEACC 51
37#define IRQ_U300_XGAM_MCIDCT 21 37#define IRQ_U300_XGAM_MCIDCT 52
38#define IRQ_U300_APEX 22 38#define IRQ_U300_APEX 53
39#define IRQ_U300_UART0 23 39#define IRQ_U300_UART0 54
40#define IRQ_U300_SPI 24 40#define IRQ_U300_SPI 55
41#define IRQ_U300_TIMER_APP_OS 25 41#define IRQ_U300_TIMER_APP_OS 56
42#define IRQ_U300_TIMER_APP_DD 26 42#define IRQ_U300_TIMER_APP_DD 57
43#define IRQ_U300_TIMER_APP_GP1 27 43#define IRQ_U300_TIMER_APP_GP1 58
44#define IRQ_U300_TIMER_APP_GP2 28 44#define IRQ_U300_TIMER_APP_GP2 59
45#define IRQ_U300_TIMER_OS 29 45#define IRQ_U300_TIMER_OS 60
46#define IRQ_U300_TIMER_MS 30 46#define IRQ_U300_TIMER_MS 61
47#define IRQ_U300_KEYPAD_KEYBF 31 47#define IRQ_U300_KEYPAD_KEYBF 62
48#define IRQ_U300_KEYPAD_KEYBR 32 48#define IRQ_U300_KEYPAD_KEYBR 63
49/* These are on INTCON1 - 32 lines */ 49/* These are on INTCON1 - 32 lines */
50#define IRQ_U300_GPIO_PORT0 33 50#define IRQ_U300_GPIO_PORT0 64
51#define IRQ_U300_GPIO_PORT1 34 51#define IRQ_U300_GPIO_PORT1 65
52#define IRQ_U300_GPIO_PORT2 35 52#define IRQ_U300_GPIO_PORT2 66
53 53
54/* These are for DB3150, DB3200 and DB3350 */ 54/* These are for DB3150, DB3200 and DB3350 */
55#define IRQ_U300_WDOG 36 55#define IRQ_U300_WDOG 67
56#define IRQ_U300_EVHIST 37 56#define IRQ_U300_EVHIST 68
57#define IRQ_U300_MSPRO 38 57#define IRQ_U300_MSPRO 69
58#define IRQ_U300_MMCSD_MCIINTR0 39 58#define IRQ_U300_MMCSD_MCIINTR0 70
59#define IRQ_U300_MMCSD_MCIINTR1 40 59#define IRQ_U300_MMCSD_MCIINTR1 71
60#define IRQ_U300_I2C0 41 60#define IRQ_U300_I2C0 72
61#define IRQ_U300_I2C1 42 61#define IRQ_U300_I2C1 73
62#define IRQ_U300_RTC 43 62#define IRQ_U300_RTC 74
63#define IRQ_U300_NFIF 44 63#define IRQ_U300_NFIF 75
64#define IRQ_U300_NFIF2 45 64#define IRQ_U300_NFIF2 76
65 65
66/* The DB3350-specific interrupt lines */ 66/* The DB3350-specific interrupt lines */
67#define IRQ_U300_ISP_F0 46 67#define IRQ_U300_ISP_F0 77
68#define IRQ_U300_ISP_F1 47 68#define IRQ_U300_ISP_F1 78
69#define IRQ_U300_ISP_F2 48 69#define IRQ_U300_ISP_F2 79
70#define IRQ_U300_ISP_F3 49 70#define IRQ_U300_ISP_F3 80
71#define IRQ_U300_ISP_F4 50 71#define IRQ_U300_ISP_F4 81
72#define IRQ_U300_GPIO_PORT3 51 72#define IRQ_U300_GPIO_PORT3 82
73#define IRQ_U300_SYSCON_PLL_LOCK 52 73#define IRQ_U300_SYSCON_PLL_LOCK 83
74#define IRQ_U300_UART1 53 74#define IRQ_U300_UART1 84
75#define IRQ_U300_GPIO_PORT4 54 75#define IRQ_U300_GPIO_PORT4 85
76#define IRQ_U300_GPIO_PORT5 55 76#define IRQ_U300_GPIO_PORT5 86
77#define IRQ_U300_GPIO_PORT6 56 77#define IRQ_U300_GPIO_PORT6 87
78#define U300_VIC_IRQS_END 57 78#define U300_VIC_IRQS_END 88
79 79
80/* Maximum 8*7 GPIO lines */ 80/* Maximum 8*7 GPIO lines */
81#ifdef CONFIG_PINCTRL_COH901 81#ifdef CONFIG_PINCTRL_COH901