Merge branch 'clksrc' into devel

Conflicts:
	arch/arm/mach-vexpress/v2m.c
	arch/arm/plat-omap/counter_32k.c
	arch/arm/plat-versatile/Makefile

1 files changed, 25 insertions, 6 deletions

diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c
index 9057d6fd1d31..7b8ad1f98f44 100644
--- a/arch/arm/mach-tegra/timer.c
+++ b/arch/arm/mach-tegra/timer.c
@@ -18,6 +18,7 @@
  */
 
 #include <linux/init.h>
+#include <linux/sched.h>
 #include <linux/time.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
@@ -25,10 +26,10 @@
 #include <linux/clocksource.h>
 #include <linux/clk.h>
 #include <linux/io.h>
-#include <linux/cnt32_to_63.h>
 
 #include <asm/mach/time.h>
 #include <asm/localtimer.h>
+#include <asm/sched_clock.h>
 
 #include <mach/iomap.h>
 #include <mach/irqs.h>
@@ -91,7 +92,7 @@ static void tegra_timer_set_mode(enum clock_event_mode mode,
 
 static cycle_t tegra_clocksource_read(struct clocksource *cs)
 {
-        return cnt32_to_63(timer_readl(TIMERUS_CNTR_1US));
+        return timer_readl(TIMERUS_CNTR_1US);
 }
 
 static struct clock_event_device tegra_clockevent = {
@@ -106,14 +107,29 @@ static struct clocksource tegra_clocksource = {
         .name   = "timer_us",
         .rating = 300,
         .read   = tegra_clocksource_read,
-        .mask   = 0x7FFFFFFFFFFFFFFFULL,
+        .mask   = CLOCKSOURCE_MASK(32),
         .flags  = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
-unsigned long long sched_clock(void)
+static DEFINE_CLOCK_DATA(cd);
+
+/*
+ * Constants generated by clocks_calc_mult_shift(m, s, 1MHz, NSEC_PER_SEC, 60).
+ * This gives a resolution of about 1us and a wrap period of about 1h11min.
+ */
+#define SC_MULT         4194304000u
+#define SC_SHIFT        22
+
+unsigned long long notrace sched_clock(void)
 {
-        return clocksource_cyc2ns(tegra_clocksource.read(&tegra_clocksource),
-                tegra_clocksource.mult, tegra_clocksource.shift);
+        u32 cyc = timer_readl(TIMERUS_CNTR_1US);
+        return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
+}
+
+static void notrace tegra_update_sched_clock(void)
+{
+        u32 cyc = timer_readl(TIMERUS_CNTR_1US);
+        update_sched_clock(&cd, cyc, (u32)~0);
 }
 
 static irqreturn_t tegra_timer_interrupt(int irq, void *dev_id)
@@ -158,6 +174,9 @@ static void __init tegra_init_timer(void)
                 WARN(1, "Unknown clock rate");
         }
 
+        init_fixed_sched_clock(&cd, tegra_update_sched_clock, 32,
+                               1000000, SC_MULT, SC_SHIFT);
+
         if (clocksource_register_hz(&tegra_clocksource, 1000000)) {
                 printk(KERN_ERR "Failed to register clocksource\n");
                 BUG();