diff options
author | Ingo Molnar <mingo@elte.hu> | 2011-04-01 15:14:04 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2011-04-01 15:14:04 -0400 |
commit | 5679027e74126e0dfc860869b0e7ceab1dd06318 (patch) | |
tree | 9a18b1a2f53be3bad8c9e4db01617fb51f067f64 /arch/arm/mach-tegra | |
parent | ccd0d44fad38dc1bb4b26dcc7a30e9f2c3b36870 (diff) | |
parent | a4dd99250dc49031e6a92a895dbcc230a4832083 (diff) |
Merge branch 'rcu/urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-2.6-rcu into core/urgent
Diffstat (limited to 'arch/arm/mach-tegra')
-rw-r--r-- | arch/arm/mach-tegra/gpio.c | 39 | ||||
-rw-r--r-- | arch/arm/mach-tegra/irq.c | 5 |
2 files changed, 12 insertions, 32 deletions
diff --git a/arch/arm/mach-tegra/gpio.c b/arch/arm/mach-tegra/gpio.c index 12090a2cf3e0..76a3f654220f 100644 --- a/arch/arm/mach-tegra/gpio.c +++ b/arch/arm/mach-tegra/gpio.c | |||
@@ -208,9 +208,9 @@ static int tegra_gpio_irq_set_type(struct irq_data *d, unsigned int type) | |||
208 | spin_unlock_irqrestore(&bank->lvl_lock[port], flags); | 208 | spin_unlock_irqrestore(&bank->lvl_lock[port], flags); |
209 | 209 | ||
210 | if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) | 210 | if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) |
211 | __set_irq_handler_unlocked(d->irq, handle_level_irq); | 211 | __irq_set_handler_locked(d->irq, handle_level_irq); |
212 | else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) | 212 | else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) |
213 | __set_irq_handler_unlocked(d->irq, handle_edge_irq); | 213 | __irq_set_handler_locked(d->irq, handle_edge_irq); |
214 | 214 | ||
215 | return 0; | 215 | return 0; |
216 | } | 216 | } |
@@ -224,7 +224,7 @@ static void tegra_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
224 | 224 | ||
225 | desc->irq_data.chip->irq_ack(&desc->irq_data); | 225 | desc->irq_data.chip->irq_ack(&desc->irq_data); |
226 | 226 | ||
227 | bank = get_irq_data(irq); | 227 | bank = irq_get_handler_data(irq); |
228 | 228 | ||
229 | for (port = 0; port < 4; port++) { | 229 | for (port = 0; port < 4; port++) { |
230 | int gpio = tegra_gpio_compose(bank->bank, port, 0); | 230 | int gpio = tegra_gpio_compose(bank->bank, port, 0); |
@@ -275,13 +275,6 @@ void tegra_gpio_resume(void) | |||
275 | } | 275 | } |
276 | 276 | ||
277 | local_irq_restore(flags); | 277 | local_irq_restore(flags); |
278 | |||
279 | for (i = INT_GPIO_BASE; i < (INT_GPIO_BASE + TEGRA_NR_GPIOS); i++) { | ||
280 | struct irq_desc *desc = irq_to_desc(i); | ||
281 | if (!desc || (desc->status & IRQ_WAKEUP)) | ||
282 | continue; | ||
283 | enable_irq(i); | ||
284 | } | ||
285 | } | 278 | } |
286 | 279 | ||
287 | void tegra_gpio_suspend(void) | 280 | void tegra_gpio_suspend(void) |
@@ -289,18 +282,6 @@ void tegra_gpio_suspend(void) | |||
289 | unsigned long flags; | 282 | unsigned long flags; |
290 | int b, p, i; | 283 | int b, p, i; |
291 | 284 | ||
292 | for (i = INT_GPIO_BASE; i < (INT_GPIO_BASE + TEGRA_NR_GPIOS); i++) { | ||
293 | struct irq_desc *desc = irq_to_desc(i); | ||
294 | if (!desc) | ||
295 | continue; | ||
296 | if (desc->status & IRQ_WAKEUP) { | ||
297 | int gpio = i - INT_GPIO_BASE; | ||
298 | pr_debug("gpio %d.%d is wakeup\n", gpio/8, gpio&7); | ||
299 | continue; | ||
300 | } | ||
301 | disable_irq(i); | ||
302 | } | ||
303 | |||
304 | local_irq_save(flags); | 285 | local_irq_save(flags); |
305 | for (b = 0; b < ARRAY_SIZE(tegra_gpio_banks); b++) { | 286 | for (b = 0; b < ARRAY_SIZE(tegra_gpio_banks); b++) { |
306 | struct tegra_gpio_bank *bank = &tegra_gpio_banks[b]; | 287 | struct tegra_gpio_bank *bank = &tegra_gpio_banks[b]; |
@@ -320,7 +301,7 @@ void tegra_gpio_suspend(void) | |||
320 | static int tegra_gpio_wake_enable(struct irq_data *d, unsigned int enable) | 301 | static int tegra_gpio_wake_enable(struct irq_data *d, unsigned int enable) |
321 | { | 302 | { |
322 | struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d); | 303 | struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d); |
323 | return set_irq_wake(bank->irq, enable); | 304 | return irq_set_irq_wake(bank->irq, enable); |
324 | } | 305 | } |
325 | #endif | 306 | #endif |
326 | 307 | ||
@@ -359,18 +340,18 @@ static int __init tegra_gpio_init(void) | |||
359 | for (i = INT_GPIO_BASE; i < (INT_GPIO_BASE + TEGRA_NR_GPIOS); i++) { | 340 | for (i = INT_GPIO_BASE; i < (INT_GPIO_BASE + TEGRA_NR_GPIOS); i++) { |
360 | bank = &tegra_gpio_banks[GPIO_BANK(irq_to_gpio(i))]; | 341 | bank = &tegra_gpio_banks[GPIO_BANK(irq_to_gpio(i))]; |
361 | 342 | ||
362 | lockdep_set_class(&irq_desc[i].lock, &gpio_lock_class); | 343 | irq_set_lockdep_class(i, &gpio_lock_class); |
363 | set_irq_chip_data(i, bank); | 344 | irq_set_chip_data(i, bank); |
364 | set_irq_chip(i, &tegra_gpio_irq_chip); | 345 | irq_set_chip_and_handler(i, &tegra_gpio_irq_chip, |
365 | set_irq_handler(i, handle_simple_irq); | 346 | handle_simple_irq); |
366 | set_irq_flags(i, IRQF_VALID); | 347 | set_irq_flags(i, IRQF_VALID); |
367 | } | 348 | } |
368 | 349 | ||
369 | for (i = 0; i < ARRAY_SIZE(tegra_gpio_banks); i++) { | 350 | for (i = 0; i < ARRAY_SIZE(tegra_gpio_banks); i++) { |
370 | bank = &tegra_gpio_banks[i]; | 351 | bank = &tegra_gpio_banks[i]; |
371 | 352 | ||
372 | set_irq_chained_handler(bank->irq, tegra_gpio_irq_handler); | 353 | irq_set_chained_handler(bank->irq, tegra_gpio_irq_handler); |
373 | set_irq_data(bank->irq, bank); | 354 | irq_set_handler_data(bank->irq, bank); |
374 | 355 | ||
375 | for (j = 0; j < 4; j++) | 356 | for (j = 0; j < 4; j++) |
376 | spin_lock_init(&bank->lvl_lock[j]); | 357 | spin_lock_init(&bank->lvl_lock[j]); |
diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c index dfbc219ea492..4330d8995b27 100644 --- a/arch/arm/mach-tegra/irq.c +++ b/arch/arm/mach-tegra/irq.c | |||
@@ -144,7 +144,7 @@ void __init tegra_init_irq(void) | |||
144 | gic_init(0, 29, IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE), | 144 | gic_init(0, 29, IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE), |
145 | IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100)); | 145 | IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100)); |
146 | 146 | ||
147 | gic = get_irq_chip(29); | 147 | gic = irq_get_chip(29); |
148 | tegra_gic_unmask_irq = gic->irq_unmask; | 148 | tegra_gic_unmask_irq = gic->irq_unmask; |
149 | tegra_gic_mask_irq = gic->irq_mask; | 149 | tegra_gic_mask_irq = gic->irq_mask; |
150 | tegra_gic_ack_irq = gic->irq_ack; | 150 | tegra_gic_ack_irq = gic->irq_ack; |
@@ -154,8 +154,7 @@ void __init tegra_init_irq(void) | |||
154 | 154 | ||
155 | for (i = 0; i < INT_MAIN_NR; i++) { | 155 | for (i = 0; i < INT_MAIN_NR; i++) { |
156 | irq = INT_PRI_BASE + i; | 156 | irq = INT_PRI_BASE + i; |
157 | set_irq_chip(irq, &tegra_irq); | 157 | irq_set_chip_and_handler(irq, &tegra_irq, handle_level_irq); |
158 | set_irq_handler(irq, handle_level_irq); | ||
159 | set_irq_flags(irq, IRQF_VALID); | 158 | set_irq_flags(irq, IRQF_VALID); |
160 | } | 159 | } |
161 | } | 160 | } |