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authorJoseph Lo <josephl@nvidia.com>2013-07-03 05:50:38 -0400
committerStephen Warren <swarren@nvidia.com>2013-07-19 12:08:05 -0400
commitac2527bfc21739b77d687df1bfc4e973103fef7b (patch)
treee217d872db97681d551caf07f38129a8f3fa473f /arch/arm/mach-tegra/sleep-tegra30.S
parentc04c77540a4f996ee94d0240bbae3a7512febd37 (diff)
ARM: tegra: add a flag for tegra_disable_clean_inv_dcache to do LoUIS or ALL
Adding a flag for tegra_disable_clean_inv_dcache to flush cache as LoUIS or ALL. After this patch, the v7_flush_dcache_louis is used for CPU hotplug and CPU suspend in CPU power down (e.g. CPU idle power-down mode) case. And the v7_flush_dcache_all is used for CPU cluster power down (e.g. suspend to LP2 mode). Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/sleep-tegra30.S')
-rw-r--r--arch/arm/mach-tegra/sleep-tegra30.S1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/sleep-tegra30.S b/arch/arm/mach-tegra/sleep-tegra30.S
index 5877f268fa97..6744161475b2 100644
--- a/arch/arm/mach-tegra/sleep-tegra30.S
+++ b/arch/arm/mach-tegra/sleep-tegra30.S
@@ -137,6 +137,7 @@ ENTRY(tegra30_sleep_cpu_secondary_finish)
137 mov r7, lr 137 mov r7, lr
138 138
139 /* Flush and disable the L1 data cache */ 139 /* Flush and disable the L1 data cache */
140 mov r0, #TEGRA_FLUSH_CACHE_LOUIS
140 bl tegra_disable_clean_inv_dcache 141 bl tegra_disable_clean_inv_dcache
141 142
142 /* Powergate this CPU. */ 143 /* Powergate this CPU. */