Merge tag 'tegra-for-3.12-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc

From: Stephen Warren:
ARM: tegra: core SoC enhancements for 3.12

This branch includes a number of enhancements to core SoC support for
Tegra devices. The major new features are:

* Adds a new CPU-power-gated cpuidle state for Tegra114.
* Adds initial system suspend support for Tegra114, initially supporting
  just CPU-power-gating during suspend.
* Adds "LP1" suspend mode support for all of Tegra20/30/114. This mode
  both gates CPU power, and places the DRAM into self-refresh mode.
* A new DT-driven PCIe driver to Tegra20/30. The driver is also moved
  from arch/arm/mach-tegra/ to drivers/pci/host/.

The PCIe driver work depends on the following tag from Thomas Petazzoni:
git://git.infradead.org/linux-mvebu.git mis-3.12.2
... which is merged into the middle of this pull request.

* tag 'tegra-for-3.12-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (33 commits)
  ARM: tegra: disable LP2 cpuidle state if PCIe is enabled
  MAINTAINERS: Add myself as Tegra PCIe maintainer
  PCI: tegra: set up PADS_REFCLK_CFG1
  PCI: tegra: Add Tegra 30 PCIe support
  PCI: tegra: Move PCIe driver to drivers/pci/host
  PCI: msi: add default MSI operations for !HAVE_GENERIC_HARDIRQS platforms
  ARM: tegra: add LP1 suspend support for Tegra114
  ARM: tegra: add LP1 suspend support for Tegra20
  ARM: tegra: add LP1 suspend support for Tegra30
  ARM: tegra: add common LP1 suspend support
  clk: tegra114: add LP1 suspend/resume support
  ARM: tegra: config the polarity of the request of sys clock
  ARM: tegra: add common resume handling code for LP1 resuming
  ARM: pci: add ->add_bus() and ->remove_bus() hooks to hw_pci
  of: pci: add registry of MSI chips
  PCI: Introduce new MSI chip infrastructure
  PCI: remove ARCH_SUPPORTS_MSI kconfig option
  PCI: use weak functions for MSI arch-specific functions
  ARM: tegra: unify Tegra's Kconfig a bit more
  ARM: tegra: remove the limitation that Tegra114 can't support suspend
  ...

Signed-off-by: Kevin Hilman <khilman@linaro.org>

1 files changed, 138 insertions, 10 deletions

diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c
index 261fec140c06..ed294a04e1d3 100644
--- a/arch/arm/mach-tegra/pm.c
+++ b/arch/arm/mach-tegra/pm.c
@@ -37,12 +37,18 @@
 #include "reset.h"
 #include "flowctrl.h"
 #include "fuse.h"
+#include "pm.h"
 #include "pmc.h"
 #include "sleep.h"
 
 #ifdef CONFIG_PM_SLEEP
 static DEFINE_SPINLOCK(tegra_lp2_lock);
+static u32 iram_save_size;
+static void *iram_save_addr;
+struct tegra_lp1_iram tegra_lp1_iram;
 void (*tegra_tear_down_cpu)(void);
+void (*tegra_sleep_core_finish)(unsigned long v2p);
+static int (*tegra_sleep_func)(unsigned long v2p);
 
 static void tegra_tear_down_cpu_init(void)
 {
@@ -52,7 +58,9 @@ static void tegra_tear_down_cpu_init(void)
                         tegra_tear_down_cpu = tegra20_tear_down_cpu;
                 break;
         case TEGRA30:
-                if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC))
+        case TEGRA114:
+                if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC) ||
+                    IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC))
                         tegra_tear_down_cpu = tegra30_tear_down_cpu;
                 break;
         }
@@ -171,19 +179,109 @@ void tegra_idle_lp2_last(void)
 enum tegra_suspend_mode tegra_pm_validate_suspend_mode(
                                 enum tegra_suspend_mode mode)
 {
-        /* Tegra114 didn't support any suspending mode yet. */
-        if (tegra_chip_id == TEGRA114)
-                return TEGRA_SUSPEND_NONE;
-
         /*
-         * The Tegra devices only support suspending to LP2 currently.
+         * The Tegra devices support suspending to LP1 or lower currently.
          */
-        if (mode > TEGRA_SUSPEND_LP2)
-                return TEGRA_SUSPEND_LP2;
+        if (mode > TEGRA_SUSPEND_LP1)
+                return TEGRA_SUSPEND_LP1;
 
         return mode;
 }
 
+static int tegra_sleep_core(unsigned long v2p)
+{
+        setup_mm_for_reboot();
+        tegra_sleep_core_finish(v2p);
+
+        /* should never here */
+        BUG();
+
+        return 0;
+}
+
+/*
+ * tegra_lp1_iram_hook
+ *
+ * Hooking the address of LP1 reset vector and SDRAM self-refresh code in
+ * SDRAM. These codes not be copied to IRAM in this fuction. We need to
+ * copy these code to IRAM before LP0/LP1 suspend and restore the content
+ * of IRAM after resume.
+ */
+static bool tegra_lp1_iram_hook(void)
+{
+        switch (tegra_chip_id) {
+        case TEGRA20:
+                if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC))
+                        tegra20_lp1_iram_hook();
+                break;
+        case TEGRA30:
+        case TEGRA114:
+                if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC) ||
+                    IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC))
+                        tegra30_lp1_iram_hook();
+                break;
+        default:
+                break;
+        }
+
+        if (!tegra_lp1_iram.start_addr || !tegra_lp1_iram.end_addr)
+                return false;
+
+        iram_save_size = tegra_lp1_iram.end_addr - tegra_lp1_iram.start_addr;
+        iram_save_addr = kmalloc(iram_save_size, GFP_KERNEL);
+        if (!iram_save_addr)
+                return false;
+
+        return true;
+}
+
+static bool tegra_sleep_core_init(void)
+{
+        switch (tegra_chip_id) {
+        case TEGRA20:
+                if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC))
+                        tegra20_sleep_core_init();
+                break;
+        case TEGRA30:
+        case TEGRA114:
+                if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC) ||
+                    IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC))
+                        tegra30_sleep_core_init();
+                break;
+        default:
+                break;
+        }
+
+        if (!tegra_sleep_core_finish)
+                return false;
+
+        return true;
+}
+
+static void tegra_suspend_enter_lp1(void)
+{
+        tegra_pmc_suspend();
+
+        /* copy the reset vector & SDRAM shutdown code into IRAM */
+        memcpy(iram_save_addr, IO_ADDRESS(TEGRA_IRAM_CODE_AREA),
+                iram_save_size);
+        memcpy(IO_ADDRESS(TEGRA_IRAM_CODE_AREA), tegra_lp1_iram.start_addr,
+                iram_save_size);
+
+        *((u32 *)tegra_cpu_lp1_mask) = 1;
+}
+
+static void tegra_suspend_exit_lp1(void)
+{
+        tegra_pmc_resume();
+
+        /* restore IRAM */
+        memcpy(IO_ADDRESS(TEGRA_IRAM_CODE_AREA), iram_save_addr,
+                iram_save_size);
+
+        *(u32 *)tegra_cpu_lp1_mask = 0;
+}
+
 static const char *lp_state[TEGRA_MAX_SUSPEND_MODE] = {
         [TEGRA_SUSPEND_NONE] = "none",
         [TEGRA_SUSPEND_LP2] = "LP2",
@@ -207,6 +305,9 @@ static int tegra_suspend_enter(suspend_state_t state)
 
         suspend_cpu_complex();
         switch (mode) {
+        case TEGRA_SUSPEND_LP1:
+                tegra_suspend_enter_lp1();
+                break;
         case TEGRA_SUSPEND_LP2:
                 tegra_set_cpu_in_lp2();
                 break;
@@ -214,9 +315,12 @@ static int tegra_suspend_enter(suspend_state_t state)
                 break;
         }
 
-        cpu_suspend(PHYS_OFFSET - PAGE_OFFSET, &tegra_sleep_cpu);
+        cpu_suspend(PHYS_OFFSET - PAGE_OFFSET, tegra_sleep_func);
 
         switch (mode) {
+        case TEGRA_SUSPEND_LP1:
+                tegra_suspend_exit_lp1();
+                break;
         case TEGRA_SUSPEND_LP2:
                 tegra_clear_cpu_in_lp2();
                 break;
@@ -237,12 +341,36 @@ static const struct platform_suspend_ops tegra_suspend_ops = {
 
 void __init tegra_init_suspend(void)
 {
-        if (tegra_pmc_get_suspend_mode() == TEGRA_SUSPEND_NONE)
+        enum tegra_suspend_mode mode = tegra_pmc_get_suspend_mode();
+
+        if (mode == TEGRA_SUSPEND_NONE)
                 return;
 
         tegra_tear_down_cpu_init();
         tegra_pmc_suspend_init();
 
+        if (mode >= TEGRA_SUSPEND_LP1) {
+                if (!tegra_lp1_iram_hook() || !tegra_sleep_core_init()) {
+                        pr_err("%s: unable to allocate memory for SDRAM"
+                               "self-refresh -- LP0/LP1 unavailable\n",
+                               __func__);
+                        tegra_pmc_set_suspend_mode(TEGRA_SUSPEND_LP2);
+                        mode = TEGRA_SUSPEND_LP2;
+                }
+        }
+
+        /* set up sleep function for cpu_suspend */
+        switch (mode) {
+        case TEGRA_SUSPEND_LP1:
+                tegra_sleep_func = tegra_sleep_core;
+                break;
+        case TEGRA_SUSPEND_LP2:
+                tegra_sleep_func = tegra_sleep_cpu;
+                break;
+        default:
+                break;
+        }
+
         suspend_set_ops(&tegra_suspend_ops);
 }
 #endif