Merge branch 'for-3.5/usb-ulpi' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/drivers

By Stephen Warren (30) and others
via Stephen Warren
* 'for-3.5/usb-ulpi' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (7 commits)
  ARM: dt: tegra: pinmux changes for USB ULPI
  ARM: tegra: add USB ULPI PHY reset GPIO to device tree
  ARM: tegra: don't hard-code USB ULPI PHY reset_gpio
  ARM: tegra: change pll_p_out4's rate to 24MHz
  ARM: tegra: fix pclk rate
  ARM: tegra: reparent sclk to pll_c_out1
  ARM: tegra: Add pllc clock init table
  + depends/pinctrl/mergebase branch

Pinctrl mergebase has a conflict in drivers/pinctrl/core.c that was resolved.

Signed-off-by: Olof Johansson <olof@lixom.net>

1 files changed, 6 insertions, 4 deletions

diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index 22df10fb9972..f18f615aa93a 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -82,10 +82,12 @@ static __initdata struct tegra_clk_init_table tegra20_clk_init_table[] = {
         { "pll_p_out1", "pll_p",        28800000,       true },
         { "pll_p_out2", "pll_p",        48000000,       true },
         { "pll_p_out3", "pll_p",        72000000,       true },
-        { "pll_p_out4", "pll_p",        108000000,      true },
-        { "sclk",       "pll_p_out4",   108000000,      true },
-        { "hclk",       "sclk",         108000000,      true },
-        { "pclk",       "hclk",         54000000,       true },
+        { "pll_p_out4", "pll_p",        24000000,       true },
+        { "pll_c",      "clk_m",        600000000,      true },
+        { "pll_c_out1", "pll_c",        120000000,      true },
+        { "sclk",       "pll_c_out1",   120000000,      true },
+        { "hclk",       "sclk",         120000000,      true },
+        { "pclk",       "hclk",         60000000,       true },
         { "csite",      NULL,           0,              true },
         { "emc",        NULL,           0,              true },
         { "cpu",        NULL,           0,              true },