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authorColin Cross <ccross@android.com>2011-02-21 20:10:14 -0500
committerColin Cross <ccross@android.com>2011-02-22 14:25:12 -0500
commit0cf6230af909a86f81907455eca2a5c9b8f68fe6 (patch)
tree9e22caea8b2bdb4db0ea1998683214bf6a34cd39 /arch/arm/mach-tegra/board-trimslice.c
parent1be3d0537516fa42825406b4bc1291b77ed62614 (diff)
ARM: tegra: Move tegra_common_init to tegra_init_early
Move tegra_common_init to tegra_init_early, and set it as the init_early entry in the machine struct. Initializes the clocks earlier so that timers can enable their clocks. Also reorders the members in the Harmony and Trimslice boards' machine structs to match the order they are called in. Signed-off-by: Colin Cross <ccross@android.com> Acked-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-tegra/board-trimslice.c')
-rw-r--r--arch/arm/mach-tegra/board-trimslice.c7
1 files changed, 3 insertions, 4 deletions
diff --git a/arch/arm/mach-tegra/board-trimslice.c b/arch/arm/mach-tegra/board-trimslice.c
index ef233b28022d..0f3081a97126 100644
--- a/arch/arm/mach-tegra/board-trimslice.c
+++ b/arch/arm/mach-tegra/board-trimslice.c
@@ -85,8 +85,6 @@ subsys_initcall(tegra_trimslice_pci_init);
85 85
86static void __init tegra_trimslice_init(void) 86static void __init tegra_trimslice_init(void)
87{ 87{
88 tegra_common_init();
89
90 tegra_clk_init_from_table(trimslice_clk_init_table); 88 tegra_clk_init_from_table(trimslice_clk_init_table);
91 89
92 trimslice_pinmux_init(); 90 trimslice_pinmux_init();
@@ -97,8 +95,9 @@ static void __init tegra_trimslice_init(void)
97MACHINE_START(TRIMSLICE, "trimslice") 95MACHINE_START(TRIMSLICE, "trimslice")
98 .boot_params = 0x00000100, 96 .boot_params = 0x00000100,
99 .fixup = tegra_trimslice_fixup, 97 .fixup = tegra_trimslice_fixup,
100 .init_irq = tegra_init_irq,
101 .init_machine = tegra_trimslice_init,
102 .map_io = tegra_map_common_io, 98 .map_io = tegra_map_common_io,
99 .init_early = tegra_init_early,
100 .init_irq = tegra_init_irq,
103 .timer = &tegra_timer, 101 .timer = &tegra_timer,
102 .init_machine = tegra_trimslice_init,
104MACHINE_END 103MACHINE_END