Merge tag 'drivers-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver changes from Olof Johansson:
 "A handful of driver-related changes.  We've had a bunch of them going
  in through other branches as well, so it's only a part of what we
  really have this release.

  Larger pieces are:

   - Removal of a now unused PWM driver for atmel
     [ This includes AVR32 changes that have been appropriately acked ]
   - Performance counter support for the arm CCN interconnect
   - OMAP mailbox driver cleanups and consolidation
   - PCI and SATA PHY drivers for SPEAr 13xx platforms
   - Redefinition (with backwards compatibility!) of PCI DT bindings for
     Tegra to better model regulators/power"

Note: this merge also fixes up the semantic conflict with the new
calling convention for devm_phy_create(), see commit f0ed817638b5 ("phy:
core: Let node ptr of PHY point to PHY and not of PHY provider") that
came in through Greg's USB tree.

Semantic merge patch by Stephen Rothwell <sfr@canb.auug.org.au> through
the next tree.

* tag 'drivers-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (38 commits)
  bus: arm-ccn: Fix error handling at event allocation
  mailbox/omap: add a parent structure for every IP instance
  mailbox/omap: remove the private mailbox structure
  mailbox/omap: consolidate OMAP mailbox driver
  mailbox/omap: simplify the fifo assignment by using macros
  mailbox/omap: remove omap_mbox_type_t from mailbox ops
  mailbox/omap: remove OMAP1 mailbox driver
  mailbox/omap: use devm_* interfaces
  bus: ARM CCN: add PERF_EVENTS dependency
  bus: ARM CCN PMU driver
  PCI: spear: Remove spear13xx_pcie_remove()
  PCI: spear: Fix Section mismatch compilation warning for probe()
  ARM: tegra: Remove legacy PCIe power supply properties
  PCI: tegra: Remove deprecated power supply properties
  PCI: tegra: Implement accurate power supply scheme
  ARM: SPEAr13xx: Update defconfigs
  ARM: SPEAr13xx: Add pcie and miphy DT nodes
  ARM: SPEAr13xx: Add bindings and dt node for misc block
  ARM: SPEAr13xx: Fix static mapping table
  phy: Add drivers for PCIe and SATA phy on SPEAr13xx
  ...

4 files changed, 8 insertions, 127 deletions

diff --git a/arch/arm/mach-spear/Kconfig b/arch/arm/mach-spear/Kconfig
index 90df2022276a..6fd4dc88160b 100644
--- a/arch/arm/mach-spear/Kconfig
+++ b/arch/arm/mach-spear/Kconfig
@@ -19,6 +19,8 @@ config ARCH_SPEAR13XX
         select HAVE_ARM_SCU if SMP
         select HAVE_ARM_TWD if SMP
         select PINCTRL
+        select MFD_SYSCON
+        select MIGHT_HAVE_PCI
         help
           Supports for ARM's SPEAR13XX family
 
@@ -27,12 +29,14 @@ if ARCH_SPEAR13XX
 config MACH_SPEAR1310
         bool "SPEAr1310 Machine support with Device Tree"
         select PINCTRL_SPEAR1310
+        select PHY_ST_SPEAR1310_MIPHY
         help
           Supports ST SPEAr1310 machine configured via the device-tree
 
 config MACH_SPEAR1340
         bool "SPEAr1340 Machine support with Device Tree"
         select PINCTRL_SPEAR1340
+        select PHY_ST_SPEAR1340_MIPHY
         help
           Supports ST SPEAr1340 machine configured via the device-tree
 
diff --git a/arch/arm/mach-spear/include/mach/spear.h b/arch/arm/mach-spear/include/mach/spear.h
index 5cdc53d9b653..f2d6a0176575 100644
--- a/arch/arm/mach-spear/include/mach/spear.h
+++ b/arch/arm/mach-spear/include/mach/spear.h
@@ -52,10 +52,10 @@
 #ifdef CONFIG_ARCH_SPEAR13XX
 
 #define PERIP_GRP2_BASE                         UL(0xB3000000)
-#define VA_PERIP_GRP2_BASE                      IOMEM(0xFE000000)
+#define VA_PERIP_GRP2_BASE                      IOMEM(0xF9000000)
 #define MCIF_SDHCI_BASE                         UL(0xB3000000)
 #define SYSRAM0_BASE                            UL(0xB3800000)
-#define VA_SYSRAM0_BASE                         IOMEM(0xFE800000)
+#define VA_SYSRAM0_BASE                         IOMEM(0xF9800000)
 #define SYS_LOCATION                            (VA_SYSRAM0_BASE + 0x600)
 
 #define PERIP_GRP1_BASE                         UL(0xE0000000)
diff --git a/arch/arm/mach-spear/spear1340.c b/arch/arm/mach-spear/spear1340.c
index c601799b4aea..3f3c0f124bd3 100644
--- a/arch/arm/mach-spear/spear1340.c
+++ b/arch/arm/mach-spear/spear1340.c
@@ -13,136 +13,13 @@
 
 #define pr_fmt(fmt) "SPEAr1340: " fmt
 
-#include <linux/ahci_platform.h>
-#include <linux/amba/serial.h>
-#include <linux/delay.h>
 #include <linux/of_platform.h>
 #include <asm/mach/arch.h>
 #include "generic.h"
-#include <mach/spear.h>
-
-/* FIXME: Move SATA PHY code into a standalone driver */
-
-/* Base addresses */
-#define SPEAR1340_SATA_BASE                     UL(0xB1000000)
-
-/* Power Management Registers */
-#define SPEAR1340_PCM_CFG                       (VA_MISC_BASE + 0x100)
-#define SPEAR1340_PCM_WKUP_CFG                  (VA_MISC_BASE + 0x104)
-#define SPEAR1340_SWITCH_CTR                    (VA_MISC_BASE + 0x108)
-
-#define SPEAR1340_PERIP1_SW_RST                 (VA_MISC_BASE + 0x318)
-#define SPEAR1340_PERIP2_SW_RST                 (VA_MISC_BASE + 0x31C)
-#define SPEAR1340_PERIP3_SW_RST                 (VA_MISC_BASE + 0x320)
-
-/* PCIE - SATA configuration registers */
-#define SPEAR1340_PCIE_SATA_CFG                 (VA_MISC_BASE + 0x424)
-        /* PCIE CFG MASks */
-        #define SPEAR1340_PCIE_CFG_DEVICE_PRESENT       (1 << 11)
-        #define SPEAR1340_PCIE_CFG_POWERUP_RESET        (1 << 10)
-        #define SPEAR1340_PCIE_CFG_CORE_CLK_EN          (1 << 9)
-        #define SPEAR1340_PCIE_CFG_AUX_CLK_EN           (1 << 8)
-        #define SPEAR1340_SATA_CFG_TX_CLK_EN            (1 << 4)
-        #define SPEAR1340_SATA_CFG_RX_CLK_EN            (1 << 3)
-        #define SPEAR1340_SATA_CFG_POWERUP_RESET        (1 << 2)
-        #define SPEAR1340_SATA_CFG_PM_CLK_EN            (1 << 1)
-        #define SPEAR1340_PCIE_SATA_SEL_PCIE            (0)
-        #define SPEAR1340_PCIE_SATA_SEL_SATA            (1)
-        #define SPEAR1340_SATA_PCIE_CFG_MASK            0xF1F
-        #define SPEAR1340_PCIE_CFG_VAL  (SPEAR1340_PCIE_SATA_SEL_PCIE | \
-                        SPEAR1340_PCIE_CFG_AUX_CLK_EN | \
-                        SPEAR1340_PCIE_CFG_CORE_CLK_EN | \
-                        SPEAR1340_PCIE_CFG_POWERUP_RESET | \
-                        SPEAR1340_PCIE_CFG_DEVICE_PRESENT)
-        #define SPEAR1340_SATA_CFG_VAL  (SPEAR1340_PCIE_SATA_SEL_SATA | \
-                        SPEAR1340_SATA_CFG_PM_CLK_EN | \
-                        SPEAR1340_SATA_CFG_POWERUP_RESET | \
-                        SPEAR1340_SATA_CFG_RX_CLK_EN | \
-                        SPEAR1340_SATA_CFG_TX_CLK_EN)
-
-#define SPEAR1340_PCIE_MIPHY_CFG                (VA_MISC_BASE + 0x428)
-        #define SPEAR1340_MIPHY_OSC_BYPASS_EXT          (1 << 31)
-        #define SPEAR1340_MIPHY_CLK_REF_DIV2            (1 << 27)
-        #define SPEAR1340_MIPHY_CLK_REF_DIV4            (2 << 27)
-        #define SPEAR1340_MIPHY_CLK_REF_DIV8            (3 << 27)
-        #define SPEAR1340_MIPHY_PLL_RATIO_TOP(x)        (x << 0)
-        #define SPEAR1340_PCIE_SATA_MIPHY_CFG_SATA \
-                        (SPEAR1340_MIPHY_OSC_BYPASS_EXT | \
-                        SPEAR1340_MIPHY_CLK_REF_DIV2 | \
-                        SPEAR1340_MIPHY_PLL_RATIO_TOP(60))
-        #define SPEAR1340_PCIE_SATA_MIPHY_CFG_SATA_25M_CRYSTAL_CLK \
-                        (SPEAR1340_MIPHY_PLL_RATIO_TOP(120))
-        #define SPEAR1340_PCIE_SATA_MIPHY_CFG_PCIE \
-                        (SPEAR1340_MIPHY_OSC_BYPASS_EXT | \
-                        SPEAR1340_MIPHY_PLL_RATIO_TOP(25))
-
-/* SATA device registration */
-static int sata_miphy_init(struct device *dev, void __iomem *addr)
-{
-        writel(SPEAR1340_SATA_CFG_VAL, SPEAR1340_PCIE_SATA_CFG);
-        writel(SPEAR1340_PCIE_SATA_MIPHY_CFG_SATA_25M_CRYSTAL_CLK,
-                        SPEAR1340_PCIE_MIPHY_CFG);
-        /* Switch on sata power domain */
-        writel((readl(SPEAR1340_PCM_CFG) | (0x800)), SPEAR1340_PCM_CFG);
-        msleep(20);
-        /* Disable PCIE SATA Controller reset */
-        writel((readl(SPEAR1340_PERIP1_SW_RST) & (~0x1000)),
-                        SPEAR1340_PERIP1_SW_RST);
-        msleep(20);
-
-        return 0;
-}
-
-static void sata_miphy_exit(struct device *dev)
-{
-        writel(0, SPEAR1340_PCIE_SATA_CFG);
-        writel(0, SPEAR1340_PCIE_MIPHY_CFG);
-
-        /* Enable PCIE SATA Controller reset */
-        writel((readl(SPEAR1340_PERIP1_SW_RST) | (0x1000)),
-                        SPEAR1340_PERIP1_SW_RST);
-        msleep(20);
-        /* Switch off sata power domain */
-        writel((readl(SPEAR1340_PCM_CFG) & (~0x800)), SPEAR1340_PCM_CFG);
-        msleep(20);
-}
-
-static int sata_suspend(struct device *dev)
-{
-        if (dev->power.power_state.event == PM_EVENT_FREEZE)
-                return 0;
-
-        sata_miphy_exit(dev);
-
-        return 0;
-}
-
-static int sata_resume(struct device *dev)
-{
-        if (dev->power.power_state.event == PM_EVENT_THAW)
-                return 0;
-
-        return sata_miphy_init(dev, NULL);
-}
-
-static struct ahci_platform_data sata_pdata = {
-        .init = sata_miphy_init,
-        .exit = sata_miphy_exit,
-        .suspend = sata_suspend,
-        .resume = sata_resume,
-};
-
-/* Add SPEAr1340 auxdata to pass platform data */
-static struct of_dev_auxdata spear1340_auxdata_lookup[] __initdata = {
-        OF_DEV_AUXDATA("snps,spear-ahci", SPEAR1340_SATA_BASE, NULL,
-                        &sata_pdata),
-        {}
-};
 
 static void __init spear1340_dt_init(void)
 {
-        of_platform_populate(NULL, of_default_bus_match_table,
-                        spear1340_auxdata_lookup, NULL);
+        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
         platform_device_register_simple("spear-cpufreq", -1, NULL, 0);
 }
 
diff --git a/arch/arm/mach-spear/spear13xx.c b/arch/arm/mach-spear/spear13xx.c
index 8b56fe61a492..2e463a93468d 100644
--- a/arch/arm/mach-spear/spear13xx.c
+++ b/arch/arm/mach-spear/spear13xx.c
@@ -52,7 +52,7 @@ void __init spear13xx_l2x0_init(void)
 /*
  * Following will create 16MB static virtual/physical mappings
  * PHYSICAL             VIRTUAL
- * 0xB3000000           0xFE000000
+ * 0xB3000000           0xF9000000
  * 0xE0000000           0xFD000000
  * 0xEC000000           0xFC000000
  * 0xED000000           0xFB000000