diff options
author | Arnd Bergmann <arnd@arndb.de> | 2012-12-02 08:45:27 -0500 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2013-03-12 12:39:31 -0400 |
commit | d42799b7827bcb92c47de26f900e75885bcb447b (patch) | |
tree | 2b62140f15e332adcf0c86613fb1397fb5d301a1 /arch/arm/mach-spear6xx/include | |
parent | 83f230f1121051d58603640535d0384a01605f6c (diff) |
ARM: spear: make spear3xx/6xx mach/spear.h files identical
The two files are almost identical already basically just differ
in the identifier names. By changing the identifiers to be the
same, we are able to merge the two as a preparation to building
a combined kernel.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Diffstat (limited to 'arch/arm/mach-spear6xx/include')
-rw-r--r-- | arch/arm/mach-spear6xx/include/mach/misc_regs.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-spear6xx/include/mach/spear.h | 61 |
2 files changed, 38 insertions, 25 deletions
diff --git a/arch/arm/mach-spear6xx/include/mach/misc_regs.h b/arch/arm/mach-spear6xx/include/mach/misc_regs.h index c34acc201d34..28aa508cb94d 100644 --- a/arch/arm/mach-spear6xx/include/mach/misc_regs.h +++ b/arch/arm/mach-spear6xx/include/mach/misc_regs.h | |||
@@ -16,7 +16,7 @@ | |||
16 | 16 | ||
17 | #include <mach/spear.h> | 17 | #include <mach/spear.h> |
18 | 18 | ||
19 | #define MISC_BASE IOMEM(VA_SPEAR6XX_ICM3_MISC_REG_BASE) | 19 | #define MISC_BASE IOMEM(VA_SPEAR_ICM3_MISC_REG_BASE) |
20 | #define DMA_CHN_CFG (MISC_BASE + 0x0A0) | 20 | #define DMA_CHN_CFG (MISC_BASE + 0x0A0) |
21 | 21 | ||
22 | #endif /* __MACH_MISC_REGS_H */ | 22 | #endif /* __MACH_MISC_REGS_H */ |
diff --git a/arch/arm/mach-spear6xx/include/mach/spear.h b/arch/arm/mach-spear6xx/include/mach/spear.h index cb8ed2f4dc85..ee5a774caae1 100644 --- a/arch/arm/mach-spear6xx/include/mach/spear.h +++ b/arch/arm/mach-spear6xx/include/mach/spear.h | |||
@@ -1,46 +1,59 @@ | |||
1 | /* | 1 | /* |
2 | * arch/arm/mach-spear6xx/include/mach/spear.h | 2 | * SPEAr3xx/6xx Machine family specific definition |
3 | * | 3 | * |
4 | * SPEAr6xx Machine family specific definition | 4 | * Copyright (C) 2009,2012 ST Microelectronics |
5 | * | ||
6 | * Copyright (C) 2009 ST Microelectronics | ||
7 | * Rajeev Kumar<rajeev-dlh.kumar@st.com> | 5 | * Rajeev Kumar<rajeev-dlh.kumar@st.com> |
6 | * Viresh Kumar <viresh.linux@gmail.com> | ||
8 | * | 7 | * |
9 | * This file is licensed under the terms of the GNU General Public | 8 | * This file is licensed under the terms of the GNU General Public |
10 | * License version 2. This program is licensed "as is" without any | 9 | * License version 2. This program is licensed "as is" without any |
11 | * warranty of any kind, whether express or implied. | 10 | * warranty of any kind, whether express or implied. |
12 | */ | 11 | */ |
13 | 12 | ||
14 | #ifndef __MACH_SPEAR6XX_H | 13 | #ifndef __MACH_SPEAR_H |
15 | #define __MACH_SPEAR6XX_H | 14 | #define __MACH_SPEAR_H |
16 | 15 | ||
17 | #include <asm/memory.h> | 16 | #include <asm/memory.h> |
18 | 17 | ||
19 | /* ICM1 - Low speed connection */ | 18 | /* ICM1 - Low speed connection */ |
20 | #define SPEAR6XX_ICM1_BASE UL(0xD0000000) | 19 | #define SPEAR_ICM1_2_BASE UL(0xD0000000) |
21 | #define VA_SPEAR6XX_ICM1_BASE UL(0xFD000000) | 20 | #define VA_SPEAR_ICM1_2_BASE UL(0xFD000000) |
22 | #define SPEAR6XX_ICM1_UART0_BASE UL(0xD0000000) | 21 | #define SPEAR_ICM1_UART_BASE UL(0xD0000000) |
23 | #define VA_SPEAR6XX_ICM1_UART0_BASE (VA_SPEAR6XX_ICM1_2_BASE | SPEAR6XX_ICM1_UART0_BASE) | 22 | #define VA_SPEAR_ICM1_UART_BASE (VA_SPEAR_ICM1_2_BASE | SPEAR_ICM1_UART_BASE) |
23 | #define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000) | ||
24 | 24 | ||
25 | /* ML-1, 2 - Multi Layer CPU Subsystem */ | 25 | /* ML-1, 2 - Multi Layer CPU Subsystem */ |
26 | #define SPEAR6XX_ML_CPU_BASE UL(0xF0000000) | 26 | #define SPEAR_ICM3_ML1_2_BASE UL(0xF0000000) |
27 | #define VA_SPEAR6XX_ML_CPU_BASE UL(0xF0000000) | 27 | #define VA_SPEAR6XX_ML_CPU_BASE UL(0xF0000000) |
28 | 28 | ||
29 | /* ICM3 - Basic Subsystem */ | 29 | /* ICM3 - Basic Subsystem */ |
30 | #define SPEAR6XX_ICM3_SMI_CTRL_BASE UL(0xFC000000) | 30 | #define SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000) |
31 | #define VA_SPEAR6XX_ICM3_SMI_CTRL_BASE UL(0xFC000000) | 31 | #define VA_SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000) |
32 | #define SPEAR6XX_ICM3_DMA_BASE UL(0xFC400000) | 32 | #define SPEAR_ICM3_DMA_BASE UL(0xFC400000) |
33 | #define SPEAR6XX_ICM3_SYS_CTRL_BASE UL(0xFCA00000) | 33 | #define SPEAR_ICM3_SYS_CTRL_BASE UL(0xFCA00000) |
34 | #define VA_SPEAR6XX_ICM3_SYS_CTRL_BASE (VA_SPEAR6XX_ICM3_SMI_CTRL_BASE | SPEAR6XX_ICM3_SYS_CTRL_BASE) | 34 | #define VA_SPEAR_ICM3_SYS_CTRL_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE | SPEAR_ICM3_SYS_CTRL_BASE) |
35 | #define SPEAR6XX_ICM3_MISC_REG_BASE UL(0xFCA80000) | 35 | #define SPEAR_ICM3_MISC_REG_BASE UL(0xFCA80000) |
36 | #define VA_SPEAR6XX_ICM3_MISC_REG_BASE (VA_SPEAR6XX_ICM3_SMI_CTRL_BASE | SPEAR6XX_ICM3_MISC_REG_BASE) | 36 | #define VA_SPEAR_ICM3_MISC_REG_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE | SPEAR_ICM3_MISC_REG_BASE) |
37 | 37 | ||
38 | /* Debug uart for linux, will be used for debug and uncompress messages */ | 38 | /* Debug uart for linux, will be used for debug and uncompress messages */ |
39 | #define SPEAR_DBG_UART_BASE SPEAR6XX_ICM1_UART0_BASE | 39 | #define SPEAR_DBG_UART_BASE SPEAR_ICM1_UART_BASE |
40 | #define VA_SPEAR_DBG_UART_BASE VA_SPEAR6XX_ICM1_UART0_BASE | 40 | #define VA_SPEAR_DBG_UART_BASE VA_SPEAR_ICM1_UART_BASE |
41 | 41 | ||
42 | /* Sysctl base for spear platform */ | 42 | /* Sysctl base for spear platform */ |
43 | #define SPEAR_SYS_CTRL_BASE SPEAR6XX_ICM3_SYS_CTRL_BASE | 43 | #define SPEAR_SYS_CTRL_BASE SPEAR_ICM3_SYS_CTRL_BASE |
44 | #define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR6XX_ICM3_SYS_CTRL_BASE | 44 | #define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR_ICM3_SYS_CTRL_BASE |
45 | 45 | ||
46 | #endif /* __MACH_SPEAR6XX_H */ | 46 | /* SPEAr320 Macros */ |
47 | #define SPEAR320_SOC_CONFIG_BASE UL(0xB3000000) | ||
48 | #define VA_SPEAR320_SOC_CONFIG_BASE UL(0xFE000000) | ||
49 | #define SPEAR320_CONTROL_REG IOMEM(VA_SPEAR320_SOC_CONFIG_BASE) | ||
50 | #define SPEAR320_EXT_CTRL_REG IOMEM(VA_SPEAR320_SOC_CONFIG_BASE + 0x0018) | ||
51 | #define SPEAR320_UARTX_PCLK_MASK 0x1 | ||
52 | #define SPEAR320_UART2_PCLK_SHIFT 8 | ||
53 | #define SPEAR320_UART3_PCLK_SHIFT 9 | ||
54 | #define SPEAR320_UART4_PCLK_SHIFT 10 | ||
55 | #define SPEAR320_UART5_PCLK_SHIFT 11 | ||
56 | #define SPEAR320_UART6_PCLK_SHIFT 12 | ||
57 | #define SPEAR320_RS485_PCLK_SHIFT 13 | ||
58 | |||
59 | #endif /* __MACH_SPEAR_H */ | ||