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authorviresh kumar <viresh.kumar@st.com>2010-04-01 07:31:29 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-04-14 06:34:38 -0400
commit70f4c0bf9e4d067744ee453bc37c0c4adcea6e53 (patch)
tree0918b10d980c503c258687a0c65b8d0428d3a455 /arch/arm/mach-spear3xx/spear300.c
parentb77932a4d265586748f05a8c8fad7ef4174c0296 (diff)
ARM: 6020/1: ST SPEAr: Adding gpio pad multiplexing support
GPIO Pads in spear platform are are multiplexed in various machines. This patch adds support for this pad multiplexing. Reviewed-by: Linus Walleij <linux.walleij@stericsson.com> Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-spear3xx/spear300.c')
-rw-r--r--arch/arm/mach-spear3xx/spear300.c358
1 files changed, 358 insertions, 0 deletions
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c
index 63aca8fc3ebb..66e7fcd8baf8 100644
--- a/arch/arm/mach-spear3xx/spear300.c
+++ b/arch/arm/mach-spear3xx/spear300.c
@@ -18,6 +18,357 @@
18#include <mach/generic.h> 18#include <mach/generic.h>
19#include <mach/spear.h> 19#include <mach/spear.h>
20 20
21/* pad multiplexing support */
22/* muxing registers */
23#define PAD_MUX_CONFIG_REG 0x00
24#define MODE_CONFIG_REG 0x04
25
26/* modes */
27#define NAND_MODE (1 << 0)
28#define NOR_MODE (1 << 1)
29#define PHOTO_FRAME_MODE (1 << 2)
30#define LEND_IP_PHONE_MODE (1 << 3)
31#define HEND_IP_PHONE_MODE (1 << 4)
32#define LEND_WIFI_PHONE_MODE (1 << 5)
33#define HEND_WIFI_PHONE_MODE (1 << 6)
34#define ATA_PABX_WI2S_MODE (1 << 7)
35#define ATA_PABX_I2S_MODE (1 << 8)
36#define CAML_LCDW_MODE (1 << 9)
37#define CAMU_LCD_MODE (1 << 10)
38#define CAMU_WLCD_MODE (1 << 11)
39#define CAML_LCD_MODE (1 << 12)
40#define ALL_MODES 0x1FFF
41
42struct pmx_mode nand_mode = {
43 .id = NAND_MODE,
44 .name = "nand mode",
45 .mask = 0x00,
46};
47
48struct pmx_mode nor_mode = {
49 .id = NOR_MODE,
50 .name = "nor mode",
51 .mask = 0x01,
52};
53
54struct pmx_mode photo_frame_mode = {
55 .id = PHOTO_FRAME_MODE,
56 .name = "photo frame mode",
57 .mask = 0x02,
58};
59
60struct pmx_mode lend_ip_phone_mode = {
61 .id = LEND_IP_PHONE_MODE,
62 .name = "lend ip phone mode",
63 .mask = 0x03,
64};
65
66struct pmx_mode hend_ip_phone_mode = {
67 .id = HEND_IP_PHONE_MODE,
68 .name = "hend ip phone mode",
69 .mask = 0x04,
70};
71
72struct pmx_mode lend_wifi_phone_mode = {
73 .id = LEND_WIFI_PHONE_MODE,
74 .name = "lend wifi phone mode",
75 .mask = 0x05,
76};
77
78struct pmx_mode hend_wifi_phone_mode = {
79 .id = HEND_WIFI_PHONE_MODE,
80 .name = "hend wifi phone mode",
81 .mask = 0x06,
82};
83
84struct pmx_mode ata_pabx_wi2s_mode = {
85 .id = ATA_PABX_WI2S_MODE,
86 .name = "ata pabx wi2s mode",
87 .mask = 0x07,
88};
89
90struct pmx_mode ata_pabx_i2s_mode = {
91 .id = ATA_PABX_I2S_MODE,
92 .name = "ata pabx i2s mode",
93 .mask = 0x08,
94};
95
96struct pmx_mode caml_lcdw_mode = {
97 .id = CAML_LCDW_MODE,
98 .name = "caml lcdw mode",
99 .mask = 0x0C,
100};
101
102struct pmx_mode camu_lcd_mode = {
103 .id = CAMU_LCD_MODE,
104 .name = "camu lcd mode",
105 .mask = 0x0D,
106};
107
108struct pmx_mode camu_wlcd_mode = {
109 .id = CAMU_WLCD_MODE,
110 .name = "camu wlcd mode",
111 .mask = 0x0E,
112};
113
114struct pmx_mode caml_lcd_mode = {
115 .id = CAML_LCD_MODE,
116 .name = "caml lcd mode",
117 .mask = 0x0F,
118};
119
120/* devices */
121struct pmx_dev_mode pmx_fsmc_2_chips_modes[] = {
122 {
123 .ids = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE |
124 ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE,
125 .mask = PMX_FIRDA_MASK,
126 },
127};
128
129struct pmx_dev pmx_fsmc_2_chips = {
130 .name = "fsmc_2_chips",
131 .modes = pmx_fsmc_2_chips_modes,
132 .mode_count = ARRAY_SIZE(pmx_fsmc_2_chips_modes),
133 .enb_on_reset = 1,
134};
135
136struct pmx_dev_mode pmx_fsmc_4_chips_modes[] = {
137 {
138 .ids = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE |
139 ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE,
140 .mask = PMX_FIRDA_MASK | PMX_UART0_MASK,
141 },
142};
143
144struct pmx_dev pmx_fsmc_4_chips = {
145 .name = "fsmc_4_chips",
146 .modes = pmx_fsmc_4_chips_modes,
147 .mode_count = ARRAY_SIZE(pmx_fsmc_4_chips_modes),
148 .enb_on_reset = 1,
149};
150
151struct pmx_dev_mode pmx_keyboard_modes[] = {
152 {
153 .ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE |
154 LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE |
155 CAML_LCDW_MODE | CAMU_LCD_MODE | CAMU_WLCD_MODE |
156 CAML_LCD_MODE,
157 .mask = 0x0,
158 },
159};
160
161struct pmx_dev pmx_keyboard = {
162 .name = "keyboard",
163 .modes = pmx_keyboard_modes,
164 .mode_count = ARRAY_SIZE(pmx_keyboard_modes),
165 .enb_on_reset = 1,
166};
167
168struct pmx_dev_mode pmx_clcd_modes[] = {
169 {
170 .ids = PHOTO_FRAME_MODE,
171 .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK ,
172 }, {
173 .ids = HEND_IP_PHONE_MODE | HEND_WIFI_PHONE_MODE |
174 CAMU_LCD_MODE | CAML_LCD_MODE,
175 .mask = PMX_TIMER_3_4_MASK,
176 },
177};
178
179struct pmx_dev pmx_clcd = {
180 .name = "clcd",
181 .modes = pmx_clcd_modes,
182 .mode_count = ARRAY_SIZE(pmx_clcd_modes),
183 .enb_on_reset = 1,
184};
185
186struct pmx_dev_mode pmx_telecom_gpio_modes[] = {
187 {
188 .ids = PHOTO_FRAME_MODE | CAMU_LCD_MODE | CAML_LCD_MODE,
189 .mask = PMX_MII_MASK,
190 }, {
191 .ids = LEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE,
192 .mask = PMX_MII_MASK | PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK,
193 }, {
194 .ids = ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_WLCD_MODE,
195 .mask = PMX_MII_MASK | PMX_TIMER_3_4_MASK,
196 }, {
197 .ids = HEND_IP_PHONE_MODE | HEND_WIFI_PHONE_MODE,
198 .mask = PMX_MII_MASK | PMX_TIMER_1_2_MASK,
199 }, {
200 .ids = ATA_PABX_WI2S_MODE,
201 .mask = PMX_MII_MASK | PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK
202 | PMX_UART0_MODEM_MASK,
203 },
204};
205
206struct pmx_dev pmx_telecom_gpio = {
207 .name = "telecom_gpio",
208 .modes = pmx_telecom_gpio_modes,
209 .mode_count = ARRAY_SIZE(pmx_telecom_gpio_modes),
210 .enb_on_reset = 1,
211};
212
213struct pmx_dev_mode pmx_telecom_tdm_modes[] = {
214 {
215 .ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
216 HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE
217 | HEND_WIFI_PHONE_MODE | ATA_PABX_WI2S_MODE
218 | ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE
219 | CAMU_WLCD_MODE | CAML_LCD_MODE,
220 .mask = PMX_UART0_MODEM_MASK | PMX_SSP_CS_MASK,
221 },
222};
223
224struct pmx_dev pmx_telecom_tdm = {
225 .name = "telecom_tdm",
226 .modes = pmx_telecom_tdm_modes,
227 .mode_count = ARRAY_SIZE(pmx_telecom_tdm_modes),
228 .enb_on_reset = 1,
229};
230
231struct pmx_dev_mode pmx_telecom_spi_cs_i2c_clk_modes[] = {
232 {
233 .ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE |
234 LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE
235 | ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE |
236 CAML_LCDW_MODE | CAML_LCD_MODE,
237 .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK,
238 },
239};
240
241struct pmx_dev pmx_telecom_spi_cs_i2c_clk = {
242 .name = "telecom_spi_cs_i2c_clk",
243 .modes = pmx_telecom_spi_cs_i2c_clk_modes,
244 .mode_count = ARRAY_SIZE(pmx_telecom_spi_cs_i2c_clk_modes),
245 .enb_on_reset = 1,
246};
247
248struct pmx_dev_mode pmx_telecom_camera_modes[] = {
249 {
250 .ids = CAML_LCDW_MODE | CAML_LCD_MODE,
251 .mask = PMX_MII_MASK,
252 }, {
253 .ids = CAMU_LCD_MODE | CAMU_WLCD_MODE,
254 .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK | PMX_MII_MASK,
255 },
256};
257
258struct pmx_dev pmx_telecom_camera = {
259 .name = "telecom_camera",
260 .modes = pmx_telecom_camera_modes,
261 .mode_count = ARRAY_SIZE(pmx_telecom_camera_modes),
262 .enb_on_reset = 1,
263};
264
265struct pmx_dev_mode pmx_telecom_dac_modes[] = {
266 {
267 .ids = ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE
268 | CAMU_WLCD_MODE | CAML_LCD_MODE,
269 .mask = PMX_TIMER_1_2_MASK,
270 },
271};
272
273struct pmx_dev pmx_telecom_dac = {
274 .name = "telecom_dac",
275 .modes = pmx_telecom_dac_modes,
276 .mode_count = ARRAY_SIZE(pmx_telecom_dac_modes),
277 .enb_on_reset = 1,
278};
279
280struct pmx_dev_mode pmx_telecom_i2s_modes[] = {
281 {
282 .ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE
283 | LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE |
284 ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE
285 | CAMU_WLCD_MODE | CAML_LCD_MODE,
286 .mask = PMX_UART0_MODEM_MASK,
287 },
288};
289
290struct pmx_dev pmx_telecom_i2s = {
291 .name = "telecom_i2s",
292 .modes = pmx_telecom_i2s_modes,
293 .mode_count = ARRAY_SIZE(pmx_telecom_i2s_modes),
294 .enb_on_reset = 1,
295};
296
297struct pmx_dev_mode pmx_telecom_boot_pins_modes[] = {
298 {
299 .ids = NAND_MODE | NOR_MODE,
300 .mask = PMX_UART0_MODEM_MASK | PMX_TIMER_1_2_MASK |
301 PMX_TIMER_3_4_MASK,
302 },
303};
304
305struct pmx_dev pmx_telecom_boot_pins = {
306 .name = "telecom_boot_pins",
307 .modes = pmx_telecom_boot_pins_modes,
308 .mode_count = ARRAY_SIZE(pmx_telecom_boot_pins_modes),
309 .enb_on_reset = 1,
310};
311
312struct pmx_dev_mode pmx_telecom_sdio_4bit_modes[] = {
313 {
314 .ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
315 HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE |
316 HEND_WIFI_PHONE_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE |
317 CAMU_WLCD_MODE | CAML_LCD_MODE | ATA_PABX_WI2S_MODE |
318 ATA_PABX_I2S_MODE,
319 .mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK |
320 PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK |
321 PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK,
322 },
323};
324
325struct pmx_dev pmx_telecom_sdio_4bit = {
326 .name = "telecom_sdio_4bit",
327 .modes = pmx_telecom_sdio_4bit_modes,
328 .mode_count = ARRAY_SIZE(pmx_telecom_sdio_4bit_modes),
329 .enb_on_reset = 1,
330};
331
332struct pmx_dev_mode pmx_telecom_sdio_8bit_modes[] = {
333 {
334 .ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
335 HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE |
336 HEND_WIFI_PHONE_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE |
337 CAMU_WLCD_MODE | CAML_LCD_MODE,
338 .mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK |
339 PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK |
340 PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK | PMX_MII_MASK,
341 },
342};
343
344struct pmx_dev pmx_telecom_sdio_8bit = {
345 .name = "telecom_sdio_8bit",
346 .modes = pmx_telecom_sdio_8bit_modes,
347 .mode_count = ARRAY_SIZE(pmx_telecom_sdio_8bit_modes),
348 .enb_on_reset = 1,
349};
350
351struct pmx_dev_mode pmx_gpio1_modes[] = {
352 {
353 .ids = PHOTO_FRAME_MODE,
354 .mask = PMX_UART0_MODEM_MASK | PMX_TIMER_1_2_MASK |
355 PMX_TIMER_3_4_MASK,
356 },
357};
358
359struct pmx_dev pmx_gpio1 = {
360 .name = "arm gpio1",
361 .modes = pmx_gpio1_modes,
362 .mode_count = ARRAY_SIZE(pmx_gpio1_modes),
363 .enb_on_reset = 1,
364};
365
366/* pmx driver structure */
367struct pmx_driver pmx_driver = {
368 .mode_reg = {.offset = MODE_CONFIG_REG, .mask = 0x0000000f},
369 .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
370};
371
21/* Add spear300 specific devices here */ 372/* Add spear300 specific devices here */
22/* arm gpio1 device registeration */ 373/* arm gpio1 device registeration */
23static struct pl061_platform_data gpio1_plat_data = { 374static struct pl061_platform_data gpio1_plat_data = {
@@ -38,8 +389,15 @@ struct amba_device gpio1_device = {
38 .irq = {IRQ_GEN_RAS_1, NO_IRQ}, 389 .irq = {IRQ_GEN_RAS_1, NO_IRQ},
39}; 390};
40 391
392/* spear300 routines */
41void __init spear300_init(void) 393void __init spear300_init(void)
42{ 394{
43 /* call spear3xx family common init function */ 395 /* call spear3xx family common init function */
44 spear3xx_init(); 396 spear3xx_init();
45} 397}
398
399void spear300_pmx_init(void)
400{
401 spear_pmx_init(&pmx_driver, SPEAR300_SOC_CONFIG_BASE,
402 SPEAR300_SOC_CONFIG_SIZE);
403}