ARM: 6091/1: ST SPEAr: Adding support for shared irq layer

Multiple peripherals in SPEAr share common hardware interrupt lines.
This patch adds support for a shared irq layer, which registers hardware
irqs by itself and exposes virtual irq numbers to peripherals.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

4 files changed, 160 insertions, 7 deletions

diff --git a/arch/arm/mach-spear3xx/include/mach/irqs.h b/arch/arm/mach-spear3xx/include/mach/irqs.h
index fe980e07b6ab..7f940b818473 100644
--- a/arch/arm/mach-spear3xx/include/mach/irqs.h
+++ b/arch/arm/mach-spear3xx/include/mach/irqs.h
@@ -14,7 +14,7 @@
 #ifndef __MACH_IRQS_H
 #define __MACH_IRQS_H
 
-/* IRQ definitions */
+/* SPEAr3xx IRQ definitions */
 #define IRQ_HW_ACCEL_MOD_0                      0
 #define IRQ_INTRCOMM_RAS_ARM                    1
 #define IRQ_CPU_GPT1_1                          2
@@ -50,16 +50,103 @@
 #define IRQ_HW_ACCEL_MOD_1                      31
 #define IRQ_VIC_END                             32
 
-#define SPEAR_GPIO_INT_BASE     IRQ_VIC_END
+#define VIRQ_START                              IRQ_VIC_END
 
+/* SPEAr300 Virtual irq definitions */
 #ifdef CONFIG_MACH_SPEAR300
-#define SPEAR_GPIO1_INT_BASE    (SPEAR_GPIO_INT_BASE + 8)
-#define SPEAR_GPIO_INT_END      (SPEAR_GPIO1_INT_BASE + 8)
+/* IRQs sharing IRQ_GEN_RAS_1 */
+#define VIRQ_IT_PERS_S                          (VIRQ_START + 0)
+#define VIRQ_IT_CHANGE_S                        (VIRQ_START + 1)
+#define VIRQ_I2S                                (VIRQ_START + 2)
+#define VIRQ_TDM                                (VIRQ_START + 3)
+#define VIRQ_CAMERA_L                           (VIRQ_START + 4)
+#define VIRQ_CAMERA_F                           (VIRQ_START + 5)
+#define VIRQ_CAMERA_V                           (VIRQ_START + 6)
+#define VIRQ_KEYBOARD                           (VIRQ_START + 7)
+#define VIRQ_GPIO1                              (VIRQ_START + 8)
+
+/* IRQs sharing IRQ_GEN_RAS_3 */
+#define IRQ_CLCD                                IRQ_GEN_RAS_3
+
+/* IRQs sharing IRQ_INTRCOMM_RAS_ARM */
+#define IRQ_SDIO                                IRQ_INTRCOMM_RAS_ARM
+
+/* GPIO pins virtual irqs */
+#define SPEAR_GPIO_INT_BASE                     (VIRQ_START + 9)
+#define SPEAR_GPIO1_INT_BASE                    (SPEAR_GPIO_INT_BASE + 8)
+#define SPEAR_GPIO_INT_END                      (SPEAR_GPIO1_INT_BASE + 8)
+
+/* SPEAr310 Virtual irq definitions */
+#elif defined(CONFIG_MACH_SPEAR310)
+/* IRQs sharing IRQ_GEN_RAS_1 */
+#define VIRQ_SMII0                              (VIRQ_START + 0)
+#define VIRQ_SMII1                              (VIRQ_START + 1)
+#define VIRQ_SMII2                              (VIRQ_START + 2)
+#define VIRQ_SMII3                              (VIRQ_START + 3)
+#define VIRQ_WAKEUP_SMII0                       (VIRQ_START + 4)
+#define VIRQ_WAKEUP_SMII1                       (VIRQ_START + 5)
+#define VIRQ_WAKEUP_SMII2                       (VIRQ_START + 6)
+#define VIRQ_WAKEUP_SMII3                       (VIRQ_START + 7)
+
+/* IRQs sharing IRQ_GEN_RAS_2 */
+#define VIRQ_UART1                              (VIRQ_START + 8)
+#define VIRQ_UART2                              (VIRQ_START + 9)
+#define VIRQ_UART3                              (VIRQ_START + 10)
+#define VIRQ_UART4                              (VIRQ_START + 11)
+#define VIRQ_UART5                              (VIRQ_START + 12)
+
+/* IRQs sharing IRQ_GEN_RAS_3 */
+#define VIRQ_EMI                                (VIRQ_START + 13)
+#define VIRQ_PLGPIO                             (VIRQ_START + 14)
+
+/* IRQs sharing IRQ_INTRCOMM_RAS_ARM */
+#define VIRQ_TDM_HDLC                           (VIRQ_START + 15)
+#define VIRQ_RS485_0                            (VIRQ_START + 16)
+#define VIRQ_RS485_1                            (VIRQ_START + 17)
+
+/* GPIO pins virtual irqs */
+#define SPEAR_GPIO_INT_BASE                     (VIRQ_START + 18)
+
+/* SPEAr320 Virtual irq definitions */
 #else
-#define SPEAR_GPIO_INT_END      (SPEAR_GPIO_INT_BASE + 8)
+/* IRQs sharing IRQ_GEN_RAS_1 */
+#define VIRQ_EMI                                (VIRQ_START + 0)
+#define VIRQ_CLCD                               (VIRQ_START + 1)
+#define VIRQ_SPP                                (VIRQ_START + 2)
+
+/* IRQs sharing IRQ_GEN_RAS_2 */
+#define IRQ_SDIO                                IRQ_GEN_RAS_2
+
+/* IRQs sharing IRQ_GEN_RAS_3 */
+#define VIRQ_PLGPIO                             (VIRQ_START + 3)
+#define VIRQ_I2S_PLAY                           (VIRQ_START + 4)
+#define VIRQ_I2S_REC                            (VIRQ_START + 5)
+
+/* IRQs sharing IRQ_INTRCOMM_RAS_ARM */
+#define VIRQ_CANU                               (VIRQ_START + 6)
+#define VIRQ_CANL                               (VIRQ_START + 7)
+#define VIRQ_UART1                              (VIRQ_START + 8)
+#define VIRQ_UART2                              (VIRQ_START + 9)
+#define VIRQ_SSP1                               (VIRQ_START + 10)
+#define VIRQ_SSP2                               (VIRQ_START + 11)
+#define VIRQ_SMII0                              (VIRQ_START + 12)
+#define VIRQ_MII1_SMII1                         (VIRQ_START + 13)
+#define VIRQ_WAKEUP_SMII0                       (VIRQ_START + 14)
+#define VIRQ_WAKEUP_MII1_SMII1                  (VIRQ_START + 15)
+#define VIRQ_I2C                                (VIRQ_START + 16)
+
+/* GPIO pins virtual irqs */
+#define SPEAR_GPIO_INT_BASE                     (VIRQ_START + 17)
+
+#endif
+
+/* PLGPIO Virtual IRQs */
+#if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320)
+#define SPEAR_PLGPIO_INT_BASE                   (SPEAR_GPIO_INT_BASE + 8)
+#define SPEAR_GPIO_INT_END                      (SPEAR_PLGPIO_INT_BASE + 102)
 #endif
 
-#define VIRTUAL_IRQS            (SPEAR_GPIO_INT_END - IRQ_VIC_END)
-#define NR_IRQS                 (IRQ_VIC_END + VIRTUAL_IRQS)
+#define VIRQ_END                                SPEAR_GPIO_INT_END
+#define NR_IRQS                                 VIRQ_END
 
 #endif /* __MACH_IRQS_H */
diff --git a/arch/arm/mach-spear3xx/include/mach/spear300.h b/arch/arm/mach-spear3xx/include/mach/spear300.h
index 40c16f385cfa..ccaa76522ee2 100644
--- a/arch/arm/mach-spear3xx/include/mach/spear300.h
+++ b/arch/arm/mach-spear3xx/include/mach/spear300.h
@@ -20,6 +20,22 @@
 #define SPEAR300_TELECOM_BASE           0x50000000
 #define SPEAR300_TELECOM_SIZE           0x10000000
 
+/* Interrupt registers offsets and masks */
+#define SPEAR300_TELECOM_REG_SIZE       0x00010000
+#define INT_ENB_MASK_REG                0x54
+#define INT_STS_MASK_REG                0x58
+#define IT_PERS_S_IRQ_MASK              (1 << 0)
+#define IT_CHANGE_S_IRQ_MASK            (1 << 1)
+#define I2S_IRQ_MASK                    (1 << 2)
+#define TDM_IRQ_MASK                    (1 << 3)
+#define CAMERA_L_IRQ_MASK               (1 << 4)
+#define CAMERA_F_IRQ_MASK               (1 << 5)
+#define CAMERA_V_IRQ_MASK               (1 << 6)
+#define KEYBOARD_IRQ_MASK               (1 << 7)
+#define GPIO1_IRQ_MASK                  (1 << 8)
+
+#define SHIRQ_RAS1_MASK                 0x1FF
+
 #define SPEAR300_CLCD_BASE              0x60000000
 #define SPEAR300_CLCD_SIZE              0x10000000
 
diff --git a/arch/arm/mach-spear3xx/include/mach/spear310.h b/arch/arm/mach-spear3xx/include/mach/spear310.h
index d4f58d6469d9..b27bb8af3309 100644
--- a/arch/arm/mach-spear3xx/include/mach/spear310.h
+++ b/arch/arm/mach-spear3xx/include/mach/spear310.h
@@ -40,6 +40,30 @@
 
 #define SPEAR310_SOC_CONFIG_BASE        0xB4000000
 #define SPEAR310_SOC_CONFIG_SIZE        0x00000070
+/* Interrupt registers offsets and masks */
+#define INT_STS_MASK_REG                0x04
+#define SMII0_IRQ_MASK                  (1 << 0)
+#define SMII1_IRQ_MASK                  (1 << 1)
+#define SMII2_IRQ_MASK                  (1 << 2)
+#define SMII3_IRQ_MASK                  (1 << 3)
+#define WAKEUP_SMII0_IRQ_MASK           (1 << 4)
+#define WAKEUP_SMII1_IRQ_MASK           (1 << 5)
+#define WAKEUP_SMII2_IRQ_MASK           (1 << 6)
+#define WAKEUP_SMII3_IRQ_MASK           (1 << 7)
+#define UART1_IRQ_MASK                  (1 << 8)
+#define UART2_IRQ_MASK                  (1 << 9)
+#define UART3_IRQ_MASK                  (1 << 10)
+#define UART4_IRQ_MASK                  (1 << 11)
+#define UART5_IRQ_MASK                  (1 << 12)
+#define EMI_IRQ_MASK                    (1 << 13)
+#define TDM_HDLC_IRQ_MASK               (1 << 14)
+#define RS485_0_IRQ_MASK                (1 << 15)
+#define RS485_1_IRQ_MASK                (1 << 16)
+
+#define SHIRQ_RAS1_MASK                 0x000FF
+#define SHIRQ_RAS2_MASK                 0x01F00
+#define SHIRQ_RAS3_MASK                 0x02000
+#define SHIRQ_INTRCOMM_RAS_MASK         0x1C000
 
 #endif /* __MACH_SPEAR310_H */
 
diff --git a/arch/arm/mach-spear3xx/include/mach/spear320.h b/arch/arm/mach-spear3xx/include/mach/spear320.h
index e8ad2ed82e24..cacf17a958cd 100644
--- a/arch/arm/mach-spear3xx/include/mach/spear320.h
+++ b/arch/arm/mach-spear3xx/include/mach/spear320.h
@@ -64,6 +64,32 @@
 
 #define SPEAR320_SOC_CONFIG_BASE        0xB4000000
 #define SPEAR320_SOC_CONFIG_SIZE        0x00000070
+/* Interrupt registers offsets and masks */
+#define INT_STS_MASK_REG                0x04
+#define INT_CLR_MASK_REG                0x04
+#define INT_ENB_MASK_REG                0x08
+#define GPIO_IRQ_MASK                   (1 << 0)
+#define I2S_PLAY_IRQ_MASK               (1 << 1)
+#define I2S_REC_IRQ_MASK                (1 << 2)
+#define EMI_IRQ_MASK                    (1 << 7)
+#define CLCD_IRQ_MASK                   (1 << 8)
+#define SPP_IRQ_MASK                    (1 << 9)
+#define SDIO_IRQ_MASK                   (1 << 10)
+#define CAN_U_IRQ_MASK                  (1 << 11)
+#define CAN_L_IRQ_MASK                  (1 << 12)
+#define UART1_IRQ_MASK                  (1 << 13)
+#define UART2_IRQ_MASK                  (1 << 14)
+#define SSP1_IRQ_MASK                   (1 << 15)
+#define SSP2_IRQ_MASK                   (1 << 16)
+#define SMII0_IRQ_MASK                  (1 << 17)
+#define MII1_SMII1_IRQ_MASK             (1 << 18)
+#define WAKEUP_SMII0_IRQ_MASK           (1 << 19)
+#define WAKEUP_MII1_SMII1_IRQ_MASK      (1 << 20)
+#define I2C1_IRQ_MASK                   (1 << 21)
+
+#define SHIRQ_RAS1_MASK                 0x000380
+#define SHIRQ_RAS3_MASK                 0x000007
+#define SHIRQ_INTRCOMM_RAS_MASK         0x3FF800
 
 #endif /* __MACH_SPEAR320_H */