aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-socfpga
diff options
context:
space:
mode:
authorDinh Nguyen <dinguyen@altera.com>2013-04-11 11:55:24 -0400
committerOlof Johansson <olof@lixom.net>2013-04-14 23:17:33 -0400
commit5c04b57fe33c7700e433983bb69e50ec8d8f08cd (patch)
treea4c95094ab7c7918d4e64de7fcc1cd74386015f0 /arch/arm/mach-socfpga
parenta93216c9212cb9ec36bb71776b706e7ed2d9d67c (diff)
ARM: socfpga: Enable soft reset
Enable a cold or warm reset to the HW from userspace. Also fix a few sparse errors: warning: symbol 'sys_manager_base_addr' was not declared. Should it be static? warning: symbol 'rst_manager_base_addr' was not declared. Should it be static? Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Reviewed-by: Pavel Machek <pavel@denx.de> Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-socfpga')
-rw-r--r--arch/arm/mach-socfpga/core.h11
-rw-r--r--arch/arm/mach-socfpga/platsmp.c3
-rw-r--r--arch/arm/mach-socfpga/socfpga.c10
3 files changed, 20 insertions, 4 deletions
diff --git a/arch/arm/mach-socfpga/core.h b/arch/arm/mach-socfpga/core.h
index 315edff610f2..572b8f719ffb 100644
--- a/arch/arm/mach-socfpga/core.h
+++ b/arch/arm/mach-socfpga/core.h
@@ -20,12 +20,23 @@
20#ifndef __MACH_CORE_H 20#ifndef __MACH_CORE_H
21#define __MACH_CORE_H 21#define __MACH_CORE_H
22 22
23#define SOCFPGA_RSTMGR_CTRL 0x04
24#define SOCFPGA_RSTMGR_MODPERRST 0x14
25#define SOCFPGA_RSTMGR_BRGMODRST 0x1c
26
27/* System Manager bits */
28#define RSTMGR_CTRL_SWCOLDRSTREQ 0x1 /* Cold Reset */
29#define RSTMGR_CTRL_SWWARMRSTREQ 0x2 /* Warm Reset */
30
23extern void socfpga_secondary_startup(void); 31extern void socfpga_secondary_startup(void);
24extern void __iomem *socfpga_scu_base_addr; 32extern void __iomem *socfpga_scu_base_addr;
25 33
26extern void socfpga_init_clocks(void); 34extern void socfpga_init_clocks(void);
27extern void socfpga_sysmgr_init(void); 35extern void socfpga_sysmgr_init(void);
28 36
37extern void __iomem *sys_manager_base_addr;
38extern void __iomem *rst_manager_base_addr;
39
29extern struct smp_operations socfpga_smp_ops; 40extern struct smp_operations socfpga_smp_ops;
30extern char secondary_trampoline, secondary_trampoline_end; 41extern char secondary_trampoline, secondary_trampoline_end;
31 42
diff --git a/arch/arm/mach-socfpga/platsmp.c b/arch/arm/mach-socfpga/platsmp.c
index 84c60fa8daa0..b907fb986d9e 100644
--- a/arch/arm/mach-socfpga/platsmp.c
+++ b/arch/arm/mach-socfpga/platsmp.c
@@ -30,9 +30,6 @@
30 30
31#include "core.h" 31#include "core.h"
32 32
33extern void __iomem *sys_manager_base_addr;
34extern void __iomem *rst_manager_base_addr;
35
36static void __cpuinit socfpga_secondary_init(unsigned int cpu) 33static void __cpuinit socfpga_secondary_init(unsigned int cpu)
37{ 34{
38 /* 35 /*
diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c
index 1042c023cf24..2cae16c1f265 100644
--- a/arch/arm/mach-socfpga/socfpga.c
+++ b/arch/arm/mach-socfpga/socfpga.c
@@ -87,7 +87,15 @@ static void __init socfpga_init_irq(void)
87 87
88static void socfpga_cyclone5_restart(char mode, const char *cmd) 88static void socfpga_cyclone5_restart(char mode, const char *cmd)
89{ 89{
90 /* TODO: */ 90 u32 temp;
91
92 temp = readl(rst_manager_base_addr + SOCFPGA_RSTMGR_CTRL);
93
94 if (mode == 'h')
95 temp |= RSTMGR_CTRL_SWCOLDRSTREQ;
96 else
97 temp |= RSTMGR_CTRL_SWWARMRSTREQ;
98 writel(temp, rst_manager_base_addr + SOCFPGA_RSTMGR_CTRL);
91} 99}
92 100
93static void __init socfpga_cyclone5_init(void) 101static void __init socfpga_cyclone5_init(void)