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authorOlof Johansson <olof@lixom.net>2013-08-28 12:56:49 -0400
committerOlof Johansson <olof@lixom.net>2013-08-28 12:56:49 -0400
commitf0a108b7227c4328c7a32514ee6a4ceffaaed886 (patch)
treea4e32410c2c0a2e22f7d6b0d10049d2699a767f8 /arch/arm/mach-shmobile
parentb36f4be3de1b123d8601de062e7dbfc904f305fb (diff)
parent98724b7ec9d34d875fc193660c87d6dd0d17ceb7 (diff)
Merge tag 'renesas-cleanup2-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/renesas
From Simon Horman: Second round of Renesas ARM based SoC cleanups for v3.12 * Remove mach/hardware.h which has no useful contents * Remove ag5evm board support * Remove kota2 board support * Use pm-rmobile on sh7372 and r8a7740 SoCs only, it is otherwise unneeded * Remove use of INTC header on r8a7779 and r8a7740 SoCs * Cleanup registration of usb phy in r8a7779 SoC * Remove '0x's from R8A7779 DTS file for r8a7779 SoC * tag 'renesas-cleanup2-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (74 commits) ARM: shmobile: r8a7779: Remove '0x's from R8A7779 DTS file ARM: shmobile: r8a7779: cleanup registration of usb phy ARM: shmobile: No need to use INTC header on r8a7779 ARM: shmobile: No need to use INTC demux on r8a7740 ARM: shmobile: Use pm-rmobile on sh7372 and r8a7740 only ARM: shmobile: r8a73a4: Remove ->init_machine() special case ARM: shmobile: Remove include <mach/hardware.h> ARM: shmobile: Remove Marzen use of <mach/hardware.h> ARM: shmobile: Remove r8a7779 use of <mach/hardware.h> ARM: shmobile: Remove EMEV2 use of <mach/hardware.h> ARM: shmobile: Remove sh7372 use of <mach/hardware.h> ARM: shmobile: Remove sh73a0 use of <mach/hardware.h> ARCH: ARM: shmobile: Remove ag5evm board support ARCH: ARM: shmobile: Remove kota2 board support leds: Remove leds-renesas-tpu driver ARM: shmobile: sh73a0: Remove all GPIOs ARM: shmobile: kota2: Use leds-pwm + pwm-rmob ARM: shmobile: armadillo800eva: Add backlight support ARM: shmobile: Setup r8a7790 arch timer based on MD pins ARM: shmobile: Introduce r8a7790_read_mode_pins() ... Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-shmobile')
-rw-r--r--arch/arm/mach-shmobile/Kconfig29
-rw-r--r--arch/arm/mach-shmobile/Makefile11
-rw-r--r--arch/arm/mach-shmobile/Makefile.boot3
-rw-r--r--arch/arm/mach-shmobile/board-ag5evm.c672
-rw-r--r--arch/arm/mach-shmobile/board-ape6evm.c3
-rw-r--r--arch/arm/mach-shmobile/board-armadillo800eva.c63
-rw-r--r--arch/arm/mach-shmobile/board-kota2.c553
-rw-r--r--arch/arm/mach-shmobile/board-kzm9d-reference.c46
-rw-r--r--arch/arm/mach-shmobile/board-kzm9d.c4
-rw-r--r--arch/arm/mach-shmobile/board-kzm9g-reference.c2
-rw-r--r--arch/arm/mach-shmobile/board-lager.c3
-rw-r--r--arch/arm/mach-shmobile/board-mackerel.c34
-rw-r--r--arch/arm/mach-shmobile/board-marzen.c25
-rw-r--r--arch/arm/mach-shmobile/clock-emev2.c20
-rw-r--r--arch/arm/mach-shmobile/clock-r8a73a4.c199
-rw-r--r--arch/arm/mach-shmobile/clock-r8a7790.c23
-rw-r--r--arch/arm/mach-shmobile/clock-sh73a0.c12
-rw-r--r--arch/arm/mach-shmobile/include/mach/dma.h1
-rw-r--r--arch/arm/mach-shmobile/include/mach/emev2.h4
-rw-r--r--arch/arm/mach-shmobile/include/mach/hardware.h4
-rw-r--r--arch/arm/mach-shmobile/include/mach/r8a73a4.h1
-rw-r--r--arch/arm/mach-shmobile/include/mach/r8a7740.h2
-rw-r--r--arch/arm/mach-shmobile/include/mach/r8a7778.h1
-rw-r--r--arch/arm/mach-shmobile/include/mach/r8a7779.h2
-rw-r--r--arch/arm/mach-shmobile/include/mach/r8a7790.h4
-rw-r--r--arch/arm/mach-shmobile/include/mach/sh73a0.h373
-rw-r--r--arch/arm/mach-shmobile/intc-r8a7779.c1
-rw-r--r--arch/arm/mach-shmobile/setup-emev2.c377
-rw-r--r--arch/arm/mach-shmobile/setup-r8a73a4.c34
-rw-r--r--arch/arm/mach-shmobile/setup-r8a7740.c26
-rw-r--r--arch/arm/mach-shmobile/setup-r8a7778.c72
-rw-r--r--arch/arm/mach-shmobile/setup-r8a7779.c26
-rw-r--r--arch/arm/mach-shmobile/setup-r8a7790.c111
-rw-r--r--arch/arm/mach-shmobile/setup-sh7372.c8
-rw-r--r--arch/arm/mach-shmobile/setup-sh73a0.c35
-rw-r--r--arch/arm/mach-shmobile/smp-emev2.c26
36 files changed, 631 insertions, 2179 deletions
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 3912ce91fee4..e4ad4089f6ff 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -23,9 +23,10 @@ config ARCH_R8A73A4
23 select ARCH_WANT_OPTIONAL_GPIOLIB 23 select ARCH_WANT_OPTIONAL_GPIOLIB
24 select ARM_GIC 24 select ARM_GIC
25 select CPU_V7 25 select CPU_V7
26 select HAVE_ARM_ARCH_TIMER
27 select SH_CLK_CPG 26 select SH_CLK_CPG
28 select RENESAS_IRQC 27 select RENESAS_IRQC
28 select ARCH_HAS_CPUFREQ
29 select ARCH_HAS_OPP
29 30
30config ARCH_R8A7740 31config ARCH_R8A7740
31 bool "R-Mobile A1 (R8A77400)" 32 bool "R-Mobile A1 (R8A77400)"
@@ -59,7 +60,6 @@ config ARCH_R8A7790
59 select ARCH_WANT_OPTIONAL_GPIOLIB 60 select ARCH_WANT_OPTIONAL_GPIOLIB
60 select ARM_GIC 61 select ARM_GIC
61 select CPU_V7 62 select CPU_V7
62 select HAVE_ARM_ARCH_TIMER
63 select SH_CLK_CPG 63 select SH_CLK_CPG
64 select RENESAS_IRQC 64 select RENESAS_IRQC
65 65
@@ -71,13 +71,6 @@ config ARCH_EMEV2
71 71
72comment "SH-Mobile Board Type" 72comment "SH-Mobile Board Type"
73 73
74config MACH_AG5EVM
75 bool "AG5EVM board"
76 depends on ARCH_SH73A0
77 select ARCH_REQUIRE_GPIOLIB
78 select REGULATOR_FIXED_VOLTAGE if REGULATOR
79 select SH_LCD_MIPI_DSI
80
81config MACH_APE6EVM 74config MACH_APE6EVM
82 bool "APE6EVM board" 75 bool "APE6EVM board"
83 depends on ARCH_R8A73A4 76 depends on ARCH_R8A73A4
@@ -91,12 +84,6 @@ config MACH_MACKEREL
91 select SND_SOC_AK4642 if SND_SIMPLE_CARD 84 select SND_SOC_AK4642 if SND_SIMPLE_CARD
92 select USE_OF 85 select USE_OF
93 86
94config MACH_KOTA2
95 bool "KOTA2 board"
96 depends on ARCH_SH73A0
97 select ARCH_REQUIRE_GPIOLIB
98 select REGULATOR_FIXED_VOLTAGE if REGULATOR
99
100config MACH_ARMADILLO800EVA 87config MACH_ARMADILLO800EVA
101 bool "Armadillo-800 EVA board" 88 bool "Armadillo-800 EVA board"
102 depends on ARCH_R8A7740 89 depends on ARCH_R8A7740
@@ -156,6 +143,18 @@ config MACH_KZM9D
156 select REGULATOR_FIXED_VOLTAGE if REGULATOR 143 select REGULATOR_FIXED_VOLTAGE if REGULATOR
157 select USE_OF 144 select USE_OF
158 145
146config MACH_KZM9D_REFERENCE
147 bool "KZM9D board - Reference Device Tree Implementation"
148 depends on ARCH_EMEV2
149 select REGULATOR_FIXED_VOLTAGE if REGULATOR
150 select USE_OF
151 ---help---
152 Use reference implementation of KZM9D board support
153 which makes a greater use of device tree at the expense
154 of not supporting a number of devices.
155
156 This is intended to aid developers
157
159config MACH_KZM9G 158config MACH_KZM9G
160 bool "KZM-A9-GT board" 159 bool "KZM-A9-GT board"
161 depends on ARCH_SH73A0 160 depends on ARCH_SH73A0
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 6165a517f580..e3f8592fab88 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -23,22 +23,18 @@ smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o headsmp-scu.o
23 23
24# IRQ objects 24# IRQ objects
25obj-$(CONFIG_ARCH_SH7372) += entry-intc.o 25obj-$(CONFIG_ARCH_SH7372) += entry-intc.o
26obj-$(CONFIG_ARCH_R8A7740) += entry-intc.o
27 26
28# PM objects 27# PM objects
29obj-$(CONFIG_SUSPEND) += suspend.o 28obj-$(CONFIG_SUSPEND) += suspend.o
30obj-$(CONFIG_CPU_IDLE) += cpuidle.o 29obj-$(CONFIG_CPU_IDLE) += cpuidle.o
31obj-$(CONFIG_ARCH_SHMOBILE) += pm-rmobile.o 30obj-$(CONFIG_ARCH_SH7372) += pm-sh7372.o sleep-sh7372.o pm-rmobile.o
32obj-$(CONFIG_ARCH_SH7372) += pm-sh7372.o sleep-sh7372.o
33obj-$(CONFIG_ARCH_R8A7740) += pm-r8a7740.o
34obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o
35obj-$(CONFIG_ARCH_SH73A0) += pm-sh73a0.o 31obj-$(CONFIG_ARCH_SH73A0) += pm-sh73a0.o
32obj-$(CONFIG_ARCH_R8A7740) += pm-r8a7740.o pm-rmobile.o
33obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o
36 34
37# Board objects 35# Board objects
38obj-$(CONFIG_MACH_AG5EVM) += board-ag5evm.o
39obj-$(CONFIG_MACH_APE6EVM) += board-ape6evm.o 36obj-$(CONFIG_MACH_APE6EVM) += board-ape6evm.o
40obj-$(CONFIG_MACH_MACKEREL) += board-mackerel.o 37obj-$(CONFIG_MACH_MACKEREL) += board-mackerel.o
41obj-$(CONFIG_MACH_KOTA2) += board-kota2.o
42obj-$(CONFIG_MACH_BOCKW) += board-bockw.o 38obj-$(CONFIG_MACH_BOCKW) += board-bockw.o
43obj-$(CONFIG_MACH_MARZEN) += board-marzen.o 39obj-$(CONFIG_MACH_MARZEN) += board-marzen.o
44obj-$(CONFIG_MACH_MARZEN_REFERENCE) += board-marzen-reference.o 40obj-$(CONFIG_MACH_MARZEN_REFERENCE) += board-marzen-reference.o
@@ -46,6 +42,7 @@ obj-$(CONFIG_MACH_LAGER) += board-lager.o
46obj-$(CONFIG_MACH_ARMADILLO800EVA) += board-armadillo800eva.o 42obj-$(CONFIG_MACH_ARMADILLO800EVA) += board-armadillo800eva.o
47obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += board-armadillo800eva-reference.o 43obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += board-armadillo800eva-reference.o
48obj-$(CONFIG_MACH_KZM9D) += board-kzm9d.o 44obj-$(CONFIG_MACH_KZM9D) += board-kzm9d.o
45obj-$(CONFIG_MACH_KZM9D_REFERENCE) += board-kzm9d-reference.o
49obj-$(CONFIG_MACH_KZM9G) += board-kzm9g.o 46obj-$(CONFIG_MACH_KZM9G) += board-kzm9g.o
50obj-$(CONFIG_MACH_KZM9G_REFERENCE) += board-kzm9g-reference.o 47obj-$(CONFIG_MACH_KZM9G_REFERENCE) += board-kzm9g-reference.o
51 48
diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
index 84c6868580f0..b8c1a21fcaf3 100644
--- a/arch/arm/mach-shmobile/Makefile.boot
+++ b/arch/arm/mach-shmobile/Makefile.boot
@@ -1,12 +1,11 @@
1# per-board load address for uImage 1# per-board load address for uImage
2loadaddr-y := 2loadaddr-y :=
3loadaddr-$(CONFIG_MACH_AG5EVM) += 0x40008000
4loadaddr-$(CONFIG_MACH_APE6EVM) += 0x40008000 3loadaddr-$(CONFIG_MACH_APE6EVM) += 0x40008000
5loadaddr-$(CONFIG_MACH_ARMADILLO800EVA) += 0x40008000 4loadaddr-$(CONFIG_MACH_ARMADILLO800EVA) += 0x40008000
6loadaddr-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += 0x40008000 5loadaddr-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += 0x40008000
7loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000 6loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
8loadaddr-$(CONFIG_MACH_KOTA2) += 0x41008000
9loadaddr-$(CONFIG_MACH_KZM9D) += 0x40008000 7loadaddr-$(CONFIG_MACH_KZM9D) += 0x40008000
8loadaddr-$(CONFIG_MACH_KZM9D_REFERENCE) += 0x40008000
10loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000 9loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
11loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000 10loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000
12loadaddr-$(CONFIG_MACH_LAGER) += 0x40008000 11loadaddr-$(CONFIG_MACH_LAGER) += 0x40008000
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
deleted file mode 100644
index c7540710906f..000000000000
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ /dev/null
@@ -1,672 +0,0 @@
1/*
2 * arch/arm/mach-shmobile/board-ag5evm.c
3 *
4 * Copyright (C) 2010 Takashi Yoshii <yoshii.takashi.zj@renesas.com>
5 * Copyright (C) 2009 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 *
20 */
21
22#include <linux/kernel.h>
23#include <linux/init.h>
24#include <linux/interrupt.h>
25#include <linux/irq.h>
26#include <linux/pinctrl/machine.h>
27#include <linux/pinctrl/pinconf-generic.h>
28#include <linux/platform_device.h>
29#include <linux/delay.h>
30#include <linux/io.h>
31#include <linux/dma-mapping.h>
32#include <linux/regulator/fixed.h>
33#include <linux/regulator/machine.h>
34#include <linux/serial_sci.h>
35#include <linux/smsc911x.h>
36#include <linux/gpio.h>
37#include <linux/videodev2.h>
38#include <linux/input.h>
39#include <linux/input/sh_keysc.h>
40#include <linux/mmc/host.h>
41#include <linux/mmc/sh_mmcif.h>
42#include <linux/mmc/sh_mobile_sdhi.h>
43#include <linux/mfd/tmio.h>
44#include <linux/sh_clk.h>
45#include <linux/irqchip/arm-gic.h>
46#include <video/sh_mobile_lcdc.h>
47#include <video/sh_mipi_dsi.h>
48#include <sound/sh_fsi.h>
49#include <mach/hardware.h>
50#include <mach/irqs.h>
51#include <mach/sh73a0.h>
52#include <mach/common.h>
53#include <asm/mach-types.h>
54#include <asm/mach/arch.h>
55#include <asm/hardware/cache-l2x0.h>
56#include <asm/traps.h>
57
58/* Dummy supplies, where voltage doesn't matter */
59static struct regulator_consumer_supply dummy_supplies[] = {
60 REGULATOR_SUPPLY("vddvario", "smsc911x"),
61 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
62};
63
64static struct resource smsc9220_resources[] = {
65 [0] = {
66 .start = 0x14000000,
67 .end = 0x14000000 + SZ_64K - 1,
68 .flags = IORESOURCE_MEM,
69 },
70 [1] = {
71 .start = SH73A0_PINT0_IRQ(2), /* PINTA2 */
72 .flags = IORESOURCE_IRQ,
73 },
74};
75
76static struct smsc911x_platform_config smsc9220_platdata = {
77 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
78 .phy_interface = PHY_INTERFACE_MODE_MII,
79 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
80 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
81};
82
83static struct platform_device eth_device = {
84 .name = "smsc911x",
85 .id = 0,
86 .dev = {
87 .platform_data = &smsc9220_platdata,
88 },
89 .resource = smsc9220_resources,
90 .num_resources = ARRAY_SIZE(smsc9220_resources),
91};
92
93static struct sh_keysc_info keysc_platdata = {
94 .mode = SH_KEYSC_MODE_6,
95 .scan_timing = 3,
96 .delay = 100,
97 .keycodes = {
98 KEY_A, KEY_B, KEY_C, KEY_D, KEY_E, KEY_F, KEY_G,
99 KEY_H, KEY_I, KEY_J, KEY_K, KEY_L, KEY_M, KEY_N,
100 KEY_O, KEY_P, KEY_Q, KEY_R, KEY_S, KEY_T, KEY_U,
101 KEY_V, KEY_W, KEY_X, KEY_Y, KEY_Z, KEY_HOME, KEY_SLEEP,
102 KEY_SPACE, KEY_9, KEY_6, KEY_3, KEY_WAKEUP, KEY_RIGHT, \
103 KEY_COFFEE,
104 KEY_0, KEY_8, KEY_5, KEY_2, KEY_DOWN, KEY_ENTER, KEY_UP,
105 KEY_KPASTERISK, KEY_7, KEY_4, KEY_1, KEY_STOP, KEY_LEFT, \
106 KEY_COMPUTER,
107 },
108};
109
110static struct resource keysc_resources[] = {
111 [0] = {
112 .name = "KEYSC",
113 .start = 0xe61b0000,
114 .end = 0xe61b0098 - 1,
115 .flags = IORESOURCE_MEM,
116 },
117 [1] = {
118 .start = gic_spi(71),
119 .flags = IORESOURCE_IRQ,
120 },
121};
122
123static struct platform_device keysc_device = {
124 .name = "sh_keysc",
125 .id = 0,
126 .num_resources = ARRAY_SIZE(keysc_resources),
127 .resource = keysc_resources,
128 .dev = {
129 .platform_data = &keysc_platdata,
130 },
131};
132
133/* FSI A */
134static struct resource fsi_resources[] = {
135 [0] = {
136 .name = "FSI",
137 .start = 0xEC230000,
138 .end = 0xEC230400 - 1,
139 .flags = IORESOURCE_MEM,
140 },
141 [1] = {
142 .start = gic_spi(146),
143 .flags = IORESOURCE_IRQ,
144 },
145};
146
147static struct platform_device fsi_device = {
148 .name = "sh_fsi2",
149 .id = -1,
150 .num_resources = ARRAY_SIZE(fsi_resources),
151 .resource = fsi_resources,
152};
153
154/* Fixed 1.8V regulator to be used by MMCIF */
155static struct regulator_consumer_supply fixed1v8_power_consumers[] =
156{
157 REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
158 REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"),
159};
160
161static struct resource sh_mmcif_resources[] = {
162 [0] = {
163 .name = "MMCIF",
164 .start = 0xe6bd0000,
165 .end = 0xe6bd00ff,
166 .flags = IORESOURCE_MEM,
167 },
168 [1] = {
169 .start = gic_spi(141),
170 .flags = IORESOURCE_IRQ,
171 },
172 [2] = {
173 .start = gic_spi(140),
174 .flags = IORESOURCE_IRQ,
175 },
176};
177
178static struct sh_mmcif_plat_data sh_mmcif_platdata = {
179 .sup_pclk = 0,
180 .ocr = MMC_VDD_165_195,
181 .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
182 .slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
183 .slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
184};
185
186static struct platform_device mmc_device = {
187 .name = "sh_mmcif",
188 .id = 0,
189 .dev = {
190 .dma_mask = NULL,
191 .coherent_dma_mask = 0xffffffff,
192 .platform_data = &sh_mmcif_platdata,
193 },
194 .num_resources = ARRAY_SIZE(sh_mmcif_resources),
195 .resource = sh_mmcif_resources,
196};
197
198/* IrDA */
199static struct resource irda_resources[] = {
200 [0] = {
201 .start = 0xE6D00000,
202 .end = 0xE6D01FD4 - 1,
203 .flags = IORESOURCE_MEM,
204 },
205 [1] = {
206 .start = gic_spi(95),
207 .flags = IORESOURCE_IRQ,
208 },
209};
210
211static struct platform_device irda_device = {
212 .name = "sh_irda",
213 .id = 0,
214 .resource = irda_resources,
215 .num_resources = ARRAY_SIZE(irda_resources),
216};
217
218/* MIPI-DSI */
219static struct resource mipidsi0_resources[] = {
220 [0] = {
221 .name = "DSI0",
222 .start = 0xfeab0000,
223 .end = 0xfeab3fff,
224 .flags = IORESOURCE_MEM,
225 },
226 [1] = {
227 .name = "DSI0",
228 .start = 0xfeab4000,
229 .end = 0xfeab7fff,
230 .flags = IORESOURCE_MEM,
231 },
232};
233
234static int sh_mipi_set_dot_clock(struct platform_device *pdev,
235 void __iomem *base,
236 int enable)
237{
238 struct clk *pck, *phy;
239 int ret;
240
241 pck = clk_get(&pdev->dev, "dsip_clk");
242 if (IS_ERR(pck)) {
243 ret = PTR_ERR(pck);
244 goto sh_mipi_set_dot_clock_pck_err;
245 }
246
247 phy = clk_get(&pdev->dev, "dsiphy_clk");
248 if (IS_ERR(phy)) {
249 ret = PTR_ERR(phy);
250 goto sh_mipi_set_dot_clock_phy_err;
251 }
252
253 if (enable) {
254 clk_set_rate(pck, clk_round_rate(pck, 24000000));
255 clk_set_rate(phy, clk_round_rate(pck, 510000000));
256 clk_enable(pck);
257 clk_enable(phy);
258 } else {
259 clk_disable(pck);
260 clk_disable(phy);
261 }
262
263 ret = 0;
264
265 clk_put(phy);
266sh_mipi_set_dot_clock_phy_err:
267 clk_put(pck);
268sh_mipi_set_dot_clock_pck_err:
269 return ret;
270}
271
272static struct sh_mipi_dsi_info mipidsi0_info = {
273 .data_format = MIPI_RGB888,
274 .channel = LCDC_CHAN_MAINLCD,
275 .lane = 2,
276 .vsynw_offset = 20,
277 .clksrc = 1,
278 .flags = SH_MIPI_DSI_HSABM |
279 SH_MIPI_DSI_SYNC_PULSES_MODE |
280 SH_MIPI_DSI_HSbyteCLK,
281 .set_dot_clock = sh_mipi_set_dot_clock,
282};
283
284static struct platform_device mipidsi0_device = {
285 .name = "sh-mipi-dsi",
286 .num_resources = ARRAY_SIZE(mipidsi0_resources),
287 .resource = mipidsi0_resources,
288 .id = 0,
289 .dev = {
290 .platform_data = &mipidsi0_info,
291 },
292};
293
294static unsigned char lcd_backlight_seq[3][2] = {
295 { 0x04, 0x07 },
296 { 0x23, 0x80 },
297 { 0x03, 0x01 },
298};
299
300static int lcd_backlight_set_brightness(int brightness)
301{
302 struct i2c_adapter *adap;
303 struct i2c_msg msg;
304 unsigned int i;
305 int ret;
306
307 if (brightness == 0) {
308 /* Reset the chip */
309 gpio_set_value(235, 0);
310 mdelay(24);
311 gpio_set_value(235, 1);
312 return 0;
313 }
314
315 adap = i2c_get_adapter(1);
316 if (adap == NULL)
317 return -ENODEV;
318
319 for (i = 0; i < ARRAY_SIZE(lcd_backlight_seq); i++) {
320 msg.addr = 0x6d;
321 msg.buf = &lcd_backlight_seq[i][0];
322 msg.len = 2;
323 msg.flags = 0;
324
325 ret = i2c_transfer(adap, &msg, 1);
326 if (ret < 0)
327 break;
328 }
329
330 i2c_put_adapter(adap);
331 return ret < 0 ? ret : 0;
332}
333
334/* LCDC0 */
335static const struct fb_videomode lcdc0_modes[] = {
336 {
337 .name = "R63302(QHD)",
338 .xres = 544,
339 .yres = 961,
340 .left_margin = 72,
341 .right_margin = 600,
342 .hsync_len = 16,
343 .upper_margin = 8,
344 .lower_margin = 8,
345 .vsync_len = 2,
346 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
347 },
348};
349
350static struct sh_mobile_lcdc_info lcdc0_info = {
351 .clock_source = LCDC_CLK_PERIPHERAL,
352 .ch[0] = {
353 .chan = LCDC_CHAN_MAINLCD,
354 .interface_type = RGB24,
355 .clock_divider = 1,
356 .flags = LCDC_FLAGS_DWPOL,
357 .fourcc = V4L2_PIX_FMT_RGB565,
358 .lcd_modes = lcdc0_modes,
359 .num_modes = ARRAY_SIZE(lcdc0_modes),
360 .panel_cfg = {
361 .width = 44,
362 .height = 79,
363 },
364 .bl_info = {
365 .name = "sh_mobile_lcdc_bl",
366 .max_brightness = 1,
367 .set_brightness = lcd_backlight_set_brightness,
368 },
369 .tx_dev = &mipidsi0_device,
370 }
371};
372
373static struct resource lcdc0_resources[] = {
374 [0] = {
375 .name = "LCDC0",
376 .start = 0xfe940000, /* P4-only space */
377 .end = 0xfe943fff,
378 .flags = IORESOURCE_MEM,
379 },
380 [1] = {
381 .start = intcs_evt2irq(0x580),
382 .flags = IORESOURCE_IRQ,
383 },
384};
385
386static struct platform_device lcdc0_device = {
387 .name = "sh_mobile_lcdc_fb",
388 .num_resources = ARRAY_SIZE(lcdc0_resources),
389 .resource = lcdc0_resources,
390 .id = 0,
391 .dev = {
392 .platform_data = &lcdc0_info,
393 .coherent_dma_mask = ~0,
394 },
395};
396
397/* Fixed 2.8V regulators to be used by SDHI0 */
398static struct regulator_consumer_supply fixed2v8_power_consumers[] =
399{
400 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
401 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
402};
403
404/* SDHI0 */
405static struct sh_mobile_sdhi_info sdhi0_info = {
406 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
407 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
408 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_USE_GPIO_CD,
409 .tmio_caps = MMC_CAP_SD_HIGHSPEED,
410 .tmio_ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
411 .cd_gpio = 251,
412};
413
414static struct resource sdhi0_resources[] = {
415 [0] = {
416 .name = "SDHI0",
417 .start = 0xee100000,
418 .end = 0xee1000ff,
419 .flags = IORESOURCE_MEM,
420 },
421 [1] = {
422 .name = SH_MOBILE_SDHI_IRQ_CARD_DETECT,
423 .start = gic_spi(83),
424 .flags = IORESOURCE_IRQ,
425 },
426 [2] = {
427 .name = SH_MOBILE_SDHI_IRQ_SDCARD,
428 .start = gic_spi(84),
429 .flags = IORESOURCE_IRQ,
430 },
431 [3] = {
432 .name = SH_MOBILE_SDHI_IRQ_SDIO,
433 .start = gic_spi(85),
434 .flags = IORESOURCE_IRQ,
435 },
436};
437
438static struct platform_device sdhi0_device = {
439 .name = "sh_mobile_sdhi",
440 .id = 0,
441 .num_resources = ARRAY_SIZE(sdhi0_resources),
442 .resource = sdhi0_resources,
443 .dev = {
444 .platform_data = &sdhi0_info,
445 },
446};
447
448/* Fixed 3.3V regulator to be used by SDHI1 */
449static struct regulator_consumer_supply cn4_power_consumers[] =
450{
451 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
452 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
453};
454
455static struct regulator_init_data cn4_power_init_data = {
456 .constraints = {
457 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
458 },
459 .num_consumer_supplies = ARRAY_SIZE(cn4_power_consumers),
460 .consumer_supplies = cn4_power_consumers,
461};
462
463static struct fixed_voltage_config cn4_power_info = {
464 .supply_name = "CN4 SD/MMC Vdd",
465 .microvolts = 3300000,
466 .gpio = 114,
467 .enable_high = 1,
468 .init_data = &cn4_power_init_data,
469};
470
471static struct platform_device cn4_power = {
472 .name = "reg-fixed-voltage",
473 .id = 2,
474 .dev = {
475 .platform_data = &cn4_power_info,
476 },
477};
478
479static void ag5evm_sdhi1_set_pwr(struct platform_device *pdev, int state)
480{
481 static int power_gpio = -EINVAL;
482
483 if (power_gpio < 0) {
484 int ret = gpio_request_one(114, GPIOF_OUT_INIT_LOW,
485 "sdhi1_power");
486 if (!ret)
487 power_gpio = 114;
488 }
489
490 /*
491 * If requesting the GPIO above failed, it means, that the regulator got
492 * probed and grabbed the GPIO, but we don't know, whether the sdhi
493 * driver already uses the regulator. If it doesn't, we have to toggle
494 * the GPIO ourselves, even though it is now owned by the fixed
495 * regulator driver. We have to live with the race in case the driver
496 * gets unloaded and the GPIO freed between these two steps.
497 */
498 gpio_set_value(114, state);
499}
500
501static struct sh_mobile_sdhi_info sh_sdhi1_info = {
502 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT,
503 .tmio_caps = MMC_CAP_NONREMOVABLE | MMC_CAP_SDIO_IRQ,
504 .tmio_ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
505 .set_pwr = ag5evm_sdhi1_set_pwr,
506};
507
508static struct resource sdhi1_resources[] = {
509 [0] = {
510 .name = "SDHI1",
511 .start = 0xee120000,
512 .end = 0xee1200ff,
513 .flags = IORESOURCE_MEM,
514 },
515 [1] = {
516 .name = SH_MOBILE_SDHI_IRQ_CARD_DETECT,
517 .start = gic_spi(87),
518 .flags = IORESOURCE_IRQ,
519 },
520 [2] = {
521 .name = SH_MOBILE_SDHI_IRQ_SDCARD,
522 .start = gic_spi(88),
523 .flags = IORESOURCE_IRQ,
524 },
525 [3] = {
526 .name = SH_MOBILE_SDHI_IRQ_SDIO,
527 .start = gic_spi(89),
528 .flags = IORESOURCE_IRQ,
529 },
530};
531
532static struct platform_device sdhi1_device = {
533 .name = "sh_mobile_sdhi",
534 .id = 1,
535 .dev = {
536 .platform_data = &sh_sdhi1_info,
537 },
538 .num_resources = ARRAY_SIZE(sdhi1_resources),
539 .resource = sdhi1_resources,
540};
541
542static struct platform_device *ag5evm_devices[] __initdata = {
543 &cn4_power,
544 &eth_device,
545 &keysc_device,
546 &fsi_device,
547 &mmc_device,
548 &irda_device,
549 &mipidsi0_device,
550 &lcdc0_device,
551 &sdhi0_device,
552 &sdhi1_device,
553};
554
555static unsigned long pin_pullup_conf[] = {
556 PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_UP, 0),
557};
558
559static const struct pinctrl_map ag5evm_pinctrl_map[] = {
560 /* FSIA */
561 PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0",
562 "fsia_mclk_in", "fsia"),
563 PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0",
564 "fsia_sclk_in", "fsia"),
565 PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0",
566 "fsia_data_in", "fsia"),
567 PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0",
568 "fsia_data_out", "fsia"),
569 /* I2C2 & I2C3 */
570 PIN_MAP_MUX_GROUP_DEFAULT("i2c-sh_mobile.2", "pfc-sh73a0",
571 "i2c2_0", "i2c2"),
572 PIN_MAP_MUX_GROUP_DEFAULT("i2c-sh_mobile.3", "pfc-sh73a0",
573 "i2c3_0", "i2c3"),
574 /* IrDA */
575 PIN_MAP_MUX_GROUP_DEFAULT("sh_irda.0", "pfc-sh73a0",
576 "irda_0", "irda"),
577 /* KEYSC */
578 PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
579 "keysc_in8", "keysc"),
580 PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
581 "keysc_out04", "keysc"),
582 PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
583 "keysc_out5", "keysc"),
584 PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
585 "keysc_out6_0", "keysc"),
586 PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
587 "keysc_out7_0", "keysc"),
588 PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
589 "keysc_out8_0", "keysc"),
590 PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
591 "keysc_out9_2", "keysc"),
592 PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
593 "keysc_in8", pin_pullup_conf),
594 /* MMCIF */
595 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
596 "mmc0_data8_0", "mmc0"),
597 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
598 "mmc0_ctrl_0", "mmc0"),
599 PIN_MAP_CONFIGS_PIN_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
600 "PORT279", pin_pullup_conf),
601 PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
602 "mmc0_data8_0", pin_pullup_conf),
603 /* SCIFA2 */
604 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "pfc-sh73a0",
605 "scifa2_data_0", "scifa2"),
606 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "pfc-sh73a0",
607 "scifa2_ctrl_0", "scifa2"),
608 /* SDHI0 (CN15 [SD I/F]) */
609 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
610 "sdhi0_data4", "sdhi0"),
611 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
612 "sdhi0_ctrl", "sdhi0"),
613 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
614 "sdhi0_wp", "sdhi0"),
615 /* SDHI1 (CN4 [WLAN I/F]) */
616 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0",
617 "sdhi1_data4", "sdhi1"),
618 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0",
619 "sdhi1_ctrl", "sdhi1"),
620 PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0",
621 "sdhi1_data4", pin_pullup_conf),
622 PIN_MAP_CONFIGS_PIN_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0",
623 "PORT263", pin_pullup_conf),
624};
625
626static void __init ag5evm_init(void)
627{
628 regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers,
629 ARRAY_SIZE(fixed1v8_power_consumers), 1800000);
630 regulator_register_always_on(1, "fixed-2.8V", fixed2v8_power_consumers,
631 ARRAY_SIZE(fixed2v8_power_consumers), 3300000);
632 regulator_register_fixed(3, dummy_supplies, ARRAY_SIZE(dummy_supplies));
633
634 pinctrl_register_mappings(ag5evm_pinctrl_map,
635 ARRAY_SIZE(ag5evm_pinctrl_map));
636 sh73a0_pinmux_init();
637
638 /* enable MMCIF */
639 gpio_request_one(208, GPIOF_OUT_INIT_HIGH, NULL); /* Reset */
640
641 /* enable SMSC911X */
642 gpio_request_one(144, GPIOF_IN, NULL); /* PINTA2 */
643 gpio_request_one(145, GPIOF_OUT_INIT_HIGH, NULL); /* RESET */
644
645 /* LCD panel */
646 gpio_request_one(217, GPIOF_OUT_INIT_LOW, NULL); /* RESET */
647 mdelay(1);
648 gpio_set_value(217, 1);
649 mdelay(100);
650
651 /* LCD backlight controller */
652 gpio_request_one(235, GPIOF_OUT_INIT_LOW, NULL); /* RESET */
653 lcd_backlight_set_brightness(0);
654
655#ifdef CONFIG_CACHE_L2X0
656 /* Shared attribute override enable, 64K*8way */
657 l2x0_init(IOMEM(0xf0100000), 0x00460000, 0xc2000fff);
658#endif
659 sh73a0_add_standard_devices();
660 platform_add_devices(ag5evm_devices, ARRAY_SIZE(ag5evm_devices));
661}
662
663MACHINE_START(AG5EVM, "ag5evm")
664 .smp = smp_ops(sh73a0_smp_ops),
665 .map_io = sh73a0_map_io,
666 .init_early = sh73a0_add_early_devices,
667 .nr_irqs = NR_IRQS_LEGACY,
668 .init_irq = sh73a0_init_irq,
669 .init_machine = ag5evm_init,
670 .init_late = shmobile_init_late,
671 .init_time = sh73a0_earlytimer_init,
672MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-ape6evm.c b/arch/arm/mach-shmobile/board-ape6evm.c
index 5eb0caa6a7d0..af6dd39d3758 100644
--- a/arch/arm/mach-shmobile/board-ape6evm.c
+++ b/arch/arm/mach-shmobile/board-ape6evm.c
@@ -20,7 +20,6 @@
20 20
21#include <linux/gpio.h> 21#include <linux/gpio.h>
22#include <linux/interrupt.h> 22#include <linux/interrupt.h>
23#include <linux/irqchip.h>
24#include <linux/kernel.h> 23#include <linux/kernel.h>
25#include <linux/pinctrl/machine.h> 24#include <linux/pinctrl/machine.h>
26#include <linux/platform_device.h> 25#include <linux/platform_device.h>
@@ -102,7 +101,7 @@ static const char *ape6evm_boards_compat_dt[] __initdata = {
102}; 101};
103 102
104DT_MACHINE_START(APE6EVM_DT, "ape6evm") 103DT_MACHINE_START(APE6EVM_DT, "ape6evm")
105 .init_irq = irqchip_init, 104 .init_early = r8a73a4_init_delay,
106 .init_time = shmobile_timer_init, 105 .init_time = shmobile_timer_init,
107 .init_machine = ape6evm_add_standard_devices, 106 .init_machine = ape6evm_add_standard_devices,
108 .dt_compat = ape6evm_boards_compat_dt, 107 .dt_compat = ape6evm_boards_compat_dt,
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
index c5be60d85e4b..5eb884d4324f 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
@@ -31,6 +31,8 @@
31#include <linux/gpio_keys.h> 31#include <linux/gpio_keys.h>
32#include <linux/regulator/driver.h> 32#include <linux/regulator/driver.h>
33#include <linux/pinctrl/machine.h> 33#include <linux/pinctrl/machine.h>
34#include <linux/platform_data/pwm-renesas-tpu.h>
35#include <linux/pwm_backlight.h>
34#include <linux/regulator/fixed.h> 36#include <linux/regulator/fixed.h>
35#include <linux/regulator/gpio-regulator.h> 37#include <linux/regulator/gpio-regulator.h>
36#include <linux/regulator/machine.h> 38#include <linux/regulator/machine.h>
@@ -387,7 +389,50 @@ static struct platform_device sh_eth_device = {
387 .num_resources = ARRAY_SIZE(sh_eth_resources), 389 .num_resources = ARRAY_SIZE(sh_eth_resources),
388}; 390};
389 391
390/* LCDC */ 392/* PWM */
393static struct resource pwm_resources[] = {
394 [0] = {
395 .start = 0xe6600000,
396 .end = 0xe66000ff,
397 .flags = IORESOURCE_MEM,
398 },
399};
400
401static struct tpu_pwm_platform_data pwm_device_data = {
402 .channels[2] = {
403 .polarity = PWM_POLARITY_INVERSED,
404 }
405};
406
407static struct platform_device pwm_device = {
408 .name = "renesas-tpu-pwm",
409 .id = -1,
410 .dev = {
411 .platform_data = &pwm_device_data,
412 },
413 .num_resources = ARRAY_SIZE(pwm_resources),
414 .resource = pwm_resources,
415};
416
417static struct pwm_lookup pwm_lookup[] = {
418 PWM_LOOKUP("renesas-tpu-pwm", 2, "pwm-backlight.0", NULL),
419};
420
421/* LCDC and backlight */
422static struct platform_pwm_backlight_data pwm_backlight_data = {
423 .lth_brightness = 50,
424 .max_brightness = 255,
425 .dft_brightness = 255,
426 .pwm_period_ns = 33333, /* 30kHz */
427};
428
429static struct platform_device pwm_backlight_device = {
430 .name = "pwm-backlight",
431 .dev = {
432 .platform_data = &pwm_backlight_data,
433 },
434};
435
391static struct fb_videomode lcdc0_mode = { 436static struct fb_videomode lcdc0_mode = {
392 .name = "AMPIER/AM-800480", 437 .name = "AMPIER/AM-800480",
393 .xres = 800, 438 .xres = 800,
@@ -679,15 +724,6 @@ static struct platform_device vcc_sdhi1 = {
679}; 724};
680 725
681/* SDHI0 */ 726/* SDHI0 */
682/*
683 * FIXME
684 *
685 * It use polling mode here, since
686 * CD (= Card Detect) pin is not connected to SDHI0_CD.
687 * We can use IRQ31 as card detect irq,
688 * but it needs chattering removal operation
689 */
690#define IRQ31 irq_pin(31)
691static struct sh_mobile_sdhi_info sdhi0_info = { 727static struct sh_mobile_sdhi_info sdhi0_info = {
692 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, 728 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
693 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, 729 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
@@ -1030,6 +1066,8 @@ static struct i2c_board_info i2c2_devices[] = {
1030 */ 1066 */
1031static struct platform_device *eva_devices[] __initdata = { 1067static struct platform_device *eva_devices[] __initdata = {
1032 &lcdc0_device, 1068 &lcdc0_device,
1069 &pwm_device,
1070 &pwm_backlight_device,
1033 &gpio_keys_device, 1071 &gpio_keys_device,
1034 &sh_eth_device, 1072 &sh_eth_device,
1035 &vcc_sdhi0, 1073 &vcc_sdhi0,
@@ -1101,6 +1139,9 @@ static const struct pinctrl_map eva_pinctrl_map[] = {
1101 /* ST1232 */ 1139 /* ST1232 */
1102 PIN_MAP_MUX_GROUP_DEFAULT("0-0055", "pfc-r8a7740", 1140 PIN_MAP_MUX_GROUP_DEFAULT("0-0055", "pfc-r8a7740",
1103 "intc_irq10", "intc"), 1141 "intc_irq10", "intc"),
1142 /* TPU0 */
1143 PIN_MAP_MUX_GROUP_DEFAULT("renesas-tpu-pwm", "pfc-r8a7740",
1144 "tpu0_to2_1", "tpu0"),
1104 /* USBHS */ 1145 /* USBHS */
1105 PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs", "pfc-r8a7740", 1146 PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs", "pfc-r8a7740",
1106 "intc_irq7_1", "intc"), 1147 "intc_irq7_1", "intc"),
@@ -1154,13 +1195,13 @@ static void __init eva_init(void)
1154 ARRAY_SIZE(fixed3v3_power_consumers), 3300000); 1195 ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
1155 1196
1156 pinctrl_register_mappings(eva_pinctrl_map, ARRAY_SIZE(eva_pinctrl_map)); 1197 pinctrl_register_mappings(eva_pinctrl_map, ARRAY_SIZE(eva_pinctrl_map));
1198 pwm_add_table(pwm_lookup, ARRAY_SIZE(pwm_lookup));
1157 1199
1158 r8a7740_pinmux_init(); 1200 r8a7740_pinmux_init();
1159 r8a7740_meram_workaround(); 1201 r8a7740_meram_workaround();
1160 1202
1161 /* LCDC0 */ 1203 /* LCDC0 */
1162 gpio_request_one(61, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */ 1204 gpio_request_one(61, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
1163 gpio_request_one(202, GPIOF_OUT_INIT_LOW, NULL); /* LCD0_LED_CONT */
1164 1205
1165 /* GETHER */ 1206 /* GETHER */
1166 gpio_request_one(18, GPIOF_OUT_INIT_HIGH, NULL); /* PHY_RST */ 1207 gpio_request_one(18, GPIOF_OUT_INIT_HIGH, NULL); /* PHY_RST */
diff --git a/arch/arm/mach-shmobile/board-kota2.c b/arch/arm/mach-shmobile/board-kota2.c
deleted file mode 100644
index ef5ca0ef0cb5..000000000000
--- a/arch/arm/mach-shmobile/board-kota2.c
+++ /dev/null
@@ -1,553 +0,0 @@
1/*
2 * kota2 board support
3 *
4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Copyright (C) 2011 Magnus Damm
6 * Copyright (C) 2010 Takashi Yoshii <yoshii.takashi.zj@renesas.com>
7 * Copyright (C) 2009 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 */
22
23#include <linux/kernel.h>
24#include <linux/init.h>
25#include <linux/interrupt.h>
26#include <linux/irq.h>
27#include <linux/pinctrl/machine.h>
28#include <linux/pinctrl/pinconf-generic.h>
29#include <linux/platform_device.h>
30#include <linux/delay.h>
31#include <linux/io.h>
32#include <linux/regulator/fixed.h>
33#include <linux/regulator/machine.h>
34#include <linux/smsc911x.h>
35#include <linux/gpio.h>
36#include <linux/input.h>
37#include <linux/input/sh_keysc.h>
38#include <linux/gpio_keys.h>
39#include <linux/leds.h>
40#include <linux/irqchip/arm-gic.h>
41#include <linux/platform_data/leds-renesas-tpu.h>
42#include <linux/mmc/host.h>
43#include <linux/mmc/sh_mmcif.h>
44#include <linux/mfd/tmio.h>
45#include <linux/mmc/sh_mobile_sdhi.h>
46#include <mach/hardware.h>
47#include <mach/irqs.h>
48#include <mach/sh73a0.h>
49#include <mach/common.h>
50#include <asm/mach-types.h>
51#include <asm/mach/arch.h>
52#include <asm/mach/time.h>
53#include <asm/hardware/cache-l2x0.h>
54#include <asm/traps.h>
55
56/* Dummy supplies, where voltage doesn't matter */
57static struct regulator_consumer_supply dummy_supplies[] = {
58 REGULATOR_SUPPLY("vddvario", "smsc911x"),
59 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
60};
61
62/* SMSC 9220 */
63static struct resource smsc9220_resources[] = {
64 [0] = {
65 .start = 0x14000000, /* CS5A */
66 .end = 0x140000ff, /* A1->A7 */
67 .flags = IORESOURCE_MEM,
68 },
69 [1] = {
70 .start = SH73A0_PINT0_IRQ(2), /* PINTA2 */
71 .flags = IORESOURCE_IRQ,
72 },
73};
74
75static struct smsc911x_platform_config smsc9220_platdata = {
76 .flags = SMSC911X_USE_32BIT, /* 32-bit SW on 16-bit HW bus */
77 .phy_interface = PHY_INTERFACE_MODE_MII,
78 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
79 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
80};
81
82static struct platform_device eth_device = {
83 .name = "smsc911x",
84 .id = 0,
85 .dev = {
86 .platform_data = &smsc9220_platdata,
87 },
88 .resource = smsc9220_resources,
89 .num_resources = ARRAY_SIZE(smsc9220_resources),
90};
91
92/* KEYSC */
93static struct sh_keysc_info keysc_platdata = {
94 .mode = SH_KEYSC_MODE_6,
95 .scan_timing = 3,
96 .delay = 100,
97 .keycodes = {
98 KEY_NUMERIC_STAR, KEY_NUMERIC_0, KEY_NUMERIC_POUND,
99 0, 0, 0, 0, 0,
100 KEY_NUMERIC_7, KEY_NUMERIC_8, KEY_NUMERIC_9,
101 0, KEY_DOWN, 0, 0, 0,
102 KEY_NUMERIC_4, KEY_NUMERIC_5, KEY_NUMERIC_6,
103 KEY_LEFT, KEY_ENTER, KEY_RIGHT, 0, 0,
104 KEY_NUMERIC_1, KEY_NUMERIC_2, KEY_NUMERIC_3,
105 0, KEY_UP, 0, 0, 0,
106 0, 0, 0, 0, 0, 0, 0, 0,
107 0, 0, 0, 0, 0, 0, 0, 0,
108 0, 0, 0, 0, 0, 0, 0, 0,
109 0, 0, 0, 0, 0, 0, 0, 0,
110 },
111};
112
113static struct resource keysc_resources[] = {
114 [0] = {
115 .name = "KEYSC",
116 .start = 0xe61b0000,
117 .end = 0xe61b0098 - 1,
118 .flags = IORESOURCE_MEM,
119 },
120 [1] = {
121 .start = gic_spi(71),
122 .flags = IORESOURCE_IRQ,
123 },
124};
125
126static struct platform_device keysc_device = {
127 .name = "sh_keysc",
128 .id = 0,
129 .num_resources = ARRAY_SIZE(keysc_resources),
130 .resource = keysc_resources,
131 .dev = {
132 .platform_data = &keysc_platdata,
133 },
134};
135
136/* GPIO KEY */
137#define GPIO_KEY(c, g, d) { .code = c, .gpio = g, .desc = d, .active_low = 1 }
138
139static struct gpio_keys_button gpio_buttons[] = {
140 GPIO_KEY(KEY_VOLUMEUP, 56, "+"), /* S2: VOL+ [IRQ9] */
141 GPIO_KEY(KEY_VOLUMEDOWN, 54, "-"), /* S3: VOL- [IRQ10] */
142 GPIO_KEY(KEY_MENU, 27, "Menu"), /* S4: MENU [IRQ30] */
143 GPIO_KEY(KEY_HOMEPAGE, 26, "Home"), /* S5: HOME [IRQ31] */
144 GPIO_KEY(KEY_BACK, 11, "Back"), /* S6: BACK [IRQ0] */
145 GPIO_KEY(KEY_PHONE, 238, "Tel"), /* S7: TEL [IRQ11] */
146 GPIO_KEY(KEY_POWER, 239, "C1"), /* S8: CAM [IRQ13] */
147 GPIO_KEY(KEY_MAIL, 224, "Mail"), /* S9: MAIL [IRQ3] */
148 /* Omitted button "C3?": 223 - S10: CUST [IRQ8] */
149 GPIO_KEY(KEY_CAMERA, 164, "C2"), /* S11: CAM_HALF [IRQ25] */
150 /* Omitted button "?": 152 - S12: CAM_FULL [No IRQ] */
151};
152
153static struct gpio_keys_platform_data gpio_key_info = {
154 .buttons = gpio_buttons,
155 .nbuttons = ARRAY_SIZE(gpio_buttons),
156};
157
158static struct platform_device gpio_keys_device = {
159 .name = "gpio-keys",
160 .id = -1,
161 .dev = {
162 .platform_data = &gpio_key_info,
163 },
164};
165
166/* GPIO LED */
167#define GPIO_LED(n, g) { .name = n, .gpio = g }
168
169static struct gpio_led gpio_leds[] = {
170 GPIO_LED("G", 20), /* PORT20 [GPO0] -> LED7 -> "G" */
171 GPIO_LED("H", 21), /* PORT21 [GPO1] -> LED8 -> "H" */
172 GPIO_LED("J", 22), /* PORT22 [GPO2] -> LED9 -> "J" */
173};
174
175static struct gpio_led_platform_data gpio_leds_info = {
176 .leds = gpio_leds,
177 .num_leds = ARRAY_SIZE(gpio_leds),
178};
179
180static struct platform_device gpio_leds_device = {
181 .name = "leds-gpio",
182 .id = -1,
183 .dev = {
184 .platform_data = &gpio_leds_info,
185 },
186};
187
188/* TPU LED */
189static struct led_renesas_tpu_config led_renesas_tpu12_pdata = {
190 .name = "V2513",
191 .pin_gpio_fn = GPIO_FN_TPU1TO2,
192 .pin_gpio = 153,
193 .channel_offset = 0x90,
194 .timer_bit = 2,
195 .max_brightness = 1000,
196};
197
198static struct resource tpu12_resources[] = {
199 [0] = {
200 .name = "TPU12",
201 .start = 0xe6610090,
202 .end = 0xe66100b5,
203 .flags = IORESOURCE_MEM,
204 },
205};
206
207static struct platform_device leds_tpu12_device = {
208 .name = "leds-renesas-tpu",
209 .id = 12,
210 .dev = {
211 .platform_data = &led_renesas_tpu12_pdata,
212 },
213 .num_resources = ARRAY_SIZE(tpu12_resources),
214 .resource = tpu12_resources,
215};
216
217static struct led_renesas_tpu_config led_renesas_tpu41_pdata = {
218 .name = "V2514",
219 .pin_gpio_fn = GPIO_FN_TPU4TO1,
220 .pin_gpio = 199,
221 .channel_offset = 0x50,
222 .timer_bit = 1,
223 .max_brightness = 1000,
224};
225
226static struct resource tpu41_resources[] = {
227 [0] = {
228 .name = "TPU41",
229 .start = 0xe6640050,
230 .end = 0xe6640075,
231 .flags = IORESOURCE_MEM,
232 },
233};
234
235static struct platform_device leds_tpu41_device = {
236 .name = "leds-renesas-tpu",
237 .id = 41,
238 .dev = {
239 .platform_data = &led_renesas_tpu41_pdata,
240 },
241 .num_resources = ARRAY_SIZE(tpu41_resources),
242 .resource = tpu41_resources,
243};
244
245static struct led_renesas_tpu_config led_renesas_tpu21_pdata = {
246 .name = "V2515",
247 .pin_gpio_fn = GPIO_FN_TPU2TO1,
248 .pin_gpio = 197,
249 .channel_offset = 0x50,
250 .timer_bit = 1,
251 .max_brightness = 1000,
252};
253
254static struct resource tpu21_resources[] = {
255 [0] = {
256 .name = "TPU21",
257 .start = 0xe6620050,
258 .end = 0xe6620075,
259 .flags = IORESOURCE_MEM,
260 },
261};
262
263static struct platform_device leds_tpu21_device = {
264 .name = "leds-renesas-tpu",
265 .id = 21,
266 .dev = {
267 .platform_data = &led_renesas_tpu21_pdata,
268 },
269 .num_resources = ARRAY_SIZE(tpu21_resources),
270 .resource = tpu21_resources,
271};
272
273static struct led_renesas_tpu_config led_renesas_tpu30_pdata = {
274 .name = "KEYLED",
275 .pin_gpio_fn = GPIO_FN_TPU3TO0,
276 .pin_gpio = 163,
277 .channel_offset = 0x10,
278 .timer_bit = 0,
279 .max_brightness = 1000,
280};
281
282static struct resource tpu30_resources[] = {
283 [0] = {
284 .name = "TPU30",
285 .start = 0xe6630010,
286 .end = 0xe6630035,
287 .flags = IORESOURCE_MEM,
288 },
289};
290
291static struct platform_device leds_tpu30_device = {
292 .name = "leds-renesas-tpu",
293 .id = 30,
294 .dev = {
295 .platform_data = &led_renesas_tpu30_pdata,
296 },
297 .num_resources = ARRAY_SIZE(tpu30_resources),
298 .resource = tpu30_resources,
299};
300
301/* Fixed 1.8V regulator to be used by MMCIF */
302static struct regulator_consumer_supply fixed1v8_power_consumers[] =
303{
304 REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
305 REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"),
306};
307
308/* MMCIF */
309static struct resource mmcif_resources[] = {
310 [0] = {
311 .name = "MMCIF",
312 .start = 0xe6bd0000,
313 .end = 0xe6bd00ff,
314 .flags = IORESOURCE_MEM,
315 },
316 [1] = {
317 .start = gic_spi(140),
318 .flags = IORESOURCE_IRQ,
319 },
320 [2] = {
321 .start = gic_spi(141),
322 .flags = IORESOURCE_IRQ,
323 },
324};
325
326static struct sh_mmcif_plat_data mmcif_info = {
327 .ocr = MMC_VDD_165_195,
328 .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
329};
330
331static struct platform_device mmcif_device = {
332 .name = "sh_mmcif",
333 .id = 0,
334 .dev = {
335 .platform_data = &mmcif_info,
336 },
337 .num_resources = ARRAY_SIZE(mmcif_resources),
338 .resource = mmcif_resources,
339};
340
341/* Fixed 3.3V regulator to be used by SDHI0 and SDHI1 */
342static struct regulator_consumer_supply fixed3v3_power_consumers[] =
343{
344 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
345 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
346 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
347 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
348};
349
350/* SDHI0 */
351static struct sh_mobile_sdhi_info sdhi0_info = {
352 .tmio_caps = MMC_CAP_SD_HIGHSPEED,
353 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT,
354};
355
356static struct resource sdhi0_resources[] = {
357 [0] = {
358 .name = "SDHI0",
359 .start = 0xee100000,
360 .end = 0xee1000ff,
361 .flags = IORESOURCE_MEM,
362 },
363 [1] = {
364 .start = gic_spi(83),
365 .flags = IORESOURCE_IRQ,
366 },
367 [2] = {
368 .start = gic_spi(84),
369 .flags = IORESOURCE_IRQ,
370 },
371 [3] = {
372 .start = gic_spi(85),
373 .flags = IORESOURCE_IRQ,
374 },
375};
376
377static struct platform_device sdhi0_device = {
378 .name = "sh_mobile_sdhi",
379 .id = 0,
380 .num_resources = ARRAY_SIZE(sdhi0_resources),
381 .resource = sdhi0_resources,
382 .dev = {
383 .platform_data = &sdhi0_info,
384 },
385};
386
387/* SDHI1 */
388static struct sh_mobile_sdhi_info sdhi1_info = {
389 .tmio_caps = MMC_CAP_NONREMOVABLE | MMC_CAP_SDIO_IRQ,
390 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT,
391};
392
393static struct resource sdhi1_resources[] = {
394 [0] = {
395 .name = "SDHI1",
396 .start = 0xee120000,
397 .end = 0xee1200ff,
398 .flags = IORESOURCE_MEM,
399 },
400 [1] = {
401 .start = gic_spi(87),
402 .flags = IORESOURCE_IRQ,
403 },
404 [2] = {
405 .start = gic_spi(88),
406 .flags = IORESOURCE_IRQ,
407 },
408 [3] = {
409 .start = gic_spi(89),
410 .flags = IORESOURCE_IRQ,
411 },
412};
413
414static struct platform_device sdhi1_device = {
415 .name = "sh_mobile_sdhi",
416 .id = 1,
417 .num_resources = ARRAY_SIZE(sdhi1_resources),
418 .resource = sdhi1_resources,
419 .dev = {
420 .platform_data = &sdhi1_info,
421 },
422};
423
424static struct platform_device *kota2_devices[] __initdata = {
425 &eth_device,
426 &keysc_device,
427 &gpio_keys_device,
428 &gpio_leds_device,
429 &leds_tpu12_device,
430 &leds_tpu41_device,
431 &leds_tpu21_device,
432 &leds_tpu30_device,
433 &mmcif_device,
434 &sdhi0_device,
435 &sdhi1_device,
436};
437
438static unsigned long pin_pullup_conf[] = {
439 PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_UP, 0),
440};
441
442static const struct pinctrl_map kota2_pinctrl_map[] = {
443 /* KEYSC */
444 PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
445 "keysc_in8", "keysc"),
446 PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
447 "keysc_out04", "keysc"),
448 PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
449 "keysc_out5", "keysc"),
450 PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
451 "keysc_out6_0", "keysc"),
452 PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
453 "keysc_out7_0", "keysc"),
454 PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
455 "keysc_out8_0", "keysc"),
456 PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
457 "keysc_in8", pin_pullup_conf),
458 /* MMCIF */
459 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
460 "mmc0_data8_0", "mmc0"),
461 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
462 "mmc0_ctrl_0", "mmc0"),
463 PIN_MAP_CONFIGS_PIN_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
464 "PORT279", pin_pullup_conf),
465 PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
466 "mmc0_data8_0", pin_pullup_conf),
467 /* SCIFA2 (UART2) */
468 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "pfc-sh73a0",
469 "scifa2_data_0", "scifa2"),
470 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "pfc-sh73a0",
471 "scifa2_ctrl_0", "scifa2"),
472 /* SCIFA4 (UART1) */
473 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "pfc-sh73a0",
474 "scifa4_data", "scifa4"),
475 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "pfc-sh73a0",
476 "scifa4_ctrl", "scifa4"),
477 /* SCIFB (BT) */
478 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.8", "pfc-sh73a0",
479 "scifb_data_0", "scifb"),
480 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.8", "pfc-sh73a0",
481 "scifb_clk_0", "scifb"),
482 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.8", "pfc-sh73a0",
483 "scifb_ctrl_0", "scifb"),
484 /* SDHI0 (microSD) */
485 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
486 "sdhi0_data4", "sdhi0"),
487 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
488 "sdhi0_ctrl", "sdhi0"),
489 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
490 "sdhi0_cd", "sdhi0"),
491 PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
492 "sdhi0_data4", pin_pullup_conf),
493 PIN_MAP_CONFIGS_PIN_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
494 "PORT256", pin_pullup_conf),
495 PIN_MAP_CONFIGS_PIN_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
496 "PORT251", pin_pullup_conf),
497 /* SDHI1 (BCM4330) */
498 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0",
499 "sdhi1_data4", "sdhi1"),
500 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0",
501 "sdhi1_ctrl", "sdhi1"),
502 PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0",
503 "sdhi1_data4", pin_pullup_conf),
504 PIN_MAP_CONFIGS_PIN_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0",
505 "PORT263", pin_pullup_conf),
506 /* SMSC911X */
507 PIN_MAP_MUX_GROUP_DEFAULT("smsc911x.0", "pfc-sh73a0",
508 "bsc_data_0_7", "bsc"),
509 PIN_MAP_MUX_GROUP_DEFAULT("smsc911x.0", "pfc-sh73a0",
510 "bsc_data_8_15", "bsc"),
511 PIN_MAP_MUX_GROUP_DEFAULT("smsc911x.0", "pfc-sh73a0",
512 "bsc_cs5_a", "bsc"),
513 PIN_MAP_MUX_GROUP_DEFAULT("smsc911x.0", "pfc-sh73a0",
514 "bsc_we0", "bsc"),
515};
516
517static void __init kota2_init(void)
518{
519 regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers,
520 ARRAY_SIZE(fixed1v8_power_consumers), 1800000);
521 regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers,
522 ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
523 regulator_register_fixed(2, dummy_supplies, ARRAY_SIZE(dummy_supplies));
524
525 pinctrl_register_mappings(kota2_pinctrl_map,
526 ARRAY_SIZE(kota2_pinctrl_map));
527 sh73a0_pinmux_init();
528
529 /* SMSC911X */
530 gpio_request_one(144, GPIOF_IN, NULL); /* PINTA2 */
531 gpio_request_one(145, GPIOF_OUT_INIT_HIGH, NULL); /* RESET */
532
533 /* MMCIF */
534 gpio_request_one(208, GPIOF_OUT_INIT_HIGH, NULL); /* Reset */
535
536#ifdef CONFIG_CACHE_L2X0
537 /* Early BRESP enable, Shared attribute override enable, 64K*8way */
538 l2x0_init(IOMEM(0xf0100000), 0x40460000, 0x82000fff);
539#endif
540 sh73a0_add_standard_devices();
541 platform_add_devices(kota2_devices, ARRAY_SIZE(kota2_devices));
542}
543
544MACHINE_START(KOTA2, "kota2")
545 .smp = smp_ops(sh73a0_smp_ops),
546 .map_io = sh73a0_map_io,
547 .init_early = sh73a0_add_early_devices,
548 .nr_irqs = NR_IRQS_LEGACY,
549 .init_irq = sh73a0_init_irq,
550 .init_machine = kota2_init,
551 .init_late = shmobile_init_late,
552 .init_time = sh73a0_earlytimer_init,
553MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-kzm9d-reference.c b/arch/arm/mach-shmobile/board-kzm9d-reference.c
new file mode 100644
index 000000000000..a7b28b24ab38
--- /dev/null
+++ b/arch/arm/mach-shmobile/board-kzm9d-reference.c
@@ -0,0 +1,46 @@
1/*
2 * kzm9d board support - Reference DT implementation
3 *
4 * Copyright (C) 2013 Renesas Solutions Corp.
5 * Copyright (C) 2013 Magnus Damm
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#include <linux/init.h>
22#include <linux/of_platform.h>
23#include <mach/emev2.h>
24#include <mach/common.h>
25#include <asm/mach/arch.h>
26
27static void __init kzm9d_add_standard_devices(void)
28{
29 emev2_clock_init();
30
31 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
32}
33
34static const char *kzm9d_boards_compat_dt[] __initdata = {
35 "renesas,kzm9d-reference",
36 NULL,
37};
38
39DT_MACHINE_START(KZM9D_DT, "kzm9d")
40 .smp = smp_ops(emev2_smp_ops),
41 .map_io = emev2_map_io,
42 .init_early = emev2_init_delay,
43 .init_machine = kzm9d_add_standard_devices,
44 .init_late = shmobile_init_late,
45 .dt_compat = kzm9d_boards_compat_dt,
46MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-kzm9d.c b/arch/arm/mach-shmobile/board-kzm9d.c
index 4368000e1127..30c2cc695b12 100644
--- a/arch/arm/mach-shmobile/board-kzm9d.c
+++ b/arch/arm/mach-shmobile/board-kzm9d.c
@@ -85,9 +85,7 @@ static const char *kzm9d_boards_compat_dt[] __initdata = {
85DT_MACHINE_START(KZM9D_DT, "kzm9d") 85DT_MACHINE_START(KZM9D_DT, "kzm9d")
86 .smp = smp_ops(emev2_smp_ops), 86 .smp = smp_ops(emev2_smp_ops),
87 .map_io = emev2_map_io, 87 .map_io = emev2_map_io,
88 .init_early = emev2_add_early_devices, 88 .init_early = emev2_init_delay,
89 .nr_irqs = NR_IRQS_LEGACY,
90 .init_irq = emev2_init_irq,
91 .init_machine = kzm9d_add_standard_devices, 89 .init_machine = kzm9d_add_standard_devices,
92 .init_late = shmobile_init_late, 90 .init_late = shmobile_init_late,
93 .dt_compat = kzm9d_boards_compat_dt, 91 .dt_compat = kzm9d_boards_compat_dt,
diff --git a/arch/arm/mach-shmobile/board-kzm9g-reference.c b/arch/arm/mach-shmobile/board-kzm9g-reference.c
index 44055fe8a45c..41092bb01ee5 100644
--- a/arch/arm/mach-shmobile/board-kzm9g-reference.c
+++ b/arch/arm/mach-shmobile/board-kzm9g-reference.c
@@ -24,7 +24,6 @@
24#include <linux/gpio.h> 24#include <linux/gpio.h>
25#include <linux/io.h> 25#include <linux/io.h>
26#include <linux/irq.h> 26#include <linux/irq.h>
27#include <linux/irqchip.h>
28#include <linux/input.h> 27#include <linux/input.h>
29#include <linux/of_platform.h> 28#include <linux/of_platform.h>
30#include <linux/pinctrl/machine.h> 29#include <linux/pinctrl/machine.h>
@@ -99,7 +98,6 @@ DT_MACHINE_START(KZM9G_DT, "kzm9g-reference")
99 .map_io = sh73a0_map_io, 98 .map_io = sh73a0_map_io,
100 .init_early = sh73a0_init_delay, 99 .init_early = sh73a0_init_delay,
101 .nr_irqs = NR_IRQS_LEGACY, 100 .nr_irqs = NR_IRQS_LEGACY,
102 .init_irq = irqchip_init,
103 .init_machine = kzm_init, 101 .init_machine = kzm_init,
104 .init_time = shmobile_timer_init, 102 .init_time = shmobile_timer_init,
105 .dt_compat = kzm9g_boards_compat_dt, 103 .dt_compat = kzm9g_boards_compat_dt,
diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
index 8d6bd5c5efb9..f89f16650731 100644
--- a/arch/arm/mach-shmobile/board-lager.c
+++ b/arch/arm/mach-shmobile/board-lager.c
@@ -22,7 +22,6 @@
22#include <linux/gpio_keys.h> 22#include <linux/gpio_keys.h>
23#include <linux/input.h> 23#include <linux/input.h>
24#include <linux/interrupt.h> 24#include <linux/interrupt.h>
25#include <linux/irqchip.h>
26#include <linux/kernel.h> 25#include <linux/kernel.h>
27#include <linux/leds.h> 26#include <linux/leds.h>
28#include <linux/pinctrl/machine.h> 27#include <linux/pinctrl/machine.h>
@@ -103,7 +102,7 @@ static const char *lager_boards_compat_dt[] __initdata = {
103}; 102};
104 103
105DT_MACHINE_START(LAGER_DT, "lager") 104DT_MACHINE_START(LAGER_DT, "lager")
106 .init_irq = irqchip_init, 105 .init_early = r8a7790_init_delay,
107 .init_time = r8a7790_timer_init, 106 .init_time = r8a7790_timer_init,
108 .init_machine = lager_add_standard_devices, 107 .init_machine = lager_add_standard_devices,
109 .dt_compat = lager_boards_compat_dt, 108 .dt_compat = lager_boards_compat_dt,
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index 85f51a849a50..af06753eb809 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -41,6 +41,7 @@
41#include <linux/mtd/physmap.h> 41#include <linux/mtd/physmap.h>
42#include <linux/mtd/sh_flctl.h> 42#include <linux/mtd/sh_flctl.h>
43#include <linux/pinctrl/machine.h> 43#include <linux/pinctrl/machine.h>
44#include <linux/platform_data/gpio_backlight.h>
44#include <linux/pm_clock.h> 45#include <linux/pm_clock.h>
45#include <linux/regulator/fixed.h> 46#include <linux/regulator/fixed.h>
46#include <linux/regulator/machine.h> 47#include <linux/regulator/machine.h>
@@ -49,7 +50,6 @@
49#include <linux/tca6416_keypad.h> 50#include <linux/tca6416_keypad.h>
50#include <linux/usb/renesas_usbhs.h> 51#include <linux/usb/renesas_usbhs.h>
51#include <linux/dma-mapping.h> 52#include <linux/dma-mapping.h>
52
53#include <video/sh_mobile_hdmi.h> 53#include <video/sh_mobile_hdmi.h>
54#include <video/sh_mobile_lcdc.h> 54#include <video/sh_mobile_lcdc.h>
55#include <media/sh_mobile_ceu.h> 55#include <media/sh_mobile_ceu.h>
@@ -346,7 +346,7 @@ static struct platform_device meram_device = {
346 }, 346 },
347}; 347};
348 348
349/* LCDC */ 349/* LCDC and backlight */
350static struct fb_videomode mackerel_lcdc_modes[] = { 350static struct fb_videomode mackerel_lcdc_modes[] = {
351 { 351 {
352 .name = "WVGA Panel", 352 .name = "WVGA Panel",
@@ -362,13 +362,6 @@ static struct fb_videomode mackerel_lcdc_modes[] = {
362 }, 362 },
363}; 363};
364 364
365static int mackerel_set_brightness(int brightness)
366{
367 gpio_set_value(31, brightness);
368
369 return 0;
370}
371
372static const struct sh_mobile_meram_cfg lcd_meram_cfg = { 365static const struct sh_mobile_meram_cfg lcd_meram_cfg = {
373 .icb[0] = { 366 .icb[0] = {
374 .meram_size = 0x40, 367 .meram_size = 0x40,
@@ -393,11 +386,6 @@ static struct sh_mobile_lcdc_info lcdc_info = {
393 .width = 152, 386 .width = 152,
394 .height = 91, 387 .height = 91,
395 }, 388 },
396 .bl_info = {
397 .name = "sh_mobile_lcdc_bl",
398 .max_brightness = 1,
399 .set_brightness = mackerel_set_brightness,
400 },
401 .meram_cfg = &lcd_meram_cfg, 389 .meram_cfg = &lcd_meram_cfg,
402 } 390 }
403}; 391};
@@ -425,6 +413,20 @@ static struct platform_device lcdc_device = {
425 }, 413 },
426}; 414};
427 415
416static struct gpio_backlight_platform_data gpio_backlight_data = {
417 .fbdev = &lcdc_device.dev,
418 .gpio = 31,
419 .def_value = 1,
420 .name = "backlight",
421};
422
423static struct platform_device gpio_backlight_device = {
424 .name = "gpio-backlight",
425 .dev = {
426 .platform_data = &gpio_backlight_data,
427 },
428};
429
428/* HDMI */ 430/* HDMI */
429static struct sh_mobile_hdmi_info hdmi_info = { 431static struct sh_mobile_hdmi_info hdmi_info = {
430 .flags = HDMI_SND_SRC_SPDIF, 432 .flags = HDMI_SND_SRC_SPDIF,
@@ -1231,6 +1233,7 @@ static struct platform_device *mackerel_devices[] __initdata = {
1231 &nor_flash_device, 1233 &nor_flash_device,
1232 &smc911x_device, 1234 &smc911x_device,
1233 &lcdc_device, 1235 &lcdc_device,
1236 &gpio_backlight_device,
1234 &usbhs0_device, 1237 &usbhs0_device,
1235 &usbhs1_device, 1238 &usbhs1_device,
1236 &leds_device, 1239 &leds_device,
@@ -1441,9 +1444,6 @@ static void __init mackerel_init(void)
1441 ARRAY_SIZE(mackerel_pinctrl_map)); 1444 ARRAY_SIZE(mackerel_pinctrl_map));
1442 sh7372_pinmux_init(); 1445 sh7372_pinmux_init();
1443 1446
1444 /* backlight, off by default */
1445 gpio_request_one(31, GPIOF_OUT_INIT_LOW, NULL);
1446
1447 gpio_request_one(151, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */ 1447 gpio_request_one(151, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
1448 1448
1449 /* USBHS0 */ 1449 /* USBHS0 */
diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
index a7d1010505bf..7474a60f98ae 100644
--- a/arch/arm/mach-shmobile/board-marzen.c
+++ b/arch/arm/mach-shmobile/board-marzen.c
@@ -29,6 +29,7 @@
29#include <linux/dma-mapping.h> 29#include <linux/dma-mapping.h>
30#include <linux/pinctrl/machine.h> 30#include <linux/pinctrl/machine.h>
31#include <linux/platform_data/gpio-rcar.h> 31#include <linux/platform_data/gpio-rcar.h>
32#include <linux/platform_data/usb-rcar-phy.h>
32#include <linux/regulator/fixed.h> 33#include <linux/regulator/fixed.h>
33#include <linux/regulator/machine.h> 34#include <linux/regulator/machine.h>
34#include <linux/smsc911x.h> 35#include <linux/smsc911x.h>
@@ -37,7 +38,6 @@
37#include <linux/mmc/host.h> 38#include <linux/mmc/host.h>
38#include <linux/mmc/sh_mobile_sdhi.h> 39#include <linux/mmc/sh_mobile_sdhi.h>
39#include <linux/mfd/tmio.h> 40#include <linux/mfd/tmio.h>
40#include <mach/hardware.h>
41#include <mach/r8a7779.h> 41#include <mach/r8a7779.h>
42#include <mach/common.h> 42#include <mach/common.h>
43#include <mach/irqs.h> 43#include <mach/irqs.h>
@@ -57,7 +57,26 @@ static struct regulator_consumer_supply dummy_supplies[] = {
57 REGULATOR_SUPPLY("vdd33a", "smsc911x"), 57 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
58}; 58};
59 59
60static struct rcar_phy_platform_data usb_phy_platform_data __initdata; 60/* USB PHY */
61static struct resource usb_phy_resources[] = {
62 [0] = {
63 .start = 0xffe70800,
64 .end = 0xffe70900 - 1,
65 .flags = IORESOURCE_MEM,
66 },
67};
68
69static struct rcar_phy_platform_data usb_phy_platform_data;
70
71static struct platform_device usb_phy = {
72 .name = "rcar_usb_phy",
73 .id = -1,
74 .dev = {
75 .platform_data = &usb_phy_platform_data,
76 },
77 .resource = usb_phy_resources,
78 .num_resources = ARRAY_SIZE(usb_phy_resources),
79};
61 80
62/* SMSC LAN89218 */ 81/* SMSC LAN89218 */
63static struct resource smsc911x_resources[] = { 82static struct resource smsc911x_resources[] = {
@@ -184,6 +203,7 @@ static struct platform_device *marzen_devices[] __initdata = {
184 &thermal_device, 203 &thermal_device,
185 &hspi_device, 204 &hspi_device,
186 &leds_device, 205 &leds_device,
206 &usb_phy,
187}; 207};
188 208
189static const struct pinctrl_map marzen_pinctrl_map[] = { 209static const struct pinctrl_map marzen_pinctrl_map[] = {
@@ -234,7 +254,6 @@ static void __init marzen_init(void)
234 r8a7779_init_irq_extpin(1); /* IRQ1 as individual interrupt */ 254 r8a7779_init_irq_extpin(1); /* IRQ1 as individual interrupt */
235 255
236 r8a7779_add_standard_devices(); 256 r8a7779_add_standard_devices();
237 r8a7779_add_usb_phy_device(&usb_phy_platform_data);
238 platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices)); 257 platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices));
239} 258}
240 259
diff --git a/arch/arm/mach-shmobile/clock-emev2.c b/arch/arm/mach-shmobile/clock-emev2.c
index 4710f1847bb7..5ac13ba71d54 100644
--- a/arch/arm/mach-shmobile/clock-emev2.c
+++ b/arch/arm/mach-shmobile/clock-emev2.c
@@ -40,7 +40,6 @@
40#define USIB2SCLKDIV 0x65c 40#define USIB2SCLKDIV 0x65c
41#define USIB3SCLKDIV 0x660 41#define USIB3SCLKDIV 0x660
42#define STI_CLKSEL 0x688 42#define STI_CLKSEL 0x688
43#define SMU_GENERAL_REG0 0x7c0
44 43
45/* not pretty, but hey */ 44/* not pretty, but hey */
46static void __iomem *smu_base; 45static void __iomem *smu_base;
@@ -51,11 +50,6 @@ static void emev2_smu_write(unsigned long value, int offs)
51 iowrite32(value, smu_base + offs); 50 iowrite32(value, smu_base + offs);
52} 51}
53 52
54void emev2_set_boot_vector(unsigned long value)
55{
56 emev2_smu_write(value, SMU_GENERAL_REG0);
57}
58
59static struct clk_mapping smu_mapping = { 53static struct clk_mapping smu_mapping = {
60 .phys = EMEV2_SMU_BASE, 54 .phys = EMEV2_SMU_BASE,
61 .len = PAGE_SIZE, 55 .len = PAGE_SIZE,
@@ -205,23 +199,11 @@ static struct clk_lookup lookups[] = {
205void __init emev2_clock_init(void) 199void __init emev2_clock_init(void)
206{ 200{
207 int k, ret = 0; 201 int k, ret = 0;
208 static int is_setup;
209
210 /* yuck, this is ugly as hell, but the non-smp case of clocks
211 * code is now designed to rely on ioremap() instead of static
212 * entity maps. in the case of smp we need access to the SMU
213 * register earlier than ioremap() is actually working without
214 * any static maps. to enable SMP in ugly but with dynamic
215 * mappings we have to call emev2_clock_init() from different
216 * places depending on UP and SMP...
217 */
218 if (is_setup++)
219 return;
220 202
221 smu_base = ioremap(EMEV2_SMU_BASE, PAGE_SIZE); 203 smu_base = ioremap(EMEV2_SMU_BASE, PAGE_SIZE);
222 BUG_ON(!smu_base); 204 BUG_ON(!smu_base);
223 205
224 /* setup STI timer to run on 37.768 kHz and deassert reset */ 206 /* setup STI timer to run on 32.768 kHz and deassert reset */
225 emev2_smu_write(0, STI_CLKSEL); 207 emev2_smu_write(0, STI_CLKSEL);
226 emev2_smu_write(1, STI_RSTCTRL); 208 emev2_smu_write(1, STI_RSTCTRL);
227 209
diff --git a/arch/arm/mach-shmobile/clock-r8a73a4.c b/arch/arm/mach-shmobile/clock-r8a73a4.c
index 5f7fe628b8a1..8ea5ef6c79cc 100644
--- a/arch/arm/mach-shmobile/clock-r8a73a4.c
+++ b/arch/arm/mach-shmobile/clock-r8a73a4.c
@@ -30,10 +30,12 @@
30 30
31#define SMSTPCR2 0xe6150138 31#define SMSTPCR2 0xe6150138
32#define SMSTPCR3 0xe615013c 32#define SMSTPCR3 0xe615013c
33#define SMSTPCR4 0xe6150140
33#define SMSTPCR5 0xe6150144 34#define SMSTPCR5 0xe6150144
34 35
35#define FRQCRA 0xE6150000 36#define FRQCRA 0xE6150000
36#define FRQCRB 0xE6150004 37#define FRQCRB 0xE6150004
38#define FRQCRC 0xE61500E0
37#define VCLKCR1 0xE6150008 39#define VCLKCR1 0xE6150008
38#define VCLKCR2 0xE615000C 40#define VCLKCR2 0xE615000C
39#define VCLKCR3 0xE615001C 41#define VCLKCR3 0xE615001C
@@ -52,6 +54,7 @@
52#define HSICKCR 0xE615026C 54#define HSICKCR 0xE615026C
53#define M4CKCR 0xE6150098 55#define M4CKCR 0xE6150098
54#define PLLECR 0xE61500D0 56#define PLLECR 0xE61500D0
57#define PLL0CR 0xE61500D8
55#define PLL1CR 0xE6150028 58#define PLL1CR 0xE6150028
56#define PLL2CR 0xE615002C 59#define PLL2CR 0xE615002C
57#define PLL2SCR 0xE61501F4 60#define PLL2SCR 0xE61501F4
@@ -177,6 +180,7 @@ static struct sh_clk_ops pll_clk_ops = {
177 .mapping = &cpg_mapping, \ 180 .mapping = &cpg_mapping, \
178 } 181 }
179 182
183PLL_CLOCK(pll0_clk, &main_clk, pll_parent_main, 1, 20, PLL0CR, 0);
180PLL_CLOCK(pll1_clk, &main_clk, pll_parent_main, 1, 7, PLL1CR, 1); 184PLL_CLOCK(pll1_clk, &main_clk, pll_parent_main, 1, 7, PLL1CR, 1);
181PLL_CLOCK(pll2_clk, &main_div2_clk, pll_parent_main_extal, 3, 5, PLL2CR, 2); 185PLL_CLOCK(pll2_clk, &main_div2_clk, pll_parent_main_extal, 3, 5, PLL2CR, 2);
182PLL_CLOCK(pll2s_clk, &main_div2_clk, pll_parent_main_extal, 3, 5, PLL2SCR, 4); 186PLL_CLOCK(pll2s_clk, &main_div2_clk, pll_parent_main_extal, 3, 5, PLL2SCR, 4);
@@ -184,6 +188,157 @@ PLL_CLOCK(pll2h_clk, &main_div2_clk, pll_parent_main_extal, 3, 5, PLL2HCR, 5);
184 188
185SH_FIXED_RATIO_CLK(pll1_div2_clk, pll1_clk, div2); 189SH_FIXED_RATIO_CLK(pll1_div2_clk, pll1_clk, div2);
186 190
191static atomic_t frqcr_lock;
192
193/* Several clocks need to access FRQCRB, have to lock */
194static bool frqcr_kick_check(struct clk *clk)
195{
196 return !(ioread32(CPG_MAP(FRQCRB)) & BIT(31));
197}
198
199static int frqcr_kick_do(struct clk *clk)
200{
201 int i;
202
203 /* set KICK bit in FRQCRB to update hardware setting, check success */
204 iowrite32(ioread32(CPG_MAP(FRQCRB)) | BIT(31), CPG_MAP(FRQCRB));
205 for (i = 1000; i; i--)
206 if (ioread32(CPG_MAP(FRQCRB)) & BIT(31))
207 cpu_relax();
208 else
209 return 0;
210
211 return -ETIMEDOUT;
212}
213
214static int zclk_set_rate(struct clk *clk, unsigned long rate)
215{
216 void __iomem *frqcrc;
217 int ret;
218 unsigned long step, p_rate;
219 u32 val;
220
221 if (!clk->parent || !__clk_get(clk->parent))
222 return -ENODEV;
223
224 if (!atomic_inc_and_test(&frqcr_lock) || !frqcr_kick_check(clk)) {
225 ret = -EBUSY;
226 goto done;
227 }
228
229 /*
230 * Users are supposed to first call clk_set_rate() only with
231 * clk_round_rate() results. So, we don't fix wrong rates here, but
232 * guard against them anyway
233 */
234
235 p_rate = clk_get_rate(clk->parent);
236 if (rate == p_rate) {
237 val = 0;
238 } else {
239 step = DIV_ROUND_CLOSEST(p_rate, 32);
240
241 if (rate > p_rate || rate < step) {
242 ret = -EINVAL;
243 goto done;
244 }
245
246 val = 32 - rate / step;
247 }
248
249 frqcrc = clk->mapped_reg + (FRQCRC - (u32)clk->enable_reg);
250
251 iowrite32((ioread32(frqcrc) & ~(clk->div_mask << clk->enable_bit)) |
252 (val << clk->enable_bit), frqcrc);
253
254 ret = frqcr_kick_do(clk);
255
256done:
257 atomic_dec(&frqcr_lock);
258 __clk_put(clk->parent);
259 return ret;
260}
261
262static long zclk_round_rate(struct clk *clk, unsigned long rate)
263{
264 /*
265 * theoretical rate = parent rate * multiplier / 32,
266 * where 1 <= multiplier <= 32. Therefore we should do
267 * multiplier = rate * 32 / parent rate
268 * rounded rate = parent rate * multiplier / 32.
269 * However, multiplication before division won't fit in 32 bits, so
270 * we sacrifice some precision by first dividing and then multiplying.
271 * To find the nearest divisor we calculate both and pick up the best
272 * one. This avoids 64-bit arithmetics.
273 */
274 unsigned long step, mul_min, mul_max, rate_min, rate_max;
275
276 rate_max = clk_get_rate(clk->parent);
277
278 /* output freq <= parent */
279 if (rate >= rate_max)
280 return rate_max;
281
282 step = DIV_ROUND_CLOSEST(rate_max, 32);
283 /* output freq >= parent / 32 */
284 if (step >= rate)
285 return step;
286
287 mul_min = rate / step;
288 mul_max = DIV_ROUND_UP(rate, step);
289 rate_min = step * mul_min;
290 if (mul_max == mul_min)
291 return rate_min;
292
293 rate_max = step * mul_max;
294
295 if (rate_max - rate < rate - rate_min)
296 return rate_max;
297
298 return rate_min;
299}
300
301static unsigned long zclk_recalc(struct clk *clk)
302{
303 void __iomem *frqcrc = FRQCRC - (u32)clk->enable_reg + clk->mapped_reg;
304 unsigned int max = clk->div_mask + 1;
305 unsigned long val = ((ioread32(frqcrc) >> clk->enable_bit) &
306 clk->div_mask);
307
308 return DIV_ROUND_CLOSEST(clk_get_rate(clk->parent), max) *
309 (max - val);
310}
311
312static struct sh_clk_ops zclk_ops = {
313 .recalc = zclk_recalc,
314 .set_rate = zclk_set_rate,
315 .round_rate = zclk_round_rate,
316};
317
318static struct clk z_clk = {
319 .parent = &pll0_clk,
320 .div_mask = 0x1f,
321 .enable_bit = 8,
322 /* We'll need to access FRQCRB and FRQCRC */
323 .enable_reg = (void __iomem *)FRQCRB,
324 .ops = &zclk_ops,
325};
326
327/*
328 * It seems only 1/2 divider is usable in manual mode. 1/2 / 2/3
329 * switching is only available in auto-DVFS mode
330 */
331SH_FIXED_RATIO_CLK(pll0_div2_clk, pll0_clk, div2);
332
333static struct clk z2_clk = {
334 .parent = &pll0_div2_clk,
335 .div_mask = 0x1f,
336 .enable_bit = 0,
337 /* We'll need to access FRQCRB and FRQCRC */
338 .enable_reg = (void __iomem *)FRQCRB,
339 .ops = &zclk_ops,
340};
341
187static struct clk *main_clks[] = { 342static struct clk *main_clks[] = {
188 &extalr_clk, 343 &extalr_clk,
189 &extal1_clk, 344 &extal1_clk,
@@ -195,22 +350,23 @@ static struct clk *main_clks[] = {
195 &main_div2_clk, 350 &main_div2_clk,
196 &fsiack_clk, 351 &fsiack_clk,
197 &fsibck_clk, 352 &fsibck_clk,
353 &pll0_clk,
198 &pll1_clk, 354 &pll1_clk,
199 &pll1_div2_clk, 355 &pll1_div2_clk,
200 &pll2_clk, 356 &pll2_clk,
201 &pll2s_clk, 357 &pll2s_clk,
202 &pll2h_clk, 358 &pll2h_clk,
359 &z_clk,
360 &pll0_div2_clk,
361 &z2_clk,
203}; 362};
204 363
205/* DIV4 */ 364/* DIV4 */
206static void div4_kick(struct clk *clk) 365static void div4_kick(struct clk *clk)
207{ 366{
208 unsigned long value; 367 if (!WARN(!atomic_inc_and_test(&frqcr_lock), "FRQCR* lock broken!\n"))
209 368 frqcr_kick_do(clk);
210 /* set KICK bit in FRQCRB to update hardware setting */ 369 atomic_dec(&frqcr_lock);
211 value = ioread32(CPG_MAP(FRQCRB));
212 value |= (1 << 31);
213 iowrite32(value, CPG_MAP(FRQCRB));
214} 370}
215 371
216static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 18, 24, 0, 36, 48, 10}; 372static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 18, 24, 0, 36, 48, 10};
@@ -349,8 +505,10 @@ static struct clk div6_clks[DIV6_NR] = {
349/* MSTP */ 505/* MSTP */
350enum { 506enum {
351 MSTP217, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, 507 MSTP217, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203,
352 MSTP315, MSTP314, MSTP313, MSTP312, MSTP305, 508 MSTP329, MSTP323, MSTP318, MSTP317, MSTP316,
353 MSTP522, 509 MSTP315, MSTP314, MSTP313, MSTP312, MSTP305, MSTP300,
510 MSTP411, MSTP410, MSTP409,
511 MSTP522, MSTP515,
354 MSTP_NR 512 MSTP_NR
355}; 513};
356 514
@@ -361,12 +519,22 @@ static struct clk mstp_clks[MSTP_NR] = {
361 [MSTP207] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 7, 0), /* SCIFB1 */ 519 [MSTP207] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 7, 0), /* SCIFB1 */
362 [MSTP216] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 16, 0), /* SCIFB2 */ 520 [MSTP216] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 16, 0), /* SCIFB2 */
363 [MSTP217] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 17, 0), /* SCIFB3 */ 521 [MSTP217] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 17, 0), /* SCIFB3 */
522 [MSTP300] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR3, 0, 0), /* IIC2 */
364 [MSTP305] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC1],SMSTPCR3, 5, 0), /* MMCIF1 */ 523 [MSTP305] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC1],SMSTPCR3, 5, 0), /* MMCIF1 */
365 [MSTP312] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI2],SMSTPCR3, 12, 0), /* SDHI2 */ 524 [MSTP312] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI2],SMSTPCR3, 12, 0), /* SDHI2 */
366 [MSTP313] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI1],SMSTPCR3, 13, 0), /* SDHI1 */ 525 [MSTP313] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI1],SMSTPCR3, 13, 0), /* SDHI1 */
367 [MSTP314] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI0],SMSTPCR3, 14, 0), /* SDHI0 */ 526 [MSTP314] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI0],SMSTPCR3, 14, 0), /* SDHI0 */
368 [MSTP315] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC0],SMSTPCR3, 15, 0), /* MMCIF0 */ 527 [MSTP315] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC0],SMSTPCR3, 15, 0), /* MMCIF0 */
528 [MSTP316] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR3, 16, 0), /* IIC6 */
529 [MSTP317] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR3, 17, 0), /* IIC7 */
530 [MSTP318] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR3, 18, 0), /* IIC0 */
531 [MSTP323] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR3, 23, 0), /* IIC1 */
532 [MSTP329] = SH_CLK_MSTP32(&extalr_clk, SMSTPCR3, 29, 0), /* CMT10 */
533 [MSTP409] = SH_CLK_MSTP32(&main_div2_clk, SMSTPCR4, 9, 0), /* IIC5 */
534 [MSTP410] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR4, 10, 0), /* IIC4 */
535 [MSTP411] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR4, 11, 0), /* IIC3 */
369 [MSTP522] = SH_CLK_MSTP32(&extal2_clk, SMSTPCR5, 22, 0), /* Thermal */ 536 [MSTP522] = SH_CLK_MSTP32(&extal2_clk, SMSTPCR5, 22, 0), /* Thermal */
537 [MSTP515] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR5, 15, 0), /* IIC8 */
370}; 538};
371 539
372static struct clk_lookup lookups[] = { 540static struct clk_lookup lookups[] = {
@@ -386,6 +554,9 @@ static struct clk_lookup lookups[] = {
386 CLKDEV_CON_ID("pll2s", &pll2s_clk), 554 CLKDEV_CON_ID("pll2s", &pll2s_clk),
387 CLKDEV_CON_ID("pll2h", &pll2h_clk), 555 CLKDEV_CON_ID("pll2h", &pll2h_clk),
388 556
557 /* CPU clock */
558 CLKDEV_DEV_ID("cpufreq-cpu0", &z_clk),
559
389 /* DIV6 */ 560 /* DIV6 */
390 CLKDEV_CON_ID("zb", &div6_clks[DIV6_ZB]), 561 CLKDEV_CON_ID("zb", &div6_clks[DIV6_ZB]),
391 CLKDEV_CON_ID("vck1", &div6_clks[DIV6_VCK1]), 562 CLKDEV_CON_ID("vck1", &div6_clks[DIV6_VCK1]),
@@ -408,6 +579,7 @@ static struct clk_lookup lookups[] = {
408 CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP216]), 579 CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP216]),
409 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP217]), 580 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP217]),
410 CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]), 581 CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
582 CLKDEV_DEV_ID("e6520000.i2c", &mstp_clks[MSTP300]),
411 CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]), 583 CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
412 CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]), 584 CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
413 CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP312]), 585 CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP312]),
@@ -418,6 +590,15 @@ static struct clk_lookup lookups[] = {
418 CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]), 590 CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]),
419 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]), 591 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
420 CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]), 592 CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]),
593 CLKDEV_DEV_ID("e6550000.i2c", &mstp_clks[MSTP316]),
594 CLKDEV_DEV_ID("e6560000.i2c", &mstp_clks[MSTP317]),
595 CLKDEV_DEV_ID("e6500000.i2c", &mstp_clks[MSTP318]),
596 CLKDEV_DEV_ID("e6510000.i2c", &mstp_clks[MSTP323]),
597 CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]),
598 CLKDEV_DEV_ID("e60b0000.i2c", &mstp_clks[MSTP409]),
599 CLKDEV_DEV_ID("e6540000.i2c", &mstp_clks[MSTP410]),
600 CLKDEV_DEV_ID("e6530000.i2c", &mstp_clks[MSTP411]),
601 CLKDEV_DEV_ID("e6570000.i2c", &mstp_clks[MSTP515]),
421 602
422 /* for DT */ 603 /* for DT */
423 CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]), 604 CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
@@ -429,6 +610,8 @@ void __init r8a73a4_clock_init(void)
429 int k, ret = 0; 610 int k, ret = 0;
430 u32 ckscr; 611 u32 ckscr;
431 612
613 atomic_set(&frqcr_lock, -1);
614
432 reg = ioremap_nocache(CKSCR, PAGE_SIZE); 615 reg = ioremap_nocache(CKSCR, PAGE_SIZE);
433 BUG_ON(!reg); 616 BUG_ON(!reg);
434 ckscr = ioread32(reg); 617 ckscr = ioread32(reg);
diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
index 5d71313df52d..50d96f9cf981 100644
--- a/arch/arm/mach-shmobile/clock-r8a7790.c
+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
@@ -24,6 +24,7 @@
24#include <linux/clkdev.h> 24#include <linux/clkdev.h>
25#include <mach/clock.h> 25#include <mach/clock.h>
26#include <mach/common.h> 26#include <mach/common.h>
27#include <mach/r8a7790.h>
27 28
28/* 29/*
29 * MD EXTAL PLL0 PLL1 PLL3 30 * MD EXTAL PLL0 PLL1 PLL3
@@ -42,16 +43,15 @@
42 * see "p1 / 2" on R8A7790_CLOCK_ROOT() below 43 * see "p1 / 2" on R8A7790_CLOCK_ROOT() below
43 */ 44 */
44 45
45#define MD(nr) (1 << nr)
46
47#define CPG_BASE 0xe6150000 46#define CPG_BASE 0xe6150000
48#define CPG_LEN 0x1000 47#define CPG_LEN 0x1000
49 48
49#define SMSTPCR1 0xe6150134
50#define SMSTPCR2 0xe6150138 50#define SMSTPCR2 0xe6150138
51#define SMSTPCR3 0xe615013c 51#define SMSTPCR3 0xe615013c
52#define SMSTPCR5 0xe6150144
52#define SMSTPCR7 0xe615014c 53#define SMSTPCR7 0xe615014c
53 54
54#define MODEMR 0xE6160060
55#define SDCKCR 0xE6150074 55#define SDCKCR 0xE6150074
56#define SD2CKCR 0xE6150078 56#define SD2CKCR 0xE6150078
57#define SD3CKCR 0xE615007C 57#define SD3CKCR 0xE615007C
@@ -182,14 +182,19 @@ static struct clk div6_clks[DIV6_NR] = {
182enum { 182enum {
183 MSTP721, MSTP720, 183 MSTP721, MSTP720,
184 MSTP717, MSTP716, 184 MSTP717, MSTP716,
185 MSTP522,
185 MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304, 186 MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304,
186 MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, 187 MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202,
188 MSTP124,
187 MSTP_NR 189 MSTP_NR
188}; 190};
189 191
190static struct clk mstp_clks[MSTP_NR] = { 192static struct clk mstp_clks[MSTP_NR] = {
191 [MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */ 193 [MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
192 [MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */ 194 [MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
195 [MSTP717] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */
196 [MSTP716] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 16, 0), /* HSCIF1 */
197 [MSTP522] = SH_CLK_MSTP32(&extal_clk, SMSTPCR5, 22, 0), /* Thermal */
193 [MSTP315] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC0], SMSTPCR3, 15, 0), /* MMC0 */ 198 [MSTP315] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC0], SMSTPCR3, 15, 0), /* MMC0 */
194 [MSTP314] = SH_CLK_MSTP32(&div4_clks[DIV4_SD0], SMSTPCR3, 14, 0), /* SDHI0 */ 199 [MSTP314] = SH_CLK_MSTP32(&div4_clks[DIV4_SD0], SMSTPCR3, 14, 0), /* SDHI0 */
195 [MSTP313] = SH_CLK_MSTP32(&div4_clks[DIV4_SD1], SMSTPCR3, 13, 0), /* SDHI1 */ 200 [MSTP313] = SH_CLK_MSTP32(&div4_clks[DIV4_SD1], SMSTPCR3, 13, 0), /* SDHI1 */
@@ -203,8 +208,7 @@ static struct clk mstp_clks[MSTP_NR] = {
203 [MSTP204] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 4, 0), /* SCIFA0 */ 208 [MSTP204] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 4, 0), /* SCIFA0 */
204 [MSTP203] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 3, 0), /* SCIFA1 */ 209 [MSTP203] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 3, 0), /* SCIFA1 */
205 [MSTP202] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 2, 0), /* SCIFA2 */ 210 [MSTP202] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 2, 0), /* SCIFA2 */
206 [MSTP717] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */ 211 [MSTP124] = SH_CLK_MSTP32(&rclk_clk, SMSTPCR1, 24, 0), /* CMT0 */
207 [MSTP716] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 16, 0), /* HSCIF1 */
208}; 212};
209 213
210static struct clk_lookup lookups[] = { 214static struct clk_lookup lookups[] = {
@@ -254,6 +258,7 @@ static struct clk_lookup lookups[] = {
254 CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP720]), 258 CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP720]),
255 CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP717]), 259 CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP717]),
256 CLKDEV_DEV_ID("sh-sci.9", &mstp_clks[MSTP716]), 260 CLKDEV_DEV_ID("sh-sci.9", &mstp_clks[MSTP716]),
261 CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
257 CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]), 262 CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]),
258 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]), 263 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
259 CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]), 264 CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]),
@@ -266,6 +271,7 @@ static struct clk_lookup lookups[] = {
266 CLKDEV_DEV_ID("sh_mobile_sdhi.3", &mstp_clks[MSTP311]), 271 CLKDEV_DEV_ID("sh_mobile_sdhi.3", &mstp_clks[MSTP311]),
267 CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]), 272 CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
268 CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]), 273 CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
274 CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
269}; 275};
270 276
271#define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31) \ 277#define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31) \
@@ -280,14 +286,9 @@ static struct clk_lookup lookups[] = {
280 286
281void __init r8a7790_clock_init(void) 287void __init r8a7790_clock_init(void)
282{ 288{
283 void __iomem *modemr = ioremap_nocache(MODEMR, PAGE_SIZE); 289 u32 mode = r8a7790_read_mode_pins();
284 u32 mode;
285 int k, ret = 0; 290 int k, ret = 0;
286 291
287 BUG_ON(!modemr);
288 mode = ioread32(modemr);
289 iounmap(modemr);
290
291 switch (mode & (MD(14) | MD(13))) { 292 switch (mode & (MD(14) | MD(13))) {
292 case 0: 293 case 0:
293 R8A7790_CLOCK_ROOT(15, &extal_clk, 172, 208, 106, 88); 294 R8A7790_CLOCK_ROOT(15, &extal_clk, 172, 208, 106, 88);
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index d9fd0336b910..1942eaef5181 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -555,7 +555,7 @@ enum { MSTP001,
555 MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, 555 MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
556 MSTP331, MSTP329, MSTP328, MSTP325, MSTP323, MSTP322, 556 MSTP331, MSTP329, MSTP328, MSTP325, MSTP323, MSTP322,
557 MSTP314, MSTP313, MSTP312, MSTP311, 557 MSTP314, MSTP313, MSTP312, MSTP311,
558 MSTP303, MSTP302, MSTP301, MSTP300, 558 MSTP304, MSTP303, MSTP302, MSTP301, MSTP300,
559 MSTP411, MSTP410, MSTP403, 559 MSTP411, MSTP410, MSTP403,
560 MSTP_NR }; 560 MSTP_NR };
561 561
@@ -593,6 +593,7 @@ static struct clk mstp_clks[MSTP_NR] = {
593 [MSTP313] = MSTP(&div6_clks[DIV6_SDHI1], SMSTPCR3, 13, 0), /* SDHI1 */ 593 [MSTP313] = MSTP(&div6_clks[DIV6_SDHI1], SMSTPCR3, 13, 0), /* SDHI1 */
594 [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */ 594 [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */
595 [MSTP311] = MSTP(&div6_clks[DIV6_SDHI2], SMSTPCR3, 11, 0), /* SDHI2 */ 595 [MSTP311] = MSTP(&div6_clks[DIV6_SDHI2], SMSTPCR3, 11, 0), /* SDHI2 */
596 [MSTP304] = MSTP(&main_div2_clk, SMSTPCR3, 4, 0), /* TPU0 */
596 [MSTP303] = MSTP(&main_div2_clk, SMSTPCR3, 3, 0), /* TPU1 */ 597 [MSTP303] = MSTP(&main_div2_clk, SMSTPCR3, 3, 0), /* TPU1 */
597 [MSTP302] = MSTP(&main_div2_clk, SMSTPCR3, 2, 0), /* TPU2 */ 598 [MSTP302] = MSTP(&main_div2_clk, SMSTPCR3, 2, 0), /* TPU2 */
598 [MSTP301] = MSTP(&main_div2_clk, SMSTPCR3, 1, 0), /* TPU3 */ 599 [MSTP301] = MSTP(&main_div2_clk, SMSTPCR3, 1, 0), /* TPU3 */
@@ -669,10 +670,11 @@ static struct clk_lookup lookups[] = {
669 CLKDEV_DEV_ID("e6bd0000.mmcif", &mstp_clks[MSTP312]), /* MMCIF0 */ 670 CLKDEV_DEV_ID("e6bd0000.mmcif", &mstp_clks[MSTP312]), /* MMCIF0 */
670 CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]), /* SDHI2 */ 671 CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]), /* SDHI2 */
671 CLKDEV_DEV_ID("ee140000.sdhi", &mstp_clks[MSTP311]), /* SDHI2 */ 672 CLKDEV_DEV_ID("ee140000.sdhi", &mstp_clks[MSTP311]), /* SDHI2 */
672 CLKDEV_DEV_ID("leds-renesas-tpu.12", &mstp_clks[MSTP303]), /* TPU1 */ 673 CLKDEV_DEV_ID("renesas-tpu-pwm.0", &mstp_clks[MSTP304]), /* TPU0 */
673 CLKDEV_DEV_ID("leds-renesas-tpu.21", &mstp_clks[MSTP302]), /* TPU2 */ 674 CLKDEV_DEV_ID("renesas-tpu-pwm.1", &mstp_clks[MSTP303]), /* TPU1 */
674 CLKDEV_DEV_ID("leds-renesas-tpu.30", &mstp_clks[MSTP301]), /* TPU3 */ 675 CLKDEV_DEV_ID("renesas-tpu-pwm.2", &mstp_clks[MSTP302]), /* TPU2 */
675 CLKDEV_DEV_ID("leds-renesas-tpu.41", &mstp_clks[MSTP300]), /* TPU4 */ 676 CLKDEV_DEV_ID("renesas-tpu-pwm.3", &mstp_clks[MSTP301]), /* TPU3 */
677 CLKDEV_DEV_ID("renesas-tpu-pwm.4", &mstp_clks[MSTP300]), /* TPU4 */
676 CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* I2C3 */ 678 CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* I2C3 */
677 CLKDEV_DEV_ID("e6826000.i2c", &mstp_clks[MSTP411]), /* I2C3 */ 679 CLKDEV_DEV_ID("e6826000.i2c", &mstp_clks[MSTP411]), /* I2C3 */
678 CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* I2C4 */ 680 CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* I2C4 */
diff --git a/arch/arm/mach-shmobile/include/mach/dma.h b/arch/arm/mach-shmobile/include/mach/dma.h
deleted file mode 100644
index 40a8c178f10d..000000000000
--- a/arch/arm/mach-shmobile/include/mach/dma.h
+++ /dev/null
@@ -1 +0,0 @@
1/* empty */
diff --git a/arch/arm/mach-shmobile/include/mach/emev2.h b/arch/arm/mach-shmobile/include/mach/emev2.h
index ac3751705cab..c2eb7568d9be 100644
--- a/arch/arm/mach-shmobile/include/mach/emev2.h
+++ b/arch/arm/mach-shmobile/include/mach/emev2.h
@@ -2,11 +2,9 @@
2#define __ASM_EMEV2_H__ 2#define __ASM_EMEV2_H__
3 3
4extern void emev2_map_io(void); 4extern void emev2_map_io(void);
5extern void emev2_init_irq(void); 5extern void emev2_init_delay(void);
6extern void emev2_add_early_devices(void);
7extern void emev2_add_standard_devices(void); 6extern void emev2_add_standard_devices(void);
8extern void emev2_clock_init(void); 7extern void emev2_clock_init(void);
9extern void emev2_set_boot_vector(unsigned long value);
10 8
11#define EMEV2_GPIO_BASE 200 9#define EMEV2_GPIO_BASE 200
12#define EMEV2_GPIO_IRQ(n) (EMEV2_GPIO_BASE + (n)) 10#define EMEV2_GPIO_IRQ(n) (EMEV2_GPIO_BASE + (n))
diff --git a/arch/arm/mach-shmobile/include/mach/hardware.h b/arch/arm/mach-shmobile/include/mach/hardware.h
deleted file mode 100644
index 99264a5ce5e4..000000000000
--- a/arch/arm/mach-shmobile/include/mach/hardware.h
+++ /dev/null
@@ -1,4 +0,0 @@
1#ifndef __ASM_MACH_HARDWARE_H
2#define __ASM_MACH_HARDWARE_H
3
4#endif /* __ASM_MACH_HARDWARE_H */
diff --git a/arch/arm/mach-shmobile/include/mach/r8a73a4.h b/arch/arm/mach-shmobile/include/mach/r8a73a4.h
index f043103e32c9..144a85e29245 100644
--- a/arch/arm/mach-shmobile/include/mach/r8a73a4.h
+++ b/arch/arm/mach-shmobile/include/mach/r8a73a4.h
@@ -4,5 +4,6 @@
4void r8a73a4_add_standard_devices(void); 4void r8a73a4_add_standard_devices(void);
5void r8a73a4_clock_init(void); 5void r8a73a4_clock_init(void);
6void r8a73a4_pinmux_init(void); 6void r8a73a4_pinmux_init(void);
7void r8a73a4_init_delay(void);
7 8
8#endif /* __ASM_R8A73A4_H__ */ 9#endif /* __ASM_R8A73A4_H__ */
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7740.h b/arch/arm/mach-shmobile/include/mach/r8a7740.h
index b34d19b5ca5c..56f375005fcd 100644
--- a/arch/arm/mach-shmobile/include/mach/r8a7740.h
+++ b/arch/arm/mach-shmobile/include/mach/r8a7740.h
@@ -42,6 +42,8 @@ enum {
42 SHDMA_SLAVE_FSIB_TX, 42 SHDMA_SLAVE_FSIB_TX,
43 SHDMA_SLAVE_USBHS_TX, 43 SHDMA_SLAVE_USBHS_TX,
44 SHDMA_SLAVE_USBHS_RX, 44 SHDMA_SLAVE_USBHS_RX,
45 SHDMA_SLAVE_MMCIF_TX,
46 SHDMA_SLAVE_MMCIF_RX,
45}; 47};
46 48
47extern void r8a7740_meram_workaround(void); 49extern void r8a7740_meram_workaround(void);
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h
index 851d027a2f06..9b561bf4229f 100644
--- a/arch/arm/mach-shmobile/include/mach/r8a7778.h
+++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h
@@ -33,7 +33,6 @@ extern void r8a7778_add_mmc_device(struct sh_mmcif_plat_data *info);
33 33
34extern void r8a7778_init_late(void); 34extern void r8a7778_init_late(void);
35extern void r8a7778_init_delay(void); 35extern void r8a7778_init_delay(void);
36extern void r8a7778_init_irq(void);
37extern void r8a7778_init_irq_dt(void); 36extern void r8a7778_init_irq_dt(void);
38extern void r8a7778_clock_init(void); 37extern void r8a7778_clock_init(void);
39extern void r8a7778_init_irq_extpin(int irlm); 38extern void r8a7778_init_irq_extpin(int irlm);
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7779.h b/arch/arm/mach-shmobile/include/mach/r8a7779.h
index fc47073c7ba9..f10727f77b11 100644
--- a/arch/arm/mach-shmobile/include/mach/r8a7779.h
+++ b/arch/arm/mach-shmobile/include/mach/r8a7779.h
@@ -4,7 +4,6 @@
4#include <linux/sh_clk.h> 4#include <linux/sh_clk.h>
5#include <linux/pm_domain.h> 5#include <linux/pm_domain.h>
6#include <linux/sh_eth.h> 6#include <linux/sh_eth.h>
7#include <linux/platform_data/usb-rcar-phy.h>
8 7
9struct platform_device; 8struct platform_device;
10 9
@@ -34,7 +33,6 @@ extern void r8a7779_add_early_devices(void);
34extern void r8a7779_add_standard_devices(void); 33extern void r8a7779_add_standard_devices(void);
35extern void r8a7779_add_standard_devices_dt(void); 34extern void r8a7779_add_standard_devices_dt(void);
36extern void r8a7779_add_ether_device(struct sh_eth_plat_data *pdata); 35extern void r8a7779_add_ether_device(struct sh_eth_plat_data *pdata);
37extern void r8a7779_add_usb_phy_device(struct rcar_phy_platform_data *pdata);
38extern void r8a7779_init_late(void); 36extern void r8a7779_init_late(void);
39extern void r8a7779_clock_init(void); 37extern void r8a7779_clock_init(void);
40extern void r8a7779_pinmux_init(void); 38extern void r8a7779_pinmux_init(void);
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7790.h b/arch/arm/mach-shmobile/include/mach/r8a7790.h
index 2e919e61fa0d..7aaef409a059 100644
--- a/arch/arm/mach-shmobile/include/mach/r8a7790.h
+++ b/arch/arm/mach-shmobile/include/mach/r8a7790.h
@@ -4,6 +4,10 @@
4void r8a7790_add_standard_devices(void); 4void r8a7790_add_standard_devices(void);
5void r8a7790_clock_init(void); 5void r8a7790_clock_init(void);
6void r8a7790_pinmux_init(void); 6void r8a7790_pinmux_init(void);
7void r8a7790_init_delay(void);
7void r8a7790_timer_init(void); 8void r8a7790_timer_init(void);
8 9
10#define MD(nr) BIT(nr)
11u32 r8a7790_read_mode_pins(void);
12
9#endif /* __ASM_R8A7790_H__ */ 13#endif /* __ASM_R8A7790_H__ */
diff --git a/arch/arm/mach-shmobile/include/mach/sh73a0.h b/arch/arm/mach-shmobile/include/mach/sh73a0.h
index eb7a4320d487..680dc5f1655a 100644
--- a/arch/arm/mach-shmobile/include/mach/sh73a0.h
+++ b/arch/arm/mach-shmobile/include/mach/sh73a0.h
@@ -1,378 +1,7 @@
1#ifndef __ASM_SH73A0_H__ 1#ifndef __ASM_SH73A0_H__
2#define __ASM_SH73A0_H__ 2#define __ASM_SH73A0_H__
3 3
4/* Pin Function Controller: 4#define GPIO_NR 310
5 * GPIO_FN_xx - GPIO used to select pin function and MSEL switch
6 * GPIO_PORTxx - GPIO mapped to real I/O pin on CPU
7 */
8enum {
9 /* Hardware manual Table 25-1 (GPIO) */
10 GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4,
11 GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9,
12
13 GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14,
14 GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19,
15
16 GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24,
17 GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29,
18
19 GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34,
20 GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39,
21
22 GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44,
23 GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49,
24
25 GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54,
26 GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59,
27
28 GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64,
29 GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69,
30
31 GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74,
32 GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79,
33
34 GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84,
35 GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89,
36
37 GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94,
38 GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99,
39
40 GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104,
41 GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109,
42
43 GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114,
44 GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118,
45
46 GPIO_PORT128, GPIO_PORT129,
47
48 GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134,
49 GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139,
50
51 GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144,
52 GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149,
53
54 GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154,
55 GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159,
56
57 GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164,
58
59 GPIO_PORT192, GPIO_PORT193, GPIO_PORT194,
60 GPIO_PORT195, GPIO_PORT196, GPIO_PORT197, GPIO_PORT198, GPIO_PORT199,
61
62 GPIO_PORT200, GPIO_PORT201, GPIO_PORT202, GPIO_PORT203, GPIO_PORT204,
63 GPIO_PORT205, GPIO_PORT206, GPIO_PORT207, GPIO_PORT208, GPIO_PORT209,
64
65 GPIO_PORT210, GPIO_PORT211, GPIO_PORT212, GPIO_PORT213, GPIO_PORT214,
66 GPIO_PORT215, GPIO_PORT216, GPIO_PORT217, GPIO_PORT218, GPIO_PORT219,
67
68 GPIO_PORT220, GPIO_PORT221, GPIO_PORT222, GPIO_PORT223, GPIO_PORT224,
69 GPIO_PORT225, GPIO_PORT226, GPIO_PORT227, GPIO_PORT228, GPIO_PORT229,
70
71 GPIO_PORT230, GPIO_PORT231, GPIO_PORT232, GPIO_PORT233, GPIO_PORT234,
72 GPIO_PORT235, GPIO_PORT236, GPIO_PORT237, GPIO_PORT238, GPIO_PORT239,
73
74 GPIO_PORT240, GPIO_PORT241, GPIO_PORT242, GPIO_PORT243, GPIO_PORT244,
75 GPIO_PORT245, GPIO_PORT246, GPIO_PORT247, GPIO_PORT248, GPIO_PORT249,
76
77 GPIO_PORT250, GPIO_PORT251, GPIO_PORT252, GPIO_PORT253, GPIO_PORT254,
78 GPIO_PORT255, GPIO_PORT256, GPIO_PORT257, GPIO_PORT258, GPIO_PORT259,
79
80 GPIO_PORT260, GPIO_PORT261, GPIO_PORT262, GPIO_PORT263, GPIO_PORT264,
81 GPIO_PORT265, GPIO_PORT266, GPIO_PORT267, GPIO_PORT268, GPIO_PORT269,
82
83 GPIO_PORT270, GPIO_PORT271, GPIO_PORT272, GPIO_PORT273, GPIO_PORT274,
84 GPIO_PORT275, GPIO_PORT276, GPIO_PORT277, GPIO_PORT278, GPIO_PORT279,
85
86 GPIO_PORT280, GPIO_PORT281, GPIO_PORT282,
87
88 GPIO_PORT288, GPIO_PORT289,
89
90 GPIO_PORT290, GPIO_PORT291, GPIO_PORT292, GPIO_PORT293, GPIO_PORT294,
91 GPIO_PORT295, GPIO_PORT296, GPIO_PORT297, GPIO_PORT298, GPIO_PORT299,
92
93 GPIO_PORT300, GPIO_PORT301, GPIO_PORT302, GPIO_PORT303, GPIO_PORT304,
94 GPIO_PORT305, GPIO_PORT306, GPIO_PORT307, GPIO_PORT308, GPIO_PORT309,
95
96 /* Table 25-1 (Function 0-7) */
97 GPIO_FN_GPI0 = 310,
98 GPIO_FN_GPI1,
99 GPIO_FN_GPI2,
100 GPIO_FN_GPI3,
101 GPIO_FN_GPI4,
102 GPIO_FN_GPI5,
103 GPIO_FN_GPI6,
104 GPIO_FN_GPI7,
105 GPIO_FN_GPO7, GPIO_FN_MFG0_OUT2,
106 GPIO_FN_GPO6, GPIO_FN_MFG1_OUT2,
107 GPIO_FN_GPO5,
108 GPIO_FN_PORT16_VIO_CKOR,
109 GPIO_FN_PORT19_VIO_CKO2,
110 GPIO_FN_GPO0,
111 GPIO_FN_GPO1,
112 GPIO_FN_GPO2, GPIO_FN_STATUS0,
113 GPIO_FN_GPO3, GPIO_FN_STATUS1,
114 GPIO_FN_GPO4, GPIO_FN_STATUS2,
115 GPIO_FN_VINT,
116 GPIO_FN_TCKON,
117 GPIO_FN_XDVFS1,
118 GPIO_FN_MFG0_OUT1, GPIO_FN_PORT27_IROUT,
119 GPIO_FN_XDVFS2,
120 GPIO_FN_PORT28_TPU1TO1,
121 GPIO_FN_SIM_RST, GPIO_FN_PORT29_TPU1TO1,
122 GPIO_FN_SIM_CLK, GPIO_FN_PORT30_VIO_CKOR,
123 GPIO_FN_SIM_D, GPIO_FN_PORT31_IROUT,
124 GPIO_FN_XWUP,
125 GPIO_FN_VACK,
126 GPIO_FN_XTAL1L,
127 GPIO_FN_PORT49_IROUT,
128 GPIO_FN_BBIF2_TSYNC2, GPIO_FN_TPU2TO2,
129
130 GPIO_FN_BBIF2_TSCK2, GPIO_FN_TPU2TO3,
131 GPIO_FN_BBIF2_TXD2,
132 GPIO_FN_TPU3TO3,
133 GPIO_FN_TPU3TO2,
134 GPIO_FN_TPU0TO0,
135 GPIO_FN_A0, GPIO_FN_BS_,
136 GPIO_FN_A12, GPIO_FN_TPU4TO2,
137 GPIO_FN_A13, GPIO_FN_TPU0TO1,
138 GPIO_FN_A14,
139 GPIO_FN_A15,
140 GPIO_FN_A16, GPIO_FN_MSIOF0_SS1,
141 GPIO_FN_A17, GPIO_FN_MSIOF0_TSYNC,
142 GPIO_FN_A18, GPIO_FN_MSIOF0_TSCK,
143 GPIO_FN_A19, GPIO_FN_MSIOF0_TXD,
144 GPIO_FN_A20, GPIO_FN_MSIOF0_RSCK,
145 GPIO_FN_A21, GPIO_FN_MSIOF0_RSYNC,
146 GPIO_FN_A22, GPIO_FN_MSIOF0_MCK0,
147 GPIO_FN_A23, GPIO_FN_MSIOF0_MCK1,
148 GPIO_FN_A24, GPIO_FN_MSIOF0_RXD,
149 GPIO_FN_A25, GPIO_FN_MSIOF0_SS2,
150 GPIO_FN_A26,
151 GPIO_FN_FCE1_,
152 GPIO_FN_DACK0,
153 GPIO_FN_FCE0_,
154 GPIO_FN_WAIT_, GPIO_FN_DREQ0,
155 GPIO_FN_FRB,
156 GPIO_FN_CKO,
157 GPIO_FN_NBRSTOUT_,
158 GPIO_FN_NBRST_,
159 GPIO_FN_BBIF2_TXD,
160 GPIO_FN_BBIF2_RXD,
161 GPIO_FN_BBIF2_SYNC,
162 GPIO_FN_BBIF2_SCK,
163 GPIO_FN_MFG3_IN2,
164 GPIO_FN_MFG3_IN1,
165 GPIO_FN_BBIF1_SS2, GPIO_FN_MFG3_OUT1,
166 GPIO_FN_HSI_RX_DATA, GPIO_FN_BBIF1_RXD,
167 GPIO_FN_HSI_TX_WAKE, GPIO_FN_BBIF1_TSCK,
168 GPIO_FN_HSI_TX_DATA, GPIO_FN_BBIF1_TSYNC,
169 GPIO_FN_HSI_TX_READY, GPIO_FN_BBIF1_TXD,
170 GPIO_FN_HSI_RX_READY, GPIO_FN_BBIF1_RSCK,
171 GPIO_FN_HSI_RX_WAKE, GPIO_FN_BBIF1_RSYNC,
172 GPIO_FN_HSI_RX_FLAG, GPIO_FN_BBIF1_SS1, GPIO_FN_BBIF1_FLOW,
173 GPIO_FN_HSI_TX_FLAG,
174 GPIO_FN_VIO_VD, GPIO_FN_VIO2_VD,
175
176 GPIO_FN_VIO_HD,
177 GPIO_FN_VIO2_HD,
178 GPIO_FN_VIO_D0, GPIO_FN_PORT130_MSIOF2_RXD,
179 GPIO_FN_VIO_D1, GPIO_FN_PORT131_MSIOF2_SS1,
180 GPIO_FN_VIO_D2, GPIO_FN_PORT132_MSIOF2_SS2,
181 GPIO_FN_VIO_D3, GPIO_FN_MSIOF2_TSYNC,
182 GPIO_FN_VIO_D4, GPIO_FN_MSIOF2_TXD,
183 GPIO_FN_VIO_D5, GPIO_FN_MSIOF2_TSCK,
184 GPIO_FN_VIO_D6,
185 GPIO_FN_VIO_D7,
186 GPIO_FN_VIO_D8, GPIO_FN_VIO2_D0,
187 GPIO_FN_VIO_D9, GPIO_FN_VIO2_D1,
188 GPIO_FN_VIO_D10, GPIO_FN_TPU0TO2, GPIO_FN_VIO2_D2,
189 GPIO_FN_VIO_D11, GPIO_FN_TPU0TO3, GPIO_FN_VIO2_D3,
190 GPIO_FN_VIO_D12, GPIO_FN_VIO2_D4,
191 GPIO_FN_VIO_D13,
192 GPIO_FN_VIO2_D5,
193 GPIO_FN_VIO_D14, GPIO_FN_VIO2_D6,
194 GPIO_FN_VIO_D15, GPIO_FN_TPU1TO3,
195 GPIO_FN_VIO2_D7,
196 GPIO_FN_VIO_CLK,
197 GPIO_FN_VIO2_CLK,
198 GPIO_FN_VIO_FIELD, GPIO_FN_VIO2_FIELD,
199 GPIO_FN_VIO_CKO,
200 GPIO_FN_A27, GPIO_FN_MFG0_IN1,
201 GPIO_FN_MFG0_IN2,
202 GPIO_FN_TS_SPSYNC3, GPIO_FN_MSIOF2_RSCK,
203 GPIO_FN_TS_SDAT3, GPIO_FN_MSIOF2_RSYNC,
204 GPIO_FN_TPU1TO2, GPIO_FN_TS_SDEN3, GPIO_FN_PORT153_MSIOF2_SS1,
205 GPIO_FN_MSIOF2_MCK0,
206 GPIO_FN_MSIOF2_MCK1,
207 GPIO_FN_PORT156_MSIOF2_SS2,
208 GPIO_FN_PORT157_MSIOF2_RXD,
209 GPIO_FN_DINT_, GPIO_FN_TS_SCK3,
210 GPIO_FN_NMI,
211 GPIO_FN_TPU3TO0,
212 GPIO_FN_BBIF2_TSYNC1,
213 GPIO_FN_BBIF2_TSCK1,
214 GPIO_FN_BBIF2_TXD1,
215 GPIO_FN_MFG2_OUT2,
216 GPIO_FN_TPU2TO1,
217 GPIO_FN_TPU4TO1, GPIO_FN_MFG4_OUT2,
218 GPIO_FN_D16,
219 GPIO_FN_D17,
220 GPIO_FN_D18,
221 GPIO_FN_D19,
222 GPIO_FN_D20,
223 GPIO_FN_D21,
224 GPIO_FN_D22,
225 GPIO_FN_PORT207_MSIOF0L_SS1, GPIO_FN_D23,
226 GPIO_FN_PORT208_MSIOF0L_SS2, GPIO_FN_D24,
227 GPIO_FN_D25,
228 GPIO_FN_DREQ2, GPIO_FN_PORT210_MSIOF0L_SS1, GPIO_FN_D26,
229 GPIO_FN_PORT211_MSIOF0L_SS2, GPIO_FN_D27,
230 GPIO_FN_TS_SPSYNC1, GPIO_FN_MSIOF0L_MCK0, GPIO_FN_D28,
231 GPIO_FN_TS_SDAT1, GPIO_FN_MSIOF0L_MCK1, GPIO_FN_D29,
232 GPIO_FN_TS_SDEN1, GPIO_FN_MSIOF0L_RSCK, GPIO_FN_D30,
233 GPIO_FN_TS_SCK1, GPIO_FN_MSIOF0L_RSYNC, GPIO_FN_D31,
234 GPIO_FN_DACK2,
235 GPIO_FN_MSIOF0L_TSYNC, GPIO_FN_VIO2_FIELD3,
236 GPIO_FN_DACK3,
237 GPIO_FN_PORT218_VIO_CKOR,
238 GPIO_FN_DREQ3, GPIO_FN_MSIOF0L_TSCK, GPIO_FN_VIO2_CLK3, \
239 GPIO_FN_DREQ1,
240 GPIO_FN_PWEN, GPIO_FN_MSIOF0L_RXD, GPIO_FN_VIO2_HD3, \
241 GPIO_FN_DACK1, GPIO_FN_OVCN,
242 GPIO_FN_MSIOF0L_TXD, GPIO_FN_VIO2_VD3,
243
244 GPIO_FN_OVCN2,
245 GPIO_FN_EXTLP, GPIO_FN_PORT226_VIO_CKO2,
246 GPIO_FN_IDIN,
247 GPIO_FN_MFG1_IN1,
248 GPIO_FN_MSIOF1_TXD,
249 GPIO_FN_MSIOF1_TSYNC,
250 GPIO_FN_MSIOF1_TSCK,
251 GPIO_FN_MSIOF1_RXD,
252 GPIO_FN_MSIOF1_RSCK, GPIO_FN_VIO2_CLK2,
253 GPIO_FN_MSIOF1_RSYNC, GPIO_FN_MFG1_IN2, GPIO_FN_VIO2_VD2, \
254 GPIO_FN_MSIOF1_MCK0,
255 GPIO_FN_MSIOF1_MCK1,
256 GPIO_FN_MSIOF1_SS1, GPIO_FN_VIO2_FIELD2,
257 GPIO_FN_MSIOF1_SS2, GPIO_FN_VIO2_HD2,
258 GPIO_FN_PORT241_IROUT, GPIO_FN_MFG4_OUT1, \
259 GPIO_FN_TPU4TO0,
260 GPIO_FN_MFG4_IN2,
261 GPIO_FN_PORT243_VIO_CKO2,
262 GPIO_FN_MFG2_IN1,
263 GPIO_FN_MSIOF2R_RXD,
264 GPIO_FN_MFG2_IN2,
265 GPIO_FN_MSIOF2R_TXD,
266 GPIO_FN_MFG1_OUT1,
267 GPIO_FN_TPU1TO0,
268 GPIO_FN_MFG3_OUT2,
269 GPIO_FN_TPU3TO1,
270 GPIO_FN_MFG2_OUT1,
271 GPIO_FN_TPU2TO0,
272 GPIO_FN_MSIOF2R_TSCK,
273 GPIO_FN_PORT249_IROUT, GPIO_FN_MFG4_IN1, \
274 GPIO_FN_MSIOF2R_TSYNC,
275 GPIO_FN_SDHICLK0,
276 GPIO_FN_SDHICD0,
277 GPIO_FN_SDHID0_0,
278 GPIO_FN_SDHID0_1,
279 GPIO_FN_SDHID0_2,
280 GPIO_FN_SDHID0_3,
281 GPIO_FN_SDHICMD0,
282 GPIO_FN_SDHIWP0,
283 GPIO_FN_SDHICLK1,
284 GPIO_FN_SDHID1_0, GPIO_FN_TS_SPSYNC2,
285 GPIO_FN_SDHID1_1, GPIO_FN_TS_SDAT2,
286 GPIO_FN_SDHID1_2, GPIO_FN_TS_SDEN2,
287 GPIO_FN_SDHID1_3, GPIO_FN_TS_SCK2,
288 GPIO_FN_SDHICMD1,
289 GPIO_FN_SDHICLK2,
290 GPIO_FN_SDHID2_0, GPIO_FN_TS_SPSYNC4,
291 GPIO_FN_SDHID2_1, GPIO_FN_TS_SDAT4,
292 GPIO_FN_SDHID2_2, GPIO_FN_TS_SDEN4,
293 GPIO_FN_SDHID2_3, GPIO_FN_TS_SCK4,
294 GPIO_FN_SDHICMD2,
295 GPIO_FN_MMCCLK0,
296 GPIO_FN_MMCD0_0,
297 GPIO_FN_MMCD0_1,
298 GPIO_FN_MMCD0_2,
299 GPIO_FN_MMCD0_3,
300 GPIO_FN_MMCD0_4, GPIO_FN_TS_SPSYNC5,
301 GPIO_FN_MMCD0_5, GPIO_FN_TS_SDAT5,
302 GPIO_FN_MMCD0_6, GPIO_FN_TS_SDEN5,
303 GPIO_FN_MMCD0_7, GPIO_FN_TS_SCK5,
304 GPIO_FN_MMCCMD0,
305 GPIO_FN_RESETOUTS_, GPIO_FN_EXTAL2OUT,
306 GPIO_FN_MCP_WAIT__MCP_FRB,
307 GPIO_FN_MCP_CKO, GPIO_FN_MMCCLK1,
308 GPIO_FN_MCP_D15_MCP_NAF15,
309 GPIO_FN_MCP_D14_MCP_NAF14,
310 GPIO_FN_MCP_D13_MCP_NAF13,
311 GPIO_FN_MCP_D12_MCP_NAF12,
312 GPIO_FN_MCP_D11_MCP_NAF11,
313 GPIO_FN_MCP_D10_MCP_NAF10,
314 GPIO_FN_MCP_D9_MCP_NAF9,
315 GPIO_FN_MCP_D8_MCP_NAF8, GPIO_FN_MMCCMD1,
316 GPIO_FN_MCP_D7_MCP_NAF7, GPIO_FN_MMCD1_7,
317
318 GPIO_FN_MCP_D6_MCP_NAF6, GPIO_FN_MMCD1_6,
319 GPIO_FN_MCP_D5_MCP_NAF5, GPIO_FN_MMCD1_5,
320 GPIO_FN_MCP_D4_MCP_NAF4, GPIO_FN_MMCD1_4,
321 GPIO_FN_MCP_D3_MCP_NAF3, GPIO_FN_MMCD1_3,
322 GPIO_FN_MCP_D2_MCP_NAF2, GPIO_FN_MMCD1_2,
323 GPIO_FN_MCP_D1_MCP_NAF1, GPIO_FN_MMCD1_1,
324 GPIO_FN_MCP_D0_MCP_NAF0, GPIO_FN_MMCD1_0,
325 GPIO_FN_MCP_NBRSTOUT_,
326 GPIO_FN_MCP_WE0__MCP_FWE, GPIO_FN_MCP_RDWR_MCP_FWE,
327
328 /* MSEL2 special case */
329 GPIO_FN_TSIF2_TS_XX1,
330 GPIO_FN_TSIF2_TS_XX2,
331 GPIO_FN_TSIF2_TS_XX3,
332 GPIO_FN_TSIF2_TS_XX4,
333 GPIO_FN_TSIF2_TS_XX5,
334 GPIO_FN_TSIF1_TS_XX1,
335 GPIO_FN_TSIF1_TS_XX2,
336 GPIO_FN_TSIF1_TS_XX3,
337 GPIO_FN_TSIF1_TS_XX4,
338 GPIO_FN_TSIF1_TS_XX5,
339 GPIO_FN_TSIF0_TS_XX1,
340 GPIO_FN_TSIF0_TS_XX2,
341 GPIO_FN_TSIF0_TS_XX3,
342 GPIO_FN_TSIF0_TS_XX4,
343 GPIO_FN_TSIF0_TS_XX5,
344 GPIO_FN_MST1_TS_XX1,
345 GPIO_FN_MST1_TS_XX2,
346 GPIO_FN_MST1_TS_XX3,
347 GPIO_FN_MST1_TS_XX4,
348 GPIO_FN_MST1_TS_XX5,
349 GPIO_FN_MST0_TS_XX1,
350 GPIO_FN_MST0_TS_XX2,
351 GPIO_FN_MST0_TS_XX3,
352 GPIO_FN_MST0_TS_XX4,
353 GPIO_FN_MST0_TS_XX5,
354
355 /* MSEL3 special cases */
356 GPIO_FN_SDHI0_VCCQ_MC0_ON,
357 GPIO_FN_SDHI0_VCCQ_MC0_OFF,
358 GPIO_FN_DEBUG_MON_VIO,
359 GPIO_FN_DEBUG_MON_LCDD,
360 GPIO_FN_LCDC_LCDC0,
361 GPIO_FN_LCDC_LCDC1,
362
363 /* MSEL4 special cases */
364 GPIO_FN_IRQ9_MEM_INT,
365 GPIO_FN_IRQ9_MCP_INT,
366 GPIO_FN_A11,
367 GPIO_FN_TPU4TO3,
368 GPIO_FN_RESETA_N_PU_ON,
369 GPIO_FN_RESETA_N_PU_OFF,
370 GPIO_FN_EDBGREQ_PD,
371 GPIO_FN_EDBGREQ_PU,
372
373 /* end of GPIO */
374 GPIO_NR,
375};
376 5
377/* DMA slave IDs */ 6/* DMA slave IDs */
378enum { 7enum {
diff --git a/arch/arm/mach-shmobile/intc-r8a7779.c b/arch/arm/mach-shmobile/intc-r8a7779.c
index b86dc8908724..5f9e5dc0238b 100644
--- a/arch/arm/mach-shmobile/intc-r8a7779.c
+++ b/arch/arm/mach-shmobile/intc-r8a7779.c
@@ -27,7 +27,6 @@
27#include <linux/platform_data/irq-renesas-intc-irqpin.h> 27#include <linux/platform_data/irq-renesas-intc-irqpin.h>
28#include <linux/irqchip.h> 28#include <linux/irqchip.h>
29#include <mach/common.h> 29#include <mach/common.h>
30#include <mach/intc.h>
31#include <mach/irqs.h> 30#include <mach/irqs.h>
32#include <mach/r8a7779.h> 31#include <mach/r8a7779.h>
33#include <asm/mach-types.h> 32#include <asm/mach-types.h>
diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c
index 1ccddd228112..fed753dbfe42 100644
--- a/arch/arm/mach-shmobile/setup-emev2.c
+++ b/arch/arm/mach-shmobile/setup-emev2.c
@@ -20,7 +20,6 @@
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/interrupt.h> 21#include <linux/interrupt.h>
22#include <linux/irq.h> 22#include <linux/irq.h>
23#include <linux/irqchip.h>
24#include <linux/platform_device.h> 23#include <linux/platform_device.h>
25#include <linux/platform_data/gpio-em.h> 24#include <linux/platform_data/gpio-em.h>
26#include <linux/of_platform.h> 25#include <linux/of_platform.h>
@@ -28,7 +27,6 @@
28#include <linux/input.h> 27#include <linux/input.h>
29#include <linux/io.h> 28#include <linux/io.h>
30#include <linux/irqchip/arm-gic.h> 29#include <linux/irqchip/arm-gic.h>
31#include <mach/hardware.h>
32#include <mach/common.h> 30#include <mach/common.h>
33#include <mach/emev2.h> 31#include <mach/emev2.h>
34#include <mach/irqs.h> 32#include <mach/irqs.h>
@@ -39,13 +37,6 @@
39 37
40static struct map_desc emev2_io_desc[] __initdata = { 38static struct map_desc emev2_io_desc[] __initdata = {
41#ifdef CONFIG_SMP 39#ifdef CONFIG_SMP
42 /* 128K entity map for 0xe0100000 (SMU) */
43 {
44 .virtual = 0xe0100000,
45 .pfn = __phys_to_pfn(0xe0100000),
46 .length = SZ_128K,
47 .type = MT_DEVICE
48 },
49 /* 2M mapping for SCU + L2 controller */ 40 /* 2M mapping for SCU + L2 controller */
50 { 41 {
51 .virtual = 0xf0000000, 42 .virtual = 0xf0000000,
@@ -63,102 +54,40 @@ void __init emev2_map_io(void)
63 54
64/* UART */ 55/* UART */
65static struct resource uart0_resources[] = { 56static struct resource uart0_resources[] = {
66 [0] = { 57 DEFINE_RES_MEM(0xe1020000, 0x38),
67 .start = 0xe1020000, 58 DEFINE_RES_IRQ(40),
68 .end = 0xe1020037,
69 .flags = IORESOURCE_MEM,
70 },
71 [1] = {
72 .start = 40,
73 .flags = IORESOURCE_IRQ,
74 }
75};
76
77static struct platform_device uart0_device = {
78 .name = "serial8250-em",
79 .id = 0,
80 .num_resources = ARRAY_SIZE(uart0_resources),
81 .resource = uart0_resources,
82}; 59};
83 60
84static struct resource uart1_resources[] = { 61static struct resource uart1_resources[] = {
85 [0] = { 62 DEFINE_RES_MEM(0xe1030000, 0x38),
86 .start = 0xe1030000, 63 DEFINE_RES_IRQ(41),
87 .end = 0xe1030037,
88 .flags = IORESOURCE_MEM,
89 },
90 [1] = {
91 .start = 41,
92 .flags = IORESOURCE_IRQ,
93 }
94};
95
96static struct platform_device uart1_device = {
97 .name = "serial8250-em",
98 .id = 1,
99 .num_resources = ARRAY_SIZE(uart1_resources),
100 .resource = uart1_resources,
101}; 64};
102 65
103static struct resource uart2_resources[] = { 66static struct resource uart2_resources[] = {
104 [0] = { 67 DEFINE_RES_MEM(0xe1040000, 0x38),
105 .start = 0xe1040000, 68 DEFINE_RES_IRQ(42),
106 .end = 0xe1040037,
107 .flags = IORESOURCE_MEM,
108 },
109 [1] = {
110 .start = 42,
111 .flags = IORESOURCE_IRQ,
112 }
113};
114
115static struct platform_device uart2_device = {
116 .name = "serial8250-em",
117 .id = 2,
118 .num_resources = ARRAY_SIZE(uart2_resources),
119 .resource = uart2_resources,
120}; 69};
121 70
122static struct resource uart3_resources[] = { 71static struct resource uart3_resources[] = {
123 [0] = { 72 DEFINE_RES_MEM(0xe1050000, 0x38),
124 .start = 0xe1050000, 73 DEFINE_RES_IRQ(43),
125 .end = 0xe1050037,
126 .flags = IORESOURCE_MEM,
127 },
128 [1] = {
129 .start = 43,
130 .flags = IORESOURCE_IRQ,
131 }
132}; 74};
133 75
134static struct platform_device uart3_device = { 76#define emev2_register_uart(idx) \
135 .name = "serial8250-em", 77 platform_device_register_simple("serial8250-em", idx, \
136 .id = 3, 78 uart##idx##_resources, \
137 .num_resources = ARRAY_SIZE(uart3_resources), 79 ARRAY_SIZE(uart##idx##_resources))
138 .resource = uart3_resources,
139};
140 80
141/* STI */ 81/* STI */
142static struct resource sti_resources[] = { 82static struct resource sti_resources[] = {
143 [0] = { 83 DEFINE_RES_MEM(0xe0180000, 0x54),
144 .name = "STI", 84 DEFINE_RES_IRQ(157),
145 .start = 0xe0180000,
146 .end = 0xe0180053,
147 .flags = IORESOURCE_MEM,
148 },
149 [1] = {
150 .start = 157,
151 .flags = IORESOURCE_IRQ,
152 },
153};
154
155static struct platform_device sti_device = {
156 .name = "em_sti",
157 .id = 0,
158 .resource = sti_resources,
159 .num_resources = ARRAY_SIZE(sti_resources),
160}; 85};
161 86
87#define emev2_register_sti() \
88 platform_device_register_simple("em_sti", 0, \
89 sti_resources, \
90 ARRAY_SIZE(sti_resources))
162 91
163/* GIO */ 92/* GIO */
164static struct gpio_em_config gio0_config = { 93static struct gpio_em_config gio0_config = {
@@ -168,36 +97,10 @@ static struct gpio_em_config gio0_config = {
168}; 97};
169 98
170static struct resource gio0_resources[] = { 99static struct resource gio0_resources[] = {
171 [0] = { 100 DEFINE_RES_MEM(0xe0050000, 0x2c),
172 .name = "GIO_000", 101 DEFINE_RES_MEM(0xe0050040, 0x20),
173 .start = 0xe0050000, 102 DEFINE_RES_IRQ(99),
174 .end = 0xe005002b, 103 DEFINE_RES_IRQ(100),
175 .flags = IORESOURCE_MEM,
176 },
177 [1] = {
178 .name = "GIO_000",
179 .start = 0xe0050040,
180 .end = 0xe005005f,
181 .flags = IORESOURCE_MEM,
182 },
183 [2] = {
184 .start = 99,
185 .flags = IORESOURCE_IRQ,
186 },
187 [3] = {
188 .start = 100,
189 .flags = IORESOURCE_IRQ,
190 },
191};
192
193static struct platform_device gio0_device = {
194 .name = "em_gio",
195 .id = 0,
196 .resource = gio0_resources,
197 .num_resources = ARRAY_SIZE(gio0_resources),
198 .dev = {
199 .platform_data = &gio0_config,
200 },
201}; 104};
202 105
203static struct gpio_em_config gio1_config = { 106static struct gpio_em_config gio1_config = {
@@ -207,36 +110,10 @@ static struct gpio_em_config gio1_config = {
207}; 110};
208 111
209static struct resource gio1_resources[] = { 112static struct resource gio1_resources[] = {
210 [0] = { 113 DEFINE_RES_MEM(0xe0050080, 0x2c),
211 .name = "GIO_032", 114 DEFINE_RES_MEM(0xe00500c0, 0x20),
212 .start = 0xe0050080, 115 DEFINE_RES_IRQ(101),
213 .end = 0xe00500ab, 116 DEFINE_RES_IRQ(102),
214 .flags = IORESOURCE_MEM,
215 },
216 [1] = {
217 .name = "GIO_032",
218 .start = 0xe00500c0,
219 .end = 0xe00500df,
220 .flags = IORESOURCE_MEM,
221 },
222 [2] = {
223 .start = 101,
224 .flags = IORESOURCE_IRQ,
225 },
226 [3] = {
227 .start = 102,
228 .flags = IORESOURCE_IRQ,
229 },
230};
231
232static struct platform_device gio1_device = {
233 .name = "em_gio",
234 .id = 1,
235 .resource = gio1_resources,
236 .num_resources = ARRAY_SIZE(gio1_resources),
237 .dev = {
238 .platform_data = &gio1_config,
239 },
240}; 117};
241 118
242static struct gpio_em_config gio2_config = { 119static struct gpio_em_config gio2_config = {
@@ -246,36 +123,10 @@ static struct gpio_em_config gio2_config = {
246}; 123};
247 124
248static struct resource gio2_resources[] = { 125static struct resource gio2_resources[] = {
249 [0] = { 126 DEFINE_RES_MEM(0xe0050100, 0x2c),
250 .name = "GIO_064", 127 DEFINE_RES_MEM(0xe0050140, 0x20),
251 .start = 0xe0050100, 128 DEFINE_RES_IRQ(103),
252 .end = 0xe005012b, 129 DEFINE_RES_IRQ(104),
253 .flags = IORESOURCE_MEM,
254 },
255 [1] = {
256 .name = "GIO_064",
257 .start = 0xe0050140,
258 .end = 0xe005015f,
259 .flags = IORESOURCE_MEM,
260 },
261 [2] = {
262 .start = 103,
263 .flags = IORESOURCE_IRQ,
264 },
265 [3] = {
266 .start = 104,
267 .flags = IORESOURCE_IRQ,
268 },
269};
270
271static struct platform_device gio2_device = {
272 .name = "em_gio",
273 .id = 2,
274 .resource = gio2_resources,
275 .num_resources = ARRAY_SIZE(gio2_resources),
276 .dev = {
277 .platform_data = &gio2_config,
278 },
279}; 130};
280 131
281static struct gpio_em_config gio3_config = { 132static struct gpio_em_config gio3_config = {
@@ -285,36 +136,10 @@ static struct gpio_em_config gio3_config = {
285}; 136};
286 137
287static struct resource gio3_resources[] = { 138static struct resource gio3_resources[] = {
288 [0] = { 139 DEFINE_RES_MEM(0xe0050180, 0x2c),
289 .name = "GIO_096", 140 DEFINE_RES_MEM(0xe00501c0, 0x20),
290 .start = 0xe0050180, 141 DEFINE_RES_IRQ(105),
291 .end = 0xe00501ab, 142 DEFINE_RES_IRQ(106),
292 .flags = IORESOURCE_MEM,
293 },
294 [1] = {
295 .name = "GIO_096",
296 .start = 0xe00501c0,
297 .end = 0xe00501df,
298 .flags = IORESOURCE_MEM,
299 },
300 [2] = {
301 .start = 105,
302 .flags = IORESOURCE_IRQ,
303 },
304 [3] = {
305 .start = 106,
306 .flags = IORESOURCE_IRQ,
307 },
308};
309
310static struct platform_device gio3_device = {
311 .name = "em_gio",
312 .id = 3,
313 .resource = gio3_resources,
314 .num_resources = ARRAY_SIZE(gio3_resources),
315 .dev = {
316 .platform_data = &gio3_config,
317 },
318}; 143};
319 144
320static struct gpio_em_config gio4_config = { 145static struct gpio_em_config gio4_config = {
@@ -324,126 +149,52 @@ static struct gpio_em_config gio4_config = {
324}; 149};
325 150
326static struct resource gio4_resources[] = { 151static struct resource gio4_resources[] = {
327 [0] = { 152 DEFINE_RES_MEM(0xe0050200, 0x2c),
328 .name = "GIO_128", 153 DEFINE_RES_MEM(0xe0050240, 0x20),
329 .start = 0xe0050200, 154 DEFINE_RES_IRQ(107),
330 .end = 0xe005022b, 155 DEFINE_RES_IRQ(108),
331 .flags = IORESOURCE_MEM,
332 },
333 [1] = {
334 .name = "GIO_128",
335 .start = 0xe0050240,
336 .end = 0xe005025f,
337 .flags = IORESOURCE_MEM,
338 },
339 [2] = {
340 .start = 107,
341 .flags = IORESOURCE_IRQ,
342 },
343 [3] = {
344 .start = 108,
345 .flags = IORESOURCE_IRQ,
346 },
347}; 156};
348 157
349static struct platform_device gio4_device = { 158#define emev2_register_gio(idx) \
350 .name = "em_gio", 159 platform_device_register_resndata(&platform_bus, "em_gio", \
351 .id = 4, 160 idx, gio##idx##_resources, \
352 .resource = gio4_resources, 161 ARRAY_SIZE(gio##idx##_resources), \
353 .num_resources = ARRAY_SIZE(gio4_resources), 162 &gio##idx##_config, \
354 .dev = { 163 sizeof(struct gpio_em_config))
355 .platform_data = &gio4_config,
356 },
357};
358 164
359static struct resource pmu_resources[] = { 165static struct resource pmu_resources[] = {
360 [0] = { 166 DEFINE_RES_IRQ(152),
361 .start = 152, 167 DEFINE_RES_IRQ(153),
362 .end = 152,
363 .flags = IORESOURCE_IRQ,
364 },
365 [1] = {
366 .start = 153,
367 .end = 153,
368 .flags = IORESOURCE_IRQ,
369 },
370}; 168};
371 169
372static struct platform_device pmu_device = { 170#define emev2_register_pmu() \
373 .name = "arm-pmu", 171 platform_device_register_simple("arm-pmu", -1, \
374 .id = -1, 172 pmu_resources, \
375 .num_resources = ARRAY_SIZE(pmu_resources), 173 ARRAY_SIZE(pmu_resources))
376 .resource = pmu_resources,
377};
378
379static struct platform_device *emev2_early_devices[] __initdata = {
380 &uart0_device,
381 &uart1_device,
382 &uart2_device,
383 &uart3_device,
384};
385
386static struct platform_device *emev2_late_devices[] __initdata = {
387 &sti_device,
388 &gio0_device,
389 &gio1_device,
390 &gio2_device,
391 &gio3_device,
392 &gio4_device,
393 &pmu_device,
394};
395 174
396void __init emev2_add_standard_devices(void) 175void __init emev2_add_standard_devices(void)
397{ 176{
398 emev2_clock_init(); 177 emev2_clock_init();
399 178
400 platform_add_devices(emev2_early_devices, 179 emev2_register_uart(0);
401 ARRAY_SIZE(emev2_early_devices)); 180 emev2_register_uart(1);
402 181 emev2_register_uart(2);
403 platform_add_devices(emev2_late_devices, 182 emev2_register_uart(3);
404 ARRAY_SIZE(emev2_late_devices)); 183 emev2_register_sti();
184 emev2_register_gio(0);
185 emev2_register_gio(1);
186 emev2_register_gio(2);
187 emev2_register_gio(3);
188 emev2_register_gio(4);
189 emev2_register_pmu();
405} 190}
406 191
407static void __init emev2_init_delay(void) 192void __init emev2_init_delay(void)
408{ 193{
409 shmobile_setup_delay(533, 1, 3); /* Cortex-A9 @ 533MHz */ 194 shmobile_setup_delay(533, 1, 3); /* Cortex-A9 @ 533MHz */
410} 195}
411 196
412void __init emev2_add_early_devices(void)
413{
414 emev2_init_delay();
415
416 early_platform_add_devices(emev2_early_devices,
417 ARRAY_SIZE(emev2_early_devices));
418
419 /* setup early console here as well */
420 shmobile_setup_console();
421}
422
423void __init emev2_init_irq(void)
424{
425 void __iomem *gic_dist_base;
426 void __iomem *gic_cpu_base;
427
428 /* Static mappings, never released */
429 gic_dist_base = ioremap(0xe0028000, PAGE_SIZE);
430 gic_cpu_base = ioremap(0xe0020000, PAGE_SIZE);
431 BUG_ON(!gic_dist_base || !gic_cpu_base);
432
433 /* Use GIC to handle interrupts */
434 gic_init(0, 29, gic_dist_base, gic_cpu_base);
435}
436
437#ifdef CONFIG_USE_OF 197#ifdef CONFIG_USE_OF
438static const struct of_dev_auxdata emev2_auxdata_lookup[] __initconst = {
439 { }
440};
441
442static void __init emev2_add_standard_devices_dt(void)
443{
444 of_platform_populate(NULL, of_default_bus_match_table,
445 emev2_auxdata_lookup, NULL);
446}
447 198
448static const char *emev2_boards_compat_dt[] __initdata = { 199static const char *emev2_boards_compat_dt[] __initdata = {
449 "renesas,emev2", 200 "renesas,emev2",
@@ -452,10 +203,8 @@ static const char *emev2_boards_compat_dt[] __initdata = {
452 203
453DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)") 204DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)")
454 .smp = smp_ops(emev2_smp_ops), 205 .smp = smp_ops(emev2_smp_ops),
206 .map_io = emev2_map_io,
455 .init_early = emev2_init_delay, 207 .init_early = emev2_init_delay,
456 .nr_irqs = NR_IRQS_LEGACY,
457 .init_irq = irqchip_init,
458 .init_machine = emev2_add_standard_devices_dt,
459 .dt_compat = emev2_boards_compat_dt, 208 .dt_compat = emev2_boards_compat_dt,
460MACHINE_END 209MACHINE_END
461 210
diff --git a/arch/arm/mach-shmobile/setup-r8a73a4.c b/arch/arm/mach-shmobile/setup-r8a73a4.c
index 7f45c2edbca9..11c0f6305e6b 100644
--- a/arch/arm/mach-shmobile/setup-r8a73a4.c
+++ b/arch/arm/mach-shmobile/setup-r8a73a4.c
@@ -18,11 +18,11 @@
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */ 19 */
20#include <linux/irq.h> 20#include <linux/irq.h>
21#include <linux/irqchip.h>
22#include <linux/kernel.h> 21#include <linux/kernel.h>
23#include <linux/of_platform.h> 22#include <linux/of_platform.h>
24#include <linux/platform_data/irq-renesas-irqc.h> 23#include <linux/platform_data/irq-renesas-irqc.h>
25#include <linux/serial_sci.h> 24#include <linux/serial_sci.h>
25#include <linux/sh_timer.h>
26#include <mach/common.h> 26#include <mach/common.h>
27#include <mach/irqs.h> 27#include <mach/irqs.h>
28#include <mach/r8a73a4.h> 28#include <mach/r8a73a4.h>
@@ -169,6 +169,25 @@ static const struct resource thermal0_resources[] = {
169 thermal0_resources, \ 169 thermal0_resources, \
170 ARRAY_SIZE(thermal0_resources)) 170 ARRAY_SIZE(thermal0_resources))
171 171
172static struct sh_timer_config cmt10_platform_data = {
173 .name = "CMT10",
174 .timer_bit = 0,
175 .clockevent_rating = 80,
176};
177
178static struct resource cmt10_resources[] = {
179 DEFINE_RES_MEM(0xe6130010, 0x0c),
180 DEFINE_RES_MEM(0xe6130000, 0x04),
181 DEFINE_RES_IRQ(gic_spi(120)), /* CMT1_0 */
182};
183
184#define r8a7790_register_cmt(idx) \
185 platform_device_register_resndata(&platform_bus, "sh_cmt", \
186 idx, cmt##idx##_resources, \
187 ARRAY_SIZE(cmt##idx##_resources), \
188 &cmt##idx##_platform_data, \
189 sizeof(struct sh_timer_config))
190
172void __init r8a73a4_add_standard_devices(void) 191void __init r8a73a4_add_standard_devices(void)
173{ 192{
174 r8a73a4_register_scif(SCIFA0); 193 r8a73a4_register_scif(SCIFA0);
@@ -180,22 +199,25 @@ void __init r8a73a4_add_standard_devices(void)
180 r8a73a4_register_irqc(0); 199 r8a73a4_register_irqc(0);
181 r8a73a4_register_irqc(1); 200 r8a73a4_register_irqc(1);
182 r8a73a4_register_thermal(); 201 r8a73a4_register_thermal();
202 r8a7790_register_cmt(10);
183} 203}
184 204
185#ifdef CONFIG_USE_OF 205void __init r8a73a4_init_delay(void)
186void __init r8a73a4_add_standard_devices_dt(void)
187{ 206{
188 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 207#ifndef CONFIG_ARM_ARCH_TIMER
208 shmobile_setup_delay(1500, 2, 4); /* Cortex-A15 @ 1500MHz */
209#endif
189} 210}
190 211
212#ifdef CONFIG_USE_OF
213
191static const char *r8a73a4_boards_compat_dt[] __initdata = { 214static const char *r8a73a4_boards_compat_dt[] __initdata = {
192 "renesas,r8a73a4", 215 "renesas,r8a73a4",
193 NULL, 216 NULL,
194}; 217};
195 218
196DT_MACHINE_START(R8A73A4_DT, "Generic R8A73A4 (Flattened Device Tree)") 219DT_MACHINE_START(R8A73A4_DT, "Generic R8A73A4 (Flattened Device Tree)")
197 .init_irq = irqchip_init, 220 .init_early = r8a73a4_init_delay,
198 .init_machine = r8a73a4_add_standard_devices_dt,
199 .init_time = shmobile_timer_init, 221 .init_time = shmobile_timer_init,
200 .dt_compat = r8a73a4_boards_compat_dt, 222 .dt_compat = r8a73a4_boards_compat_dt,
201MACHINE_END 223MACHINE_END
diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
index 00c5a707238b..84c5bb6d9725 100644
--- a/arch/arm/mach-shmobile/setup-r8a7740.c
+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
@@ -588,6 +588,16 @@ static const struct sh_dmae_slave_config r8a7740_dmae_slaves[] = {
588 .addr = 0xfe1f0064, 588 .addr = 0xfe1f0064,
589 .chcr = CHCR_TX(XMIT_SZ_32BIT), 589 .chcr = CHCR_TX(XMIT_SZ_32BIT),
590 .mid_rid = 0xb5, 590 .mid_rid = 0xb5,
591 }, {
592 .slave_id = SHDMA_SLAVE_MMCIF_TX,
593 .addr = 0xe6bd0034,
594 .chcr = CHCR_TX(XMIT_SZ_32BIT),
595 .mid_rid = 0xd1,
596 }, {
597 .slave_id = SHDMA_SLAVE_MMCIF_RX,
598 .addr = 0xe6bd0034,
599 .chcr = CHCR_RX(XMIT_SZ_32BIT),
600 .mid_rid = 0xd2,
591 }, 601 },
592}; 602};
593 603
@@ -986,16 +996,22 @@ void __init r8a7740_add_early_devices(void)
986 996
987#ifdef CONFIG_USE_OF 997#ifdef CONFIG_USE_OF
988 998
989static const struct of_dev_auxdata r8a7740_auxdata_lookup[] __initconst = { 999void __init r8a7740_add_early_devices_dt(void)
990 { } 1000{
991}; 1001 shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
1002
1003 early_platform_add_devices(r8a7740_early_devices,
1004 ARRAY_SIZE(r8a7740_early_devices));
1005
1006 /* setup early console here as well */
1007 shmobile_setup_console();
1008}
992 1009
993void __init r8a7740_add_standard_devices_dt(void) 1010void __init r8a7740_add_standard_devices_dt(void)
994{ 1011{
995 platform_add_devices(r8a7740_devices_dt, 1012 platform_add_devices(r8a7740_devices_dt,
996 ARRAY_SIZE(r8a7740_devices_dt)); 1013 ARRAY_SIZE(r8a7740_devices_dt));
997 of_platform_populate(NULL, of_default_bus_match_table, 1014 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
998 r8a7740_auxdata_lookup, NULL);
999} 1015}
1000 1016
1001void __init r8a7740_init_delay(void) 1017void __init r8a7740_init_delay(void)
diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
index 80c20392ad7c..a3a2e37b03f3 100644
--- a/arch/arm/mach-shmobile/setup-r8a7778.c
+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
@@ -53,7 +53,7 @@
53 .irqs = SCIx_IRQ_MUXED(irq), \ 53 .irqs = SCIx_IRQ_MUXED(irq), \
54} 54}
55 55
56static struct plat_sci_port scif_platform_data[] = { 56static struct plat_sci_port scif_platform_data[] __initdata = {
57 SCIF_INFO(0xffe40000, gic_iid(0x66)), 57 SCIF_INFO(0xffe40000, gic_iid(0x66)),
58 SCIF_INFO(0xffe41000, gic_iid(0x67)), 58 SCIF_INFO(0xffe41000, gic_iid(0x67)),
59 SCIF_INFO(0xffe42000, gic_iid(0x68)), 59 SCIF_INFO(0xffe42000, gic_iid(0x68)),
@@ -63,24 +63,24 @@ static struct plat_sci_port scif_platform_data[] = {
63}; 63};
64 64
65/* TMU */ 65/* TMU */
66static struct resource sh_tmu0_resources[] = { 66static struct resource sh_tmu0_resources[] __initdata = {
67 DEFINE_RES_MEM(0xffd80008, 12), 67 DEFINE_RES_MEM(0xffd80008, 12),
68 DEFINE_RES_IRQ(gic_iid(0x40)), 68 DEFINE_RES_IRQ(gic_iid(0x40)),
69}; 69};
70 70
71static struct sh_timer_config sh_tmu0_platform_data = { 71static struct sh_timer_config sh_tmu0_platform_data __initdata = {
72 .name = "TMU00", 72 .name = "TMU00",
73 .channel_offset = 0x4, 73 .channel_offset = 0x4,
74 .timer_bit = 0, 74 .timer_bit = 0,
75 .clockevent_rating = 200, 75 .clockevent_rating = 200,
76}; 76};
77 77
78static struct resource sh_tmu1_resources[] = { 78static struct resource sh_tmu1_resources[] __initdata = {
79 DEFINE_RES_MEM(0xffd80014, 12), 79 DEFINE_RES_MEM(0xffd80014, 12),
80 DEFINE_RES_IRQ(gic_iid(0x41)), 80 DEFINE_RES_IRQ(gic_iid(0x41)),
81}; 81};
82 82
83static struct sh_timer_config sh_tmu1_platform_data = { 83static struct sh_timer_config sh_tmu1_platform_data __initdata = {
84 .name = "TMU01", 84 .name = "TMU01",
85 .channel_offset = 0x10, 85 .channel_offset = 0x10,
86 .timer_bit = 1, 86 .timer_bit = 1,
@@ -189,7 +189,7 @@ USB_PLATFORM_INFO(ehci);
189USB_PLATFORM_INFO(ohci); 189USB_PLATFORM_INFO(ohci);
190 190
191/* Ether */ 191/* Ether */
192static struct resource ether_resources[] = { 192static struct resource ether_resources[] __initdata = {
193 DEFINE_RES_MEM(0xfde00000, 0x400), 193 DEFINE_RES_MEM(0xfde00000, 0x400),
194 DEFINE_RES_IRQ(gic_iid(0x89)), 194 DEFINE_RES_IRQ(gic_iid(0x89)),
195}; 195};
@@ -203,17 +203,17 @@ void __init r8a7778_add_ether_device(struct sh_eth_plat_data *pdata)
203} 203}
204 204
205/* PFC/GPIO */ 205/* PFC/GPIO */
206static struct resource pfc_resources[] = { 206static struct resource pfc_resources[] __initdata = {
207 DEFINE_RES_MEM(0xfffc0000, 0x118), 207 DEFINE_RES_MEM(0xfffc0000, 0x118),
208}; 208};
209 209
210#define R8A7778_GPIO(idx) \ 210#define R8A7778_GPIO(idx) \
211static struct resource r8a7778_gpio##idx##_resources[] = { \ 211static struct resource r8a7778_gpio##idx##_resources[] __initdata = { \
212 DEFINE_RES_MEM(0xffc40000 + 0x1000 * (idx), 0x30), \ 212 DEFINE_RES_MEM(0xffc40000 + 0x1000 * (idx), 0x30), \
213 DEFINE_RES_IRQ(gic_iid(0x87)), \ 213 DEFINE_RES_IRQ(gic_iid(0x87)), \
214}; \ 214}; \
215 \ 215 \
216static struct gpio_rcar_config r8a7778_gpio##idx##_platform_data = { \ 216static struct gpio_rcar_config r8a7778_gpio##idx##_platform_data __initdata = { \
217 .gpio_base = 32 * (idx), \ 217 .gpio_base = 32 * (idx), \
218 .irq_base = GPIO_IRQ_BASE(idx), \ 218 .irq_base = GPIO_IRQ_BASE(idx), \
219 .number_of_pins = 32, \ 219 .number_of_pins = 32, \
@@ -249,7 +249,7 @@ void __init r8a7778_pinmux_init(void)
249}; 249};
250 250
251/* SDHI */ 251/* SDHI */
252static struct resource sdhi_resources[] = { 252static struct resource sdhi_resources[] __initdata = {
253 /* SDHI0 */ 253 /* SDHI0 */
254 DEFINE_RES_MEM(0xFFE4C000, 0x100), 254 DEFINE_RES_MEM(0xFFE4C000, 0x100),
255 DEFINE_RES_IRQ(gic_iid(0x77)), 255 DEFINE_RES_IRQ(gic_iid(0x77)),
@@ -365,12 +365,12 @@ void __init r8a7778_init_late(void)
365 platform_device_register_full(&ohci_info); 365 platform_device_register_full(&ohci_info);
366} 366}
367 367
368static struct renesas_intc_irqpin_config irqpin_platform_data = { 368static struct renesas_intc_irqpin_config irqpin_platform_data __initdata = {
369 .irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */ 369 .irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */
370 .sense_bitfield_width = 2, 370 .sense_bitfield_width = 2,
371}; 371};
372 372
373static struct resource irqpin_resources[] = { 373static struct resource irqpin_resources[] __initdata = {
374 DEFINE_RES_MEM(0xfe78001c, 4), /* ICR1 */ 374 DEFINE_RES_MEM(0xfe78001c, 4), /* ICR1 */
375 DEFINE_RES_MEM(0xfe780010, 4), /* INTPRI */ 375 DEFINE_RES_MEM(0xfe780010, 4), /* INTPRI */
376 DEFINE_RES_MEM(0xfe780024, 4), /* INTREQ */ 376 DEFINE_RES_MEM(0xfe780024, 4), /* INTREQ */
@@ -408,17 +408,25 @@ void __init r8a7778_init_irq_extpin(int irlm)
408 &irqpin_platform_data, sizeof(irqpin_platform_data)); 408 &irqpin_platform_data, sizeof(irqpin_platform_data));
409} 409}
410 410
411void __init r8a7778_init_delay(void)
412{
413 shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
414}
415
416#ifdef CONFIG_USE_OF
411#define INT2SMSKCR0 0x82288 /* 0xfe782288 */ 417#define INT2SMSKCR0 0x82288 /* 0xfe782288 */
412#define INT2SMSKCR1 0x8228c /* 0xfe78228c */ 418#define INT2SMSKCR1 0x8228c /* 0xfe78228c */
413 419
414#define INT2NTSR0 0x00018 /* 0xfe700018 */ 420#define INT2NTSR0 0x00018 /* 0xfe700018 */
415#define INT2NTSR1 0x0002c /* 0xfe70002c */ 421#define INT2NTSR1 0x0002c /* 0xfe70002c */
416static void __init r8a7778_init_irq_common(void) 422void __init r8a7778_init_irq_dt(void)
417{ 423{
418 void __iomem *base = ioremap_nocache(0xfe700000, 0x00100000); 424 void __iomem *base = ioremap_nocache(0xfe700000, 0x00100000);
419 425
420 BUG_ON(!base); 426 BUG_ON(!base);
421 427
428 irqchip_init();
429
422 /* route all interrupts to ARM */ 430 /* route all interrupts to ARM */
423 __raw_writel(0x73ffffff, base + INT2NTSR0); 431 __raw_writel(0x73ffffff, base + INT2NTSR0);
424 __raw_writel(0xffffffff, base + INT2NTSR1); 432 __raw_writel(0xffffffff, base + INT2NTSR1);
@@ -430,43 +438,6 @@ static void __init r8a7778_init_irq_common(void)
430 iounmap(base); 438 iounmap(base);
431} 439}
432 440
433void __init r8a7778_init_irq(void)
434{
435 void __iomem *gic_dist_base;
436 void __iomem *gic_cpu_base;
437
438 gic_dist_base = ioremap_nocache(0xfe438000, PAGE_SIZE);
439 gic_cpu_base = ioremap_nocache(0xfe430000, PAGE_SIZE);
440 BUG_ON(!gic_dist_base || !gic_cpu_base);
441
442 /* use GIC to handle interrupts */
443 gic_init(0, 29, gic_dist_base, gic_cpu_base);
444
445 r8a7778_init_irq_common();
446}
447
448void __init r8a7778_init_delay(void)
449{
450 shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
451}
452
453#ifdef CONFIG_USE_OF
454void __init r8a7778_init_irq_dt(void)
455{
456 irqchip_init();
457 r8a7778_init_irq_common();
458}
459
460static const struct of_dev_auxdata r8a7778_auxdata_lookup[] __initconst = {
461 {},
462};
463
464void __init r8a7778_add_standard_devices_dt(void)
465{
466 of_platform_populate(NULL, of_default_bus_match_table,
467 r8a7778_auxdata_lookup, NULL);
468}
469
470static const char *r8a7778_compat_dt[] __initdata = { 441static const char *r8a7778_compat_dt[] __initdata = {
471 "renesas,r8a7778", 442 "renesas,r8a7778",
472 NULL, 443 NULL,
@@ -475,7 +446,6 @@ static const char *r8a7778_compat_dt[] __initdata = {
475DT_MACHINE_START(R8A7778_DT, "Generic R8A7778 (Flattened Device Tree)") 446DT_MACHINE_START(R8A7778_DT, "Generic R8A7778 (Flattened Device Tree)")
476 .init_early = r8a7778_init_delay, 447 .init_early = r8a7778_init_delay,
477 .init_irq = r8a7778_init_irq_dt, 448 .init_irq = r8a7778_init_irq_dt,
478 .init_machine = r8a7778_add_standard_devices_dt,
479 .init_time = shmobile_timer_init, 449 .init_time = shmobile_timer_init,
480 .dt_compat = r8a7778_compat_dt, 450 .dt_compat = r8a7778_compat_dt,
481 .init_late = r8a7778_init_late, 451 .init_late = r8a7778_init_late,
diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
index 398687761f50..ddee4aa8e669 100644
--- a/arch/arm/mach-shmobile/setup-r8a7779.c
+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
@@ -29,7 +29,6 @@
29#include <linux/input.h> 29#include <linux/input.h>
30#include <linux/io.h> 30#include <linux/io.h>
31#include <linux/serial_sci.h> 31#include <linux/serial_sci.h>
32#include <linux/sh_intc.h>
33#include <linux/sh_timer.h> 32#include <linux/sh_timer.h>
34#include <linux/dma-mapping.h> 33#include <linux/dma-mapping.h>
35#include <linux/usb/otg.h> 34#include <linux/usb/otg.h>
@@ -37,7 +36,6 @@
37#include <linux/usb/ehci_pdriver.h> 36#include <linux/usb/ehci_pdriver.h>
38#include <linux/usb/ohci_pdriver.h> 37#include <linux/usb/ohci_pdriver.h>
39#include <linux/pm_runtime.h> 38#include <linux/pm_runtime.h>
40#include <mach/hardware.h>
41#include <mach/irqs.h> 39#include <mach/irqs.h>
42#include <mach/r8a7779.h> 40#include <mach/r8a7779.h>
43#include <mach/common.h> 41#include <mach/common.h>
@@ -388,15 +386,6 @@ static struct platform_device sata_device = {
388 }, 386 },
389}; 387};
390 388
391/* USB PHY */
392static struct resource usb_phy_resources[] __initdata = {
393 [0] = {
394 .start = 0xffe70800,
395 .end = 0xffe70900 - 1,
396 .flags = IORESOURCE_MEM,
397 },
398};
399
400/* USB */ 389/* USB */
401static struct usb_phy *phy; 390static struct usb_phy *phy;
402 391
@@ -602,14 +591,6 @@ void __init r8a7779_add_ether_device(struct sh_eth_plat_data *pdata)
602 pdata, sizeof(*pdata)); 591 pdata, sizeof(*pdata));
603} 592}
604 593
605void __init r8a7779_add_usb_phy_device(struct rcar_phy_platform_data *pdata)
606{
607 platform_device_register_resndata(&platform_bus, "rcar_usb_phy", -1,
608 usb_phy_resources,
609 ARRAY_SIZE(usb_phy_resources),
610 pdata, sizeof(*pdata));
611}
612
613/* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */ 594/* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
614void __init __weak r8a7779_register_twd(void) { } 595void __init __weak r8a7779_register_twd(void) { }
615 596
@@ -665,10 +646,6 @@ void __init r8a7779_init_delay(void)
665 shmobile_setup_delay(1000, 2, 4); /* Cortex-A9 @ 1000MHz */ 646 shmobile_setup_delay(1000, 2, 4); /* Cortex-A9 @ 1000MHz */
666} 647}
667 648
668static const struct of_dev_auxdata r8a7779_auxdata_lookup[] __initconst = {
669 {},
670};
671
672void __init r8a7779_add_standard_devices_dt(void) 649void __init r8a7779_add_standard_devices_dt(void)
673{ 650{
674 /* clocks are setup late during boot in the case of DT */ 651 /* clocks are setup late during boot in the case of DT */
@@ -676,8 +653,7 @@ void __init r8a7779_add_standard_devices_dt(void)
676 653
677 platform_add_devices(r8a7779_devices_dt, 654 platform_add_devices(r8a7779_devices_dt,
678 ARRAY_SIZE(r8a7779_devices_dt)); 655 ARRAY_SIZE(r8a7779_devices_dt));
679 of_platform_populate(NULL, of_default_bus_match_table, 656 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
680 r8a7779_auxdata_lookup, NULL);
681} 657}
682 658
683static const char *r8a7779_compat_dt[] __initdata = { 659static const char *r8a7779_compat_dt[] __initdata = {
diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
index 28f94752b8ff..4c96dad21195 100644
--- a/arch/arm/mach-shmobile/setup-r8a7790.c
+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
@@ -19,12 +19,12 @@
19 */ 19 */
20 20
21#include <linux/irq.h> 21#include <linux/irq.h>
22#include <linux/irqchip.h>
23#include <linux/kernel.h> 22#include <linux/kernel.h>
24#include <linux/of_platform.h> 23#include <linux/of_platform.h>
25#include <linux/serial_sci.h>
26#include <linux/platform_data/gpio-rcar.h> 24#include <linux/platform_data/gpio-rcar.h>
27#include <linux/platform_data/irq-renesas-irqc.h> 25#include <linux/platform_data/irq-renesas-irqc.h>
26#include <linux/serial_sci.h>
27#include <linux/sh_timer.h>
28#include <mach/common.h> 28#include <mach/common.h>
29#include <mach/irqs.h> 29#include <mach/irqs.h>
30#include <mach/r8a7790.h> 30#include <mach/r8a7790.h>
@@ -149,6 +149,36 @@ static struct resource irqc0_resources[] __initdata = {
149 &irqc##idx##_data, \ 149 &irqc##idx##_data, \
150 sizeof(struct renesas_irqc_config)) 150 sizeof(struct renesas_irqc_config))
151 151
152static struct resource thermal_resources[] __initdata = {
153 DEFINE_RES_MEM(0xe61f0000, 0x14),
154 DEFINE_RES_MEM(0xe61f0100, 0x38),
155 DEFINE_RES_IRQ(gic_spi(69)),
156};
157
158#define r8a7790_register_thermal() \
159 platform_device_register_simple("rcar_thermal", -1, \
160 thermal_resources, \
161 ARRAY_SIZE(thermal_resources))
162
163static struct sh_timer_config cmt00_platform_data = {
164 .name = "CMT00",
165 .timer_bit = 0,
166 .clockevent_rating = 80,
167};
168
169static struct resource cmt00_resources[] = {
170 DEFINE_RES_MEM(0xffca0510, 0x0c),
171 DEFINE_RES_MEM(0xffca0500, 0x04),
172 DEFINE_RES_IRQ(gic_spi(142)), /* CMT0_0 */
173};
174
175#define r8a7790_register_cmt(idx) \
176 platform_device_register_resndata(&platform_bus, "sh_cmt", \
177 idx, cmt##idx##_resources, \
178 ARRAY_SIZE(cmt##idx##_resources), \
179 &cmt##idx##_platform_data, \
180 sizeof(struct sh_timer_config))
181
152void __init r8a7790_add_standard_devices(void) 182void __init r8a7790_add_standard_devices(void)
153{ 183{
154 r8a7790_register_scif(SCIFA0); 184 r8a7790_register_scif(SCIFA0);
@@ -162,34 +192,91 @@ void __init r8a7790_add_standard_devices(void)
162 r8a7790_register_scif(HSCIF0); 192 r8a7790_register_scif(HSCIF0);
163 r8a7790_register_scif(HSCIF1); 193 r8a7790_register_scif(HSCIF1);
164 r8a7790_register_irqc(0); 194 r8a7790_register_irqc(0);
195 r8a7790_register_thermal();
196 r8a7790_register_cmt(00);
165} 197}
166 198
199#define MODEMR 0xe6160060
200
201u32 __init r8a7790_read_mode_pins(void)
202{
203 void __iomem *modemr = ioremap_nocache(MODEMR, 4);
204 u32 mode;
205
206 BUG_ON(!modemr);
207 mode = ioread32(modemr);
208 iounmap(modemr);
209
210 return mode;
211}
212
213#define CNTCR 0
214#define CNTFID0 0x20
215
167void __init r8a7790_timer_init(void) 216void __init r8a7790_timer_init(void)
168{ 217{
169 void __iomem *cntcr; 218#ifdef CONFIG_ARM_ARCH_TIMER
219 u32 mode = r8a7790_read_mode_pins();
220 void __iomem *base;
221 int extal_mhz = 0;
222 u32 freq;
223
224 /* At Linux boot time the r8a7790 arch timer comes up
225 * with the counter disabled. Moreover, it may also report
226 * a potentially incorrect fixed 13 MHz frequency. To be
227 * correct these registers need to be updated to use the
228 * frequency EXTAL / 2 which can be determined by the MD pins.
229 */
230
231 switch (mode & (MD(14) | MD(13))) {
232 case 0:
233 extal_mhz = 15;
234 break;
235 case MD(13):
236 extal_mhz = 20;
237 break;
238 case MD(14):
239 extal_mhz = 26;
240 break;
241 case MD(13) | MD(14):
242 extal_mhz = 30;
243 break;
244 }
170 245
171 /* make sure arch timer is started by setting bit 0 of CNTCT */ 246 /* The arch timer frequency equals EXTAL / 2 */
172 cntcr = ioremap(0xe6080000, PAGE_SIZE); 247 freq = extal_mhz * (1000000 / 2);
173 iowrite32(1, cntcr); 248
174 iounmap(cntcr); 249 /* Remap "armgcnt address map" space */
250 base = ioremap(0xe6080000, PAGE_SIZE);
251
252 /* Update registers with correct frequency */
253 iowrite32(freq, base + CNTFID0);
254 asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
255
256 /* make sure arch timer is started by setting bit 0 of CNTCR */
257 iowrite32(1, base + CNTCR);
258 iounmap(base);
259#endif /* CONFIG_ARM_ARCH_TIMER */
175 260
176 shmobile_timer_init(); 261 shmobile_timer_init();
177} 262}
178 263
179#ifdef CONFIG_USE_OF 264void __init r8a7790_init_delay(void)
180void __init r8a7790_add_standard_devices_dt(void)
181{ 265{
182 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 266#ifndef CONFIG_ARM_ARCH_TIMER
267 shmobile_setup_delay(1300, 2, 4); /* Cortex-A15 @ 1300MHz */
268#endif
183} 269}
184 270
271#ifdef CONFIG_USE_OF
272
185static const char *r8a7790_boards_compat_dt[] __initdata = { 273static const char *r8a7790_boards_compat_dt[] __initdata = {
186 "renesas,r8a7790", 274 "renesas,r8a7790",
187 NULL, 275 NULL,
188}; 276};
189 277
190DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)") 278DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)")
191 .init_irq = irqchip_init, 279 .init_early = r8a7790_init_delay,
192 .init_machine = r8a7790_add_standard_devices_dt,
193 .init_time = r8a7790_timer_init, 280 .init_time = r8a7790_timer_init,
194 .dt_compat = r8a7790_boards_compat_dt, 281 .dt_compat = r8a7790_boards_compat_dt,
195MACHINE_END 282MACHINE_END
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index 5502d624aca6..311878391e18 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -35,7 +35,6 @@
35#include <linux/dma-mapping.h> 35#include <linux/dma-mapping.h>
36#include <linux/platform_data/sh_ipmmu.h> 36#include <linux/platform_data/sh_ipmmu.h>
37#include <mach/dma-register.h> 37#include <mach/dma-register.h>
38#include <mach/hardware.h>
39#include <mach/irqs.h> 38#include <mach/irqs.h>
40#include <mach/sh7372.h> 39#include <mach/sh7372.h>
41#include <mach/common.h> 40#include <mach/common.h>
@@ -1147,10 +1146,6 @@ void __init sh7372_add_early_devices_dt(void)
1147 shmobile_setup_console(); 1146 shmobile_setup_console();
1148} 1147}
1149 1148
1150static const struct of_dev_auxdata sh7372_auxdata_lookup[] __initconst = {
1151 { }
1152};
1153
1154void __init sh7372_add_standard_devices_dt(void) 1149void __init sh7372_add_standard_devices_dt(void)
1155{ 1150{
1156 /* clocks are setup late during boot in the case of DT */ 1151 /* clocks are setup late during boot in the case of DT */
@@ -1159,8 +1154,7 @@ void __init sh7372_add_standard_devices_dt(void)
1159 platform_add_devices(sh7372_early_devices, 1154 platform_add_devices(sh7372_early_devices,
1160 ARRAY_SIZE(sh7372_early_devices)); 1155 ARRAY_SIZE(sh7372_early_devices));
1161 1156
1162 of_platform_populate(NULL, of_default_bus_match_table, 1157 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
1163 sh7372_auxdata_lookup, NULL);
1164} 1158}
1165 1159
1166static const char *sh7372_boards_compat_dt[] __initdata = { 1160static const char *sh7372_boards_compat_dt[] __initdata = {
diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
index 96e7ca1e4e11..22de17417fd7 100644
--- a/arch/arm/mach-shmobile/setup-sh73a0.c
+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
@@ -22,7 +22,6 @@
22#include <linux/init.h> 22#include <linux/init.h>
23#include <linux/interrupt.h> 23#include <linux/interrupt.h>
24#include <linux/irq.h> 24#include <linux/irq.h>
25#include <linux/irqchip.h>
26#include <linux/platform_device.h> 25#include <linux/platform_device.h>
27#include <linux/of_platform.h> 26#include <linux/of_platform.h>
28#include <linux/delay.h> 27#include <linux/delay.h>
@@ -35,7 +34,6 @@
35#include <linux/platform_data/sh_ipmmu.h> 34#include <linux/platform_data/sh_ipmmu.h>
36#include <linux/platform_data/irq-renesas-intc-irqpin.h> 35#include <linux/platform_data/irq-renesas-intc-irqpin.h>
37#include <mach/dma-register.h> 36#include <mach/dma-register.h>
38#include <mach/hardware.h>
39#include <mach/irqs.h> 37#include <mach/irqs.h>
40#include <mach/sh73a0.h> 38#include <mach/sh73a0.h>
41#include <mach/common.h> 39#include <mach/common.h>
@@ -61,29 +59,16 @@ void __init sh73a0_map_io(void)
61 iotable_init(sh73a0_io_desc, ARRAY_SIZE(sh73a0_io_desc)); 59 iotable_init(sh73a0_io_desc, ARRAY_SIZE(sh73a0_io_desc));
62} 60}
63 61
64static struct resource sh73a0_pfc_resources[] = { 62/* PFC */
65 [0] = { 63static struct resource pfc_resources[] __initdata = {
66 .start = 0xe6050000, 64 DEFINE_RES_MEM(0xe6050000, 0x8000),
67 .end = 0xe6057fff, 65 DEFINE_RES_MEM(0xe605801c, 0x000c),
68 .flags = IORESOURCE_MEM,
69 },
70 [1] = {
71 .start = 0xe605801c,
72 .end = 0xe6058027,
73 .flags = IORESOURCE_MEM,
74 }
75};
76
77static struct platform_device sh73a0_pfc_device = {
78 .name = "pfc-sh73a0",
79 .id = -1,
80 .resource = sh73a0_pfc_resources,
81 .num_resources = ARRAY_SIZE(sh73a0_pfc_resources),
82}; 66};
83 67
84void __init sh73a0_pinmux_init(void) 68void __init sh73a0_pinmux_init(void)
85{ 69{
86 platform_device_register(&sh73a0_pfc_device); 70 platform_device_register_simple("pfc-sh73a0", -1, pfc_resources,
71 ARRAY_SIZE(pfc_resources));
87} 72}
88 73
89static struct plat_sci_port scif0_platform_data = { 74static struct plat_sci_port scif0_platform_data = {
@@ -958,10 +943,6 @@ void __init sh73a0_add_early_devices(void)
958 943
959#ifdef CONFIG_USE_OF 944#ifdef CONFIG_USE_OF
960 945
961static const struct of_dev_auxdata sh73a0_auxdata_lookup[] __initconst = {
962 {},
963};
964
965void __init sh73a0_add_standard_devices_dt(void) 946void __init sh73a0_add_standard_devices_dt(void)
966{ 947{
967 struct platform_device_info devinfo = { .name = "cpufreq-cpu0", .id = -1, }; 948 struct platform_device_info devinfo = { .name = "cpufreq-cpu0", .id = -1, };
@@ -971,8 +952,7 @@ void __init sh73a0_add_standard_devices_dt(void)
971 952
972 platform_add_devices(sh73a0_devices_dt, 953 platform_add_devices(sh73a0_devices_dt,
973 ARRAY_SIZE(sh73a0_devices_dt)); 954 ARRAY_SIZE(sh73a0_devices_dt));
974 of_platform_populate(NULL, of_default_bus_match_table, 955 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
975 sh73a0_auxdata_lookup, NULL);
976 956
977 /* Instantiate cpufreq-cpu0 */ 957 /* Instantiate cpufreq-cpu0 */
978 platform_device_register_full(&devinfo); 958 platform_device_register_full(&devinfo);
@@ -988,7 +968,6 @@ DT_MACHINE_START(SH73A0_DT, "Generic SH73A0 (Flattened Device Tree)")
988 .map_io = sh73a0_map_io, 968 .map_io = sh73a0_map_io,
989 .init_early = sh73a0_init_delay, 969 .init_early = sh73a0_init_delay,
990 .nr_irqs = NR_IRQS_LEGACY, 970 .nr_irqs = NR_IRQS_LEGACY,
991 .init_irq = irqchip_init,
992 .init_machine = sh73a0_add_standard_devices_dt, 971 .init_machine = sh73a0_add_standard_devices_dt,
993 .dt_compat = sh73a0_boards_compat_dt, 972 .dt_compat = sh73a0_boards_compat_dt,
994MACHINE_END 973MACHINE_END
diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c
index 22a05a869d25..78e84c582453 100644
--- a/arch/arm/mach-shmobile/smp-emev2.c
+++ b/arch/arm/mach-shmobile/smp-emev2.c
@@ -29,6 +29,8 @@
29#include <asm/smp_scu.h> 29#include <asm/smp_scu.h>
30 30
31#define EMEV2_SCU_BASE 0x1e000000 31#define EMEV2_SCU_BASE 0x1e000000
32#define EMEV2_SMU_BASE 0xe0110000
33#define SMU_GENERAL_REG0 0x7c0
32 34
33static int emev2_boot_secondary(unsigned int cpu, struct task_struct *idle) 35static int emev2_boot_secondary(unsigned int cpu, struct task_struct *idle)
34{ 36{
@@ -38,10 +40,18 @@ static int emev2_boot_secondary(unsigned int cpu, struct task_struct *idle)
38 40
39static void __init emev2_smp_prepare_cpus(unsigned int max_cpus) 41static void __init emev2_smp_prepare_cpus(unsigned int max_cpus)
40{ 42{
43 void __iomem *smu;
44
45 /* setup EMEV2 specific SCU base, enable */
46 shmobile_scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE);
41 scu_enable(shmobile_scu_base); 47 scu_enable(shmobile_scu_base);
42 48
43 /* Tell ROM loader about our vector (in headsmp-scu.S, headsmp.S) */ 49 /* Tell ROM loader about our vector (in headsmp-scu.S, headsmp.S) */
44 emev2_set_boot_vector(__pa(shmobile_boot_vector)); 50 smu = ioremap(EMEV2_SMU_BASE, PAGE_SIZE);
51 if (smu) {
52 iowrite32(__pa(shmobile_boot_vector), smu + SMU_GENERAL_REG0);
53 iounmap(smu);
54 }
45 shmobile_boot_fn = virt_to_phys(shmobile_boot_scu); 55 shmobile_boot_fn = virt_to_phys(shmobile_boot_scu);
46 shmobile_boot_arg = (unsigned long)shmobile_scu_base; 56 shmobile_boot_arg = (unsigned long)shmobile_scu_base;
47 57
@@ -49,21 +59,7 @@ static void __init emev2_smp_prepare_cpus(unsigned int max_cpus)
49 scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL); 59 scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL);
50} 60}
51 61
52static void __init emev2_smp_init_cpus(void)
53{
54 unsigned int ncores;
55
56 /* setup EMEV2 specific SCU base */
57 shmobile_scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE);
58 emev2_clock_init(); /* need ioremapped SMU */
59
60 ncores = shmobile_scu_base ? scu_get_core_count(shmobile_scu_base) : 1;
61
62 shmobile_smp_init_cpus(ncores);
63}
64
65struct smp_operations emev2_smp_ops __initdata = { 62struct smp_operations emev2_smp_ops __initdata = {
66 .smp_init_cpus = emev2_smp_init_cpus,
67 .smp_prepare_cpus = emev2_smp_prepare_cpus, 63 .smp_prepare_cpus = emev2_smp_prepare_cpus,
68 .smp_boot_secondary = emev2_boot_secondary, 64 .smp_boot_secondary = emev2_boot_secondary,
69}; 65};
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-25 09:19:51 -0500