aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-shmobile
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2014-06-02 19:15:12 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2014-06-02 19:15:12 -0400
commit825f4e0271b0de3f7f31d963dcdaa0056fe9b73a (patch)
treeaef1f198da011a96fefbe9851137ca17afd929a4 /arch/arm/mach-shmobile
parent0a58471541cc823ef8056d23945c39fec154481c (diff)
parentb5b9324a6296bd0176fe1f8e06a1220207bd1bd3 (diff)
Merge tag 'soc-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next
Pull part one of ARM SoC updates from Olof Johansson: "A quite large set of SoC updates this cycle. In no particular order: - Multi-cluster power management for Samsung Exynos, adding support for big.LITTLE CPU switching on EXYNOS5 - SMP support for Marvell Armada 375 and 38x - SMP rework on Allwinner A31 - Xilinx Zynq support for SOC_BUS, big endian - Marvell orion5x platform cleanup, modernizing the implementation and moving to DT. - _Finally_ moving Samsung Exynos over to support MULTIPLATFORM, so that their platform can be enabled in the same kernel binary as most of the other v7 platforms in the tree. \o/ The work isn't quite complete, there's some driver fixes still needed, but the basics now work. New SoC support added: - Freescale i.MX6SX - LSI Axxia AXM55xx SoCs - Samsung EXYNOS 3250, 5260, 5410, 5420 and 5800 - STi STIH407 plus a large set of various smaller updates for different platforms. I'm probably missing some important one here" * tag 'soc-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (281 commits) ARM: exynos: don't run exynos4 l2x0 setup on other platforms ARM: exynos: Fix "allmodconfig" build errors in mcpm and hotplug ARM: EXYNOS: mcpm rename the power_down_finish ARM: EXYNOS: Enable mcpm for dual-cluster exynos5800 SoC ARM: EXYNOS: Enable multi-platform build support ARM: EXYNOS: Consolidate Kconfig entries ARM: EXYNOS: Add support for EXYNOS5410 SoC ARM: EXYNOS: Support secondary CPU boot of Exynos3250 ARM: EXYNOS: Add Exynos3250 SoC ID ARM: EXYNOS: Add 5800 SoC support ARM: EXYNOS: initial board support for exynos5260 SoC clk: exynos5410: register clocks using common clock framework ARM: debug: qcom: add UART addresses to Kconfig help for APQ8084 ARM: sunxi: allow building without reset controller Documentation: devicetree: arm: sort enable-method entries ARM: rockchip: convert smp bringup to CPU_METHOD_OF_DECLARE clk: exynos5250: Add missing sysmmu clocks for DISP and ISP blocks ARM: dts: axxia: Add reset controller power: reset: Add Axxia system reset driver ARM: axxia: Adding defconfig for AXM55xx ...
Diffstat (limited to 'arch/arm/mach-shmobile')
-rw-r--r--arch/arm/mach-shmobile/Kconfig13
-rw-r--r--arch/arm/mach-shmobile/Makefile3
-rw-r--r--arch/arm/mach-shmobile/board-armadillo800eva-reference.c2
-rw-r--r--arch/arm/mach-shmobile/board-koelsch-reference.c2
-rw-r--r--arch/arm/mach-shmobile/board-koelsch.c2
-rw-r--r--arch/arm/mach-shmobile/clock-emev2.c231
-rw-r--r--arch/arm/mach-shmobile/clock-r8a7740.c2
-rw-r--r--arch/arm/mach-shmobile/clock-r8a7778.c22
-rw-r--r--arch/arm/mach-shmobile/clock-r8a7790.c32
-rw-r--r--arch/arm/mach-shmobile/clock-r8a7791.c23
-rw-r--r--arch/arm/mach-shmobile/clock.c28
-rw-r--r--arch/arm/mach-shmobile/include/mach/clock.h16
-rw-r--r--arch/arm/mach-shmobile/include/mach/common.h1
-rw-r--r--arch/arm/mach-shmobile/include/mach/emev2.h9
-rw-r--r--arch/arm/mach-shmobile/include/mach/r8a7740.h1
-rw-r--r--arch/arm/mach-shmobile/include/mach/r8a7791.h1
-rw-r--r--arch/arm/mach-shmobile/pm-rmobile.c38
-rw-r--r--arch/arm/mach-shmobile/setup-emev2.c11
-rw-r--r--arch/arm/mach-shmobile/setup-r8a7740.c8
-rw-r--r--arch/arm/mach-shmobile/setup-r8a7790.c12
-rw-r--r--arch/arm/mach-shmobile/setup-r8a7791.c9
-rw-r--r--arch/arm/mach-shmobile/setup-rcar-gen2.c16
-rw-r--r--arch/arm/mach-shmobile/smp-emev2.c1
-rw-r--r--arch/arm/mach-shmobile/smp-r8a7791.c15
-rw-r--r--arch/arm/mach-shmobile/timer.c45
25 files changed, 167 insertions, 376 deletions
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 62eaa42cb13a..49d90ca62e87 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -107,6 +107,7 @@ config ARCH_R8A7778
107 select SH_CLK_CPG 107 select SH_CLK_CPG
108 select ARM_GIC 108 select ARM_GIC
109 select SYS_SUPPORTS_SH_TMU 109 select SYS_SUPPORTS_SH_TMU
110 select RENESAS_INTC_IRQPIN
110 111
111config ARCH_R8A7779 112config ARCH_R8A7779
112 bool "R-Car H1 (R8A77790)" 113 bool "R-Car H1 (R8A77790)"
@@ -139,16 +140,6 @@ config ARCH_R8A7791
139 select SYS_SUPPORTS_SH_CMT 140 select SYS_SUPPORTS_SH_CMT
140 select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE 141 select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
141 142
142config ARCH_EMEV2
143 bool "Emma Mobile EV2"
144 select ARCH_WANT_OPTIONAL_GPIOLIB
145 select ARM_GIC
146 select CPU_V7
147 select MIGHT_HAVE_PCI
148 select USE_OF
149 select AUTO_ZRELADDR
150 select SYS_SUPPORTS_EM_STI
151
152config ARCH_R7S72100 143config ARCH_R7S72100
153 bool "RZ/A1H (R7S72100)" 144 bool "RZ/A1H (R7S72100)"
154 select ARCH_WANT_OPTIONAL_GPIOLIB 145 select ARCH_WANT_OPTIONAL_GPIOLIB
@@ -215,7 +206,6 @@ config MACH_BOCKW
215 depends on ARCH_R8A7778 206 depends on ARCH_R8A7778
216 select ARCH_REQUIRE_GPIOLIB 207 select ARCH_REQUIRE_GPIOLIB
217 select REGULATOR_FIXED_VOLTAGE if REGULATOR 208 select REGULATOR_FIXED_VOLTAGE if REGULATOR
218 select RENESAS_INTC_IRQPIN
219 select SND_SOC_AK4554 if SND_SIMPLE_CARD 209 select SND_SOC_AK4554 if SND_SIMPLE_CARD
220 select SND_SOC_AK4642 if SND_SIMPLE_CARD 210 select SND_SOC_AK4642 if SND_SIMPLE_CARD
221 select USE_OF 211 select USE_OF
@@ -224,7 +214,6 @@ config MACH_BOCKW_REFERENCE
224 bool "BOCK-W - Reference Device Tree Implementation" 214 bool "BOCK-W - Reference Device Tree Implementation"
225 depends on ARCH_R8A7778 215 depends on ARCH_R8A7778
226 select ARCH_REQUIRE_GPIOLIB 216 select ARCH_REQUIRE_GPIOLIB
227 select RENESAS_INTC_IRQPIN
228 select REGULATOR_FIXED_VOLTAGE if REGULATOR 217 select REGULATOR_FIXED_VOLTAGE if REGULATOR
229 select USE_OF 218 select USE_OF
230 ---help--- 219 ---help---
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 4caffc912a81..9c5cd8c53a85 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -21,8 +21,8 @@ obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o
21obj-$(CONFIG_ARCH_R7S72100) += setup-r7s72100.o 21obj-$(CONFIG_ARCH_R7S72100) += setup-r7s72100.o
22 22
23# Clock objects 23# Clock objects
24ifndef CONFIG_COMMON_CLK
25obj-y += clock.o 24obj-y += clock.o
25ifndef CONFIG_COMMON_CLK
26obj-$(CONFIG_ARCH_SH7372) += clock-sh7372.o 26obj-$(CONFIG_ARCH_SH7372) += clock-sh7372.o
27obj-$(CONFIG_ARCH_SH73A0) += clock-sh73a0.o 27obj-$(CONFIG_ARCH_SH73A0) += clock-sh73a0.o
28obj-$(CONFIG_ARCH_R8A73A4) += clock-r8a73a4.o 28obj-$(CONFIG_ARCH_R8A73A4) += clock-r8a73a4.o
@@ -31,7 +31,6 @@ obj-$(CONFIG_ARCH_R8A7778) += clock-r8a7778.o
31obj-$(CONFIG_ARCH_R8A7779) += clock-r8a7779.o 31obj-$(CONFIG_ARCH_R8A7779) += clock-r8a7779.o
32obj-$(CONFIG_ARCH_R8A7790) += clock-r8a7790.o 32obj-$(CONFIG_ARCH_R8A7790) += clock-r8a7790.o
33obj-$(CONFIG_ARCH_R8A7791) += clock-r8a7791.o 33obj-$(CONFIG_ARCH_R8A7791) += clock-r8a7791.o
34obj-$(CONFIG_ARCH_EMEV2) += clock-emev2.o
35obj-$(CONFIG_ARCH_R7S72100) += clock-r7s72100.o 34obj-$(CONFIG_ARCH_R7S72100) += clock-r7s72100.o
36endif 35endif
37 36
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
index 57d1a78367b6..57d246eb8813 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
@@ -187,7 +187,7 @@ static const char *eva_boards_compat_dt[] __initdata = {
187 187
188DT_MACHINE_START(ARMADILLO800EVA_DT, "armadillo800eva-reference") 188DT_MACHINE_START(ARMADILLO800EVA_DT, "armadillo800eva-reference")
189 .map_io = r8a7740_map_io, 189 .map_io = r8a7740_map_io,
190 .init_early = r8a7740_init_delay, 190 .init_early = shmobile_init_delay,
191 .init_irq = r8a7740_init_irq_of, 191 .init_irq = r8a7740_init_irq_of,
192 .init_machine = eva_init, 192 .init_machine = eva_init,
193 .init_late = shmobile_init_late, 193 .init_late = shmobile_init_late,
diff --git a/arch/arm/mach-shmobile/board-koelsch-reference.c b/arch/arm/mach-shmobile/board-koelsch-reference.c
index a3fd30242bd8..ff33d9c4b658 100644
--- a/arch/arm/mach-shmobile/board-koelsch-reference.c
+++ b/arch/arm/mach-shmobile/board-koelsch-reference.c
@@ -139,7 +139,7 @@ static const char * const koelsch_boards_compat_dt[] __initconst = {
139 139
140DT_MACHINE_START(KOELSCH_DT, "koelsch") 140DT_MACHINE_START(KOELSCH_DT, "koelsch")
141 .smp = smp_ops(r8a7791_smp_ops), 141 .smp = smp_ops(r8a7791_smp_ops),
142 .init_early = r8a7791_init_early, 142 .init_early = shmobile_init_delay,
143 .init_time = rcar_gen2_timer_init, 143 .init_time = rcar_gen2_timer_init,
144 .init_machine = koelsch_add_standard_devices, 144 .init_machine = koelsch_add_standard_devices,
145 .init_late = shmobile_init_late, 145 .init_late = shmobile_init_late,
diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
index 5a034ff405d0..3cd8008d09dd 100644
--- a/arch/arm/mach-shmobile/board-koelsch.c
+++ b/arch/arm/mach-shmobile/board-koelsch.c
@@ -522,7 +522,7 @@ static const char * const koelsch_boards_compat_dt[] __initconst = {
522 522
523DT_MACHINE_START(KOELSCH_DT, "koelsch") 523DT_MACHINE_START(KOELSCH_DT, "koelsch")
524 .smp = smp_ops(r8a7791_smp_ops), 524 .smp = smp_ops(r8a7791_smp_ops),
525 .init_early = r8a7791_init_early, 525 .init_early = shmobile_init_delay,
526 .init_time = rcar_gen2_timer_init, 526 .init_time = rcar_gen2_timer_init,
527 .init_machine = koelsch_init, 527 .init_machine = koelsch_init,
528 .init_late = shmobile_init_late, 528 .init_late = shmobile_init_late,
diff --git a/arch/arm/mach-shmobile/clock-emev2.c b/arch/arm/mach-shmobile/clock-emev2.c
deleted file mode 100644
index 5ac13ba71d54..000000000000
--- a/arch/arm/mach-shmobile/clock-emev2.c
+++ /dev/null
@@ -1,231 +0,0 @@
1/*
2 * Emma Mobile EV2 clock framework support
3 *
4 * Copyright (C) 2012 Magnus Damm
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19#include <linux/init.h>
20#include <linux/kernel.h>
21#include <linux/io.h>
22#include <linux/sh_clk.h>
23#include <linux/clkdev.h>
24#include <mach/common.h>
25
26#define EMEV2_SMU_BASE 0xe0110000
27
28/* EMEV2 SMU registers */
29#define USIAU0_RSTCTRL 0x094
30#define USIBU1_RSTCTRL 0x0ac
31#define USIBU2_RSTCTRL 0x0b0
32#define USIBU3_RSTCTRL 0x0b4
33#define STI_RSTCTRL 0x124
34#define USIAU0GCLKCTRL 0x4a0
35#define USIBU1GCLKCTRL 0x4b8
36#define USIBU2GCLKCTRL 0x4bc
37#define USIBU3GCLKCTRL 0x04c0
38#define STIGCLKCTRL 0x528
39#define USIAU0SCLKDIV 0x61c
40#define USIB2SCLKDIV 0x65c
41#define USIB3SCLKDIV 0x660
42#define STI_CLKSEL 0x688
43
44/* not pretty, but hey */
45static void __iomem *smu_base;
46
47static void emev2_smu_write(unsigned long value, int offs)
48{
49 BUG_ON(!smu_base || (offs >= PAGE_SIZE));
50 iowrite32(value, smu_base + offs);
51}
52
53static struct clk_mapping smu_mapping = {
54 .phys = EMEV2_SMU_BASE,
55 .len = PAGE_SIZE,
56};
57
58/* Fixed 32 KHz root clock from C32K pin */
59static struct clk c32k_clk = {
60 .rate = 32768,
61 .mapping = &smu_mapping,
62};
63
64/* PLL3 multiplies C32K with 7000 */
65static unsigned long pll3_recalc(struct clk *clk)
66{
67 return clk->parent->rate * 7000;
68}
69
70static struct sh_clk_ops pll3_clk_ops = {
71 .recalc = pll3_recalc,
72};
73
74static struct clk pll3_clk = {
75 .ops = &pll3_clk_ops,
76 .parent = &c32k_clk,
77};
78
79static struct clk *main_clks[] = {
80 &c32k_clk,
81 &pll3_clk,
82};
83
84enum { SCLKDIV_USIAU0, SCLKDIV_USIBU2, SCLKDIV_USIBU1, SCLKDIV_USIBU3,
85 SCLKDIV_NR };
86
87#define SCLKDIV(_reg, _shift) \
88{ \
89 .parent = &pll3_clk, \
90 .enable_reg = IOMEM(EMEV2_SMU_BASE + (_reg)), \
91 .enable_bit = _shift, \
92}
93
94static struct clk sclkdiv_clks[SCLKDIV_NR] = {
95 [SCLKDIV_USIAU0] = SCLKDIV(USIAU0SCLKDIV, 0),
96 [SCLKDIV_USIBU2] = SCLKDIV(USIB2SCLKDIV, 16),
97 [SCLKDIV_USIBU1] = SCLKDIV(USIB2SCLKDIV, 0),
98 [SCLKDIV_USIBU3] = SCLKDIV(USIB3SCLKDIV, 0),
99};
100
101enum { GCLK_USIAU0_SCLK, GCLK_USIBU1_SCLK, GCLK_USIBU2_SCLK, GCLK_USIBU3_SCLK,
102 GCLK_STI_SCLK,
103 GCLK_NR };
104
105#define GCLK_SCLK(_parent, _reg) \
106{ \
107 .parent = _parent, \
108 .enable_reg = IOMEM(EMEV2_SMU_BASE + (_reg)), \
109 .enable_bit = 1, /* SCLK_GCC */ \
110}
111
112static struct clk gclk_clks[GCLK_NR] = {
113 [GCLK_USIAU0_SCLK] = GCLK_SCLK(&sclkdiv_clks[SCLKDIV_USIAU0],
114 USIAU0GCLKCTRL),
115 [GCLK_USIBU1_SCLK] = GCLK_SCLK(&sclkdiv_clks[SCLKDIV_USIBU1],
116 USIBU1GCLKCTRL),
117 [GCLK_USIBU2_SCLK] = GCLK_SCLK(&sclkdiv_clks[SCLKDIV_USIBU2],
118 USIBU2GCLKCTRL),
119 [GCLK_USIBU3_SCLK] = GCLK_SCLK(&sclkdiv_clks[SCLKDIV_USIBU3],
120 USIBU3GCLKCTRL),
121 [GCLK_STI_SCLK] = GCLK_SCLK(&c32k_clk, STIGCLKCTRL),
122};
123
124static int emev2_gclk_enable(struct clk *clk)
125{
126 iowrite32(ioread32(clk->mapped_reg) | (1 << clk->enable_bit),
127 clk->mapped_reg);
128 return 0;
129}
130
131static void emev2_gclk_disable(struct clk *clk)
132{
133 iowrite32(ioread32(clk->mapped_reg) & ~(1 << clk->enable_bit),
134 clk->mapped_reg);
135}
136
137static struct sh_clk_ops emev2_gclk_clk_ops = {
138 .enable = emev2_gclk_enable,
139 .disable = emev2_gclk_disable,
140 .recalc = followparent_recalc,
141};
142
143static int __init emev2_gclk_register(struct clk *clks, int nr)
144{
145 struct clk *clkp;
146 int ret = 0;
147 int k;
148
149 for (k = 0; !ret && (k < nr); k++) {
150 clkp = clks + k;
151 clkp->ops = &emev2_gclk_clk_ops;
152 ret |= clk_register(clkp);
153 }
154
155 return ret;
156}
157
158static unsigned long emev2_sclkdiv_recalc(struct clk *clk)
159{
160 unsigned int sclk_div;
161
162 sclk_div = (ioread32(clk->mapped_reg) >> clk->enable_bit) & 0xff;
163
164 return clk->parent->rate / (sclk_div + 1);
165}
166
167static struct sh_clk_ops emev2_sclkdiv_clk_ops = {
168 .recalc = emev2_sclkdiv_recalc,
169};
170
171static int __init emev2_sclkdiv_register(struct clk *clks, int nr)
172{
173 struct clk *clkp;
174 int ret = 0;
175 int k;
176
177 for (k = 0; !ret && (k < nr); k++) {
178 clkp = clks + k;
179 clkp->ops = &emev2_sclkdiv_clk_ops;
180 ret |= clk_register(clkp);
181 }
182
183 return ret;
184}
185
186static struct clk_lookup lookups[] = {
187 CLKDEV_DEV_ID("serial8250-em.0", &gclk_clks[GCLK_USIAU0_SCLK]),
188 CLKDEV_DEV_ID("e1020000.uart", &gclk_clks[GCLK_USIAU0_SCLK]),
189 CLKDEV_DEV_ID("serial8250-em.1", &gclk_clks[GCLK_USIBU1_SCLK]),
190 CLKDEV_DEV_ID("e1030000.uart", &gclk_clks[GCLK_USIBU1_SCLK]),
191 CLKDEV_DEV_ID("serial8250-em.2", &gclk_clks[GCLK_USIBU2_SCLK]),
192 CLKDEV_DEV_ID("e1040000.uart", &gclk_clks[GCLK_USIBU2_SCLK]),
193 CLKDEV_DEV_ID("serial8250-em.3", &gclk_clks[GCLK_USIBU3_SCLK]),
194 CLKDEV_DEV_ID("e1050000.uart", &gclk_clks[GCLK_USIBU3_SCLK]),
195 CLKDEV_DEV_ID("em_sti.0", &gclk_clks[GCLK_STI_SCLK]),
196 CLKDEV_DEV_ID("e0180000.sti", &gclk_clks[GCLK_STI_SCLK]),
197};
198
199void __init emev2_clock_init(void)
200{
201 int k, ret = 0;
202
203 smu_base = ioremap(EMEV2_SMU_BASE, PAGE_SIZE);
204 BUG_ON(!smu_base);
205
206 /* setup STI timer to run on 32.768 kHz and deassert reset */
207 emev2_smu_write(0, STI_CLKSEL);
208 emev2_smu_write(1, STI_RSTCTRL);
209
210 /* deassert reset for UART0->UART3 */
211 emev2_smu_write(2, USIAU0_RSTCTRL);
212 emev2_smu_write(2, USIBU1_RSTCTRL);
213 emev2_smu_write(2, USIBU2_RSTCTRL);
214 emev2_smu_write(2, USIBU3_RSTCTRL);
215
216 for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
217 ret = clk_register(main_clks[k]);
218
219 if (!ret)
220 ret = emev2_sclkdiv_register(sclkdiv_clks, SCLKDIV_NR);
221
222 if (!ret)
223 ret = emev2_gclk_register(gclk_clks, GCLK_NR);
224
225 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
226
227 if (!ret)
228 shmobile_clk_init();
229 else
230 panic("failed to setup emev2 clocks\n");
231}
diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
index dd989f93498f..433ec674ead1 100644
--- a/arch/arm/mach-shmobile/clock-r8a7740.c
+++ b/arch/arm/mach-shmobile/clock-r8a7740.c
@@ -596,7 +596,7 @@ static struct clk_lookup lookups[] = {
596 CLKDEV_DEV_ID("sh_mmcif", &mstp_clks[MSTP312]), 596 CLKDEV_DEV_ID("sh_mmcif", &mstp_clks[MSTP312]),
597 CLKDEV_DEV_ID("e6bd0000.mmc", &mstp_clks[MSTP312]), 597 CLKDEV_DEV_ID("e6bd0000.mmc", &mstp_clks[MSTP312]),
598 CLKDEV_DEV_ID("r8a7740-gether", &mstp_clks[MSTP309]), 598 CLKDEV_DEV_ID("r8a7740-gether", &mstp_clks[MSTP309]),
599 CLKDEV_DEV_ID("e9a00000.sh-eth", &mstp_clks[MSTP309]), 599 CLKDEV_DEV_ID("e9a00000.ethernet", &mstp_clks[MSTP309]),
600 CLKDEV_DEV_ID("renesas-tpu-pwm", &mstp_clks[MSTP304]), 600 CLKDEV_DEV_ID("renesas-tpu-pwm", &mstp_clks[MSTP304]),
601 CLKDEV_DEV_ID("e6600000.pwm", &mstp_clks[MSTP304]), 601 CLKDEV_DEV_ID("e6600000.pwm", &mstp_clks[MSTP304]),
602 602
diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
index 9989b1b06ffd..6609beb9b9b4 100644
--- a/arch/arm/mach-shmobile/clock-r8a7778.c
+++ b/arch/arm/mach-shmobile/clock-r8a7778.c
@@ -175,10 +175,6 @@ static struct clk mstp_clks[MSTP_NR] = {
175 175
176static struct clk_lookup lookups[] = { 176static struct clk_lookup lookups[] = {
177 /* main */ 177 /* main */
178 CLKDEV_CON_ID("audio_clk_a", &audio_clk_a),
179 CLKDEV_CON_ID("audio_clk_b", &audio_clk_b),
180 CLKDEV_CON_ID("audio_clk_c", &audio_clk_c),
181 CLKDEV_CON_ID("audio_clk_internal", &s1_clk),
182 CLKDEV_CON_ID("shyway_clk", &s_clk), 178 CLKDEV_CON_ID("shyway_clk", &s_clk),
183 CLKDEV_CON_ID("peripheral_clk", &p_clk), 179 CLKDEV_CON_ID("peripheral_clk", &p_clk),
184 180
@@ -234,15 +230,15 @@ static struct clk_lookup lookups[] = {
234 CLKDEV_ICK_ID("ssi.6", "rcar_sound", &mstp_clks[MSTP309]), 230 CLKDEV_ICK_ID("ssi.6", "rcar_sound", &mstp_clks[MSTP309]),
235 CLKDEV_ICK_ID("ssi.7", "rcar_sound", &mstp_clks[MSTP308]), 231 CLKDEV_ICK_ID("ssi.7", "rcar_sound", &mstp_clks[MSTP308]),
236 CLKDEV_ICK_ID("ssi.8", "rcar_sound", &mstp_clks[MSTP307]), 232 CLKDEV_ICK_ID("ssi.8", "rcar_sound", &mstp_clks[MSTP307]),
237 CLKDEV_ICK_ID("scu.0", "rcar_sound", &mstp_clks[MSTP531]), 233 CLKDEV_ICK_ID("src.0", "rcar_sound", &mstp_clks[MSTP531]),
238 CLKDEV_ICK_ID("scu.1", "rcar_sound", &mstp_clks[MSTP530]), 234 CLKDEV_ICK_ID("src.1", "rcar_sound", &mstp_clks[MSTP530]),
239 CLKDEV_ICK_ID("scu.2", "rcar_sound", &mstp_clks[MSTP529]), 235 CLKDEV_ICK_ID("src.2", "rcar_sound", &mstp_clks[MSTP529]),
240 CLKDEV_ICK_ID("scu.3", "rcar_sound", &mstp_clks[MSTP528]), 236 CLKDEV_ICK_ID("src.3", "rcar_sound", &mstp_clks[MSTP528]),
241 CLKDEV_ICK_ID("scu.4", "rcar_sound", &mstp_clks[MSTP527]), 237 CLKDEV_ICK_ID("src.4", "rcar_sound", &mstp_clks[MSTP527]),
242 CLKDEV_ICK_ID("scu.5", "rcar_sound", &mstp_clks[MSTP526]), 238 CLKDEV_ICK_ID("src.5", "rcar_sound", &mstp_clks[MSTP526]),
243 CLKDEV_ICK_ID("scu.6", "rcar_sound", &mstp_clks[MSTP525]), 239 CLKDEV_ICK_ID("src.6", "rcar_sound", &mstp_clks[MSTP525]),
244 CLKDEV_ICK_ID("scu.7", "rcar_sound", &mstp_clks[MSTP524]), 240 CLKDEV_ICK_ID("src.7", "rcar_sound", &mstp_clks[MSTP524]),
245 CLKDEV_ICK_ID("scu.8", "rcar_sound", &mstp_clks[MSTP523]), 241 CLKDEV_ICK_ID("src.8", "rcar_sound", &mstp_clks[MSTP523]),
246}; 242};
247 243
248void __init r8a7778_clock_init(void) 244void __init r8a7778_clock_init(void)
diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
index 3f93503f5b96..a936ae7de083 100644
--- a/arch/arm/mach-shmobile/clock-r8a7790.c
+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
@@ -249,10 +249,10 @@ static struct clk mstp_clks[MSTP_NR] = {
249 [MSTP1007] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 7, MSTPSR10, 0), /* SSI8 */ 249 [MSTP1007] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 7, MSTPSR10, 0), /* SSI8 */
250 [MSTP1006] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 6, MSTPSR10, 0), /* SSI9 */ 250 [MSTP1006] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 6, MSTPSR10, 0), /* SSI9 */
251 [MSTP1005] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 5, MSTPSR10, 0), /* SSI ALL */ 251 [MSTP1005] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 5, MSTPSR10, 0), /* SSI ALL */
252 [MSTP931] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 31, MSTPSR9, 0), /* I2C0 */ 252 [MSTP931] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 31, MSTPSR9, 0), /* I2C0 */
253 [MSTP930] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 30, MSTPSR9, 0), /* I2C1 */ 253 [MSTP930] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 30, MSTPSR9, 0), /* I2C1 */
254 [MSTP929] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 29, MSTPSR9, 0), /* I2C2 */ 254 [MSTP929] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 29, MSTPSR9, 0), /* I2C2 */
255 [MSTP928] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 28, MSTPSR9, 0), /* I2C3 */ 255 [MSTP928] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 28, MSTPSR9, 0), /* I2C3 */
256 [MSTP917] = SH_CLK_MSTP32_STS(&qspi_clk, SMSTPCR9, 17, MSTPSR9, 0), /* QSPI */ 256 [MSTP917] = SH_CLK_MSTP32_STS(&qspi_clk, SMSTPCR9, 17, MSTPSR9, 0), /* QSPI */
257 [MSTP815] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 15, MSTPSR8, 0), /* SATA0 */ 257 [MSTP815] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 15, MSTPSR8, 0), /* SATA0 */
258 [MSTP814] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 14, MSTPSR8, 0), /* SATA1 */ 258 [MSTP814] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 14, MSTPSR8, 0), /* SATA1 */
@@ -294,10 +294,6 @@ static struct clk mstp_clks[MSTP_NR] = {
294static struct clk_lookup lookups[] = { 294static struct clk_lookup lookups[] = {
295 295
296 /* main clocks */ 296 /* main clocks */
297 CLKDEV_CON_ID("audio_clk_a", &audio_clk_a),
298 CLKDEV_CON_ID("audio_clk_b", &audio_clk_b),
299 CLKDEV_CON_ID("audio_clk_c", &audio_clk_c),
300 CLKDEV_CON_ID("audio_clk_internal", &m2_clk),
301 CLKDEV_CON_ID("extal", &extal_clk), 297 CLKDEV_CON_ID("extal", &extal_clk),
302 CLKDEV_CON_ID("extal_div2", &extal_div2_clk), 298 CLKDEV_CON_ID("extal_div2", &extal_div2_clk),
303 CLKDEV_CON_ID("main", &main_clk), 299 CLKDEV_CON_ID("main", &main_clk),
@@ -381,16 +377,16 @@ static struct clk_lookup lookups[] = {
381 CLKDEV_ICK_ID("clk_b", "rcar_sound", &audio_clk_b), 377 CLKDEV_ICK_ID("clk_b", "rcar_sound", &audio_clk_b),
382 CLKDEV_ICK_ID("clk_c", "rcar_sound", &audio_clk_c), 378 CLKDEV_ICK_ID("clk_c", "rcar_sound", &audio_clk_c),
383 CLKDEV_ICK_ID("clk_i", "rcar_sound", &m2_clk), 379 CLKDEV_ICK_ID("clk_i", "rcar_sound", &m2_clk),
384 CLKDEV_ICK_ID("scu.0", "rcar_sound", &mstp_clks[MSTP1031]), 380 CLKDEV_ICK_ID("src.0", "rcar_sound", &mstp_clks[MSTP1031]),
385 CLKDEV_ICK_ID("scu.1", "rcar_sound", &mstp_clks[MSTP1030]), 381 CLKDEV_ICK_ID("src.1", "rcar_sound", &mstp_clks[MSTP1030]),
386 CLKDEV_ICK_ID("scu.2", "rcar_sound", &mstp_clks[MSTP1029]), 382 CLKDEV_ICK_ID("src.2", "rcar_sound", &mstp_clks[MSTP1029]),
387 CLKDEV_ICK_ID("scu.3", "rcar_sound", &mstp_clks[MSTP1028]), 383 CLKDEV_ICK_ID("src.3", "rcar_sound", &mstp_clks[MSTP1028]),
388 CLKDEV_ICK_ID("scu.4", "rcar_sound", &mstp_clks[MSTP1027]), 384 CLKDEV_ICK_ID("src.4", "rcar_sound", &mstp_clks[MSTP1027]),
389 CLKDEV_ICK_ID("scu.5", "rcar_sound", &mstp_clks[MSTP1026]), 385 CLKDEV_ICK_ID("src.5", "rcar_sound", &mstp_clks[MSTP1026]),
390 CLKDEV_ICK_ID("scu.6", "rcar_sound", &mstp_clks[MSTP1025]), 386 CLKDEV_ICK_ID("src.6", "rcar_sound", &mstp_clks[MSTP1025]),
391 CLKDEV_ICK_ID("scu.7", "rcar_sound", &mstp_clks[MSTP1024]), 387 CLKDEV_ICK_ID("src.7", "rcar_sound", &mstp_clks[MSTP1024]),
392 CLKDEV_ICK_ID("scu.8", "rcar_sound", &mstp_clks[MSTP1023]), 388 CLKDEV_ICK_ID("src.8", "rcar_sound", &mstp_clks[MSTP1023]),
393 CLKDEV_ICK_ID("scu.9", "rcar_sound", &mstp_clks[MSTP1022]), 389 CLKDEV_ICK_ID("src.9", "rcar_sound", &mstp_clks[MSTP1022]),
394 CLKDEV_ICK_ID("ssi.0", "rcar_sound", &mstp_clks[MSTP1015]), 390 CLKDEV_ICK_ID("ssi.0", "rcar_sound", &mstp_clks[MSTP1015]),
395 CLKDEV_ICK_ID("ssi.1", "rcar_sound", &mstp_clks[MSTP1014]), 391 CLKDEV_ICK_ID("ssi.1", "rcar_sound", &mstp_clks[MSTP1014]),
396 CLKDEV_ICK_ID("ssi.2", "rcar_sound", &mstp_clks[MSTP1013]), 392 CLKDEV_ICK_ID("ssi.2", "rcar_sound", &mstp_clks[MSTP1013]),
diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
index 701383fe3267..3b26c7eee873 100644
--- a/arch/arm/mach-shmobile/clock-r8a7791.c
+++ b/arch/arm/mach-shmobile/clock-r8a7791.c
@@ -25,6 +25,7 @@
25#include <linux/clkdev.h> 25#include <linux/clkdev.h>
26#include <mach/clock.h> 26#include <mach/clock.h>
27#include <mach/common.h> 27#include <mach/common.h>
28#include <mach/rcar-gen2.h>
28 29
29/* 30/*
30 * MD EXTAL PLL0 PLL1 PLL3 31 * MD EXTAL PLL0 PLL1 PLL3
@@ -43,8 +44,6 @@
43 * see "p1 / 2" on R8A7791_CLOCK_ROOT() below 44 * see "p1 / 2" on R8A7791_CLOCK_ROOT() below
44 */ 45 */
45 46
46#define MD(nr) (1 << nr)
47
48#define CPG_BASE 0xe6150000 47#define CPG_BASE 0xe6150000
49#define CPG_LEN 0x1000 48#define CPG_LEN 0x1000
50 49
@@ -68,7 +67,6 @@
68#define MSTPSR9 IOMEM(0xe61509a4) 67#define MSTPSR9 IOMEM(0xe61509a4)
69#define MSTPSR11 IOMEM(0xe61509ac) 68#define MSTPSR11 IOMEM(0xe61509ac)
70 69
71#define MODEMR 0xE6160060
72#define SDCKCR 0xE6150074 70#define SDCKCR 0xE6150074
73#define SD1CKCR 0xE6150078 71#define SD1CKCR 0xE6150078
74#define SD2CKCR 0xE615026c 72#define SD2CKCR 0xE615026c
@@ -190,12 +188,12 @@ static struct clk mstp_clks[MSTP_NR] = {
190 [MSTP1108] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 8, MSTPSR11, 0), /* SCIFA5 */ 188 [MSTP1108] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 8, MSTPSR11, 0), /* SCIFA5 */
191 [MSTP1107] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 7, MSTPSR11, 0), /* SCIFA4 */ 189 [MSTP1107] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 7, MSTPSR11, 0), /* SCIFA4 */
192 [MSTP1106] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 6, MSTPSR11, 0), /* SCIFA3 */ 190 [MSTP1106] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 6, MSTPSR11, 0), /* SCIFA3 */
193 [MSTP931] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 31, MSTPSR9, 0), /* I2C0 */ 191 [MSTP931] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 31, MSTPSR9, 0), /* I2C0 */
194 [MSTP930] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 30, MSTPSR9, 0), /* I2C1 */ 192 [MSTP930] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 30, MSTPSR9, 0), /* I2C1 */
195 [MSTP929] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 29, MSTPSR9, 0), /* I2C2 */ 193 [MSTP929] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 29, MSTPSR9, 0), /* I2C2 */
196 [MSTP928] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 28, MSTPSR9, 0), /* I2C3 */ 194 [MSTP928] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 28, MSTPSR9, 0), /* I2C3 */
197 [MSTP927] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 27, MSTPSR9, 0), /* I2C4 */ 195 [MSTP927] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 27, MSTPSR9, 0), /* I2C4 */
198 [MSTP925] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 25, MSTPSR9, 0), /* I2C5 */ 196 [MSTP925] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 25, MSTPSR9, 0), /* I2C5 */
199 [MSTP917] = SH_CLK_MSTP32_STS(&qspi_clk, SMSTPCR9, 17, MSTPSR9, 0), /* QSPI */ 197 [MSTP917] = SH_CLK_MSTP32_STS(&qspi_clk, SMSTPCR9, 17, MSTPSR9, 0), /* QSPI */
200 [MSTP815] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 15, MSTPSR8, 0), /* SATA0 */ 198 [MSTP815] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 15, MSTPSR8, 0), /* SATA0 */
201 [MSTP814] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 14, MSTPSR8, 0), /* SATA1 */ 199 [MSTP814] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 14, MSTPSR8, 0), /* SATA1 */
@@ -295,14 +293,9 @@ static struct clk_lookup lookups[] = {
295 293
296void __init r8a7791_clock_init(void) 294void __init r8a7791_clock_init(void)
297{ 295{
298 void __iomem *modemr = ioremap_nocache(MODEMR, PAGE_SIZE); 296 u32 mode = rcar_gen2_read_mode_pins();
299 u32 mode;
300 int k, ret = 0; 297 int k, ret = 0;
301 298
302 BUG_ON(!modemr);
303 mode = ioread32(modemr);
304 iounmap(modemr);
305
306 switch (mode & (MD(14) | MD(13))) { 299 switch (mode & (MD(14) | MD(13))) {
307 case 0: 300 case 0:
308 R8A7791_CLOCK_ROOT(15, &extal_clk, 172, 208, 106, 88); 301 R8A7791_CLOCK_ROOT(15, &extal_clk, 172, 208, 106, 88);
diff --git a/arch/arm/mach-shmobile/clock.c b/arch/arm/mach-shmobile/clock.c
index ad7df629d995..e7232a0373b9 100644
--- a/arch/arm/mach-shmobile/clock.c
+++ b/arch/arm/mach-shmobile/clock.c
@@ -21,6 +21,32 @@
21 */ 21 */
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/init.h> 23#include <linux/init.h>
24
25#ifdef CONFIG_COMMON_CLK
26#include <linux/clk.h>
27#include <linux/clkdev.h>
28#include <mach/clock.h>
29
30void __init shmobile_clk_workaround(const struct clk_name *clks,
31 int nr_clks, bool enable)
32{
33 const struct clk_name *clkn;
34 struct clk *clk;
35 unsigned int i;
36
37 for (i = 0; i < nr_clks; ++i) {
38 clkn = clks + i;
39 clk = clk_get(NULL, clkn->clk);
40 if (!IS_ERR(clk)) {
41 clk_register_clkdev(clk, clkn->con_id, clkn->dev_id);
42 if (enable)
43 clk_prepare_enable(clk);
44 clk_put(clk);
45 }
46 }
47}
48
49#else /* CONFIG_COMMON_CLK */
24#include <linux/sh_clk.h> 50#include <linux/sh_clk.h>
25#include <linux/export.h> 51#include <linux/export.h>
26#include <mach/clock.h> 52#include <mach/clock.h>
@@ -58,3 +84,5 @@ void __clk_put(struct clk *clk)
58{ 84{
59} 85}
60EXPORT_SYMBOL(__clk_put); 86EXPORT_SYMBOL(__clk_put);
87
88#endif /* CONFIG_COMMON_CLK */
diff --git a/arch/arm/mach-shmobile/include/mach/clock.h b/arch/arm/mach-shmobile/include/mach/clock.h
index 03e56074928c..9a93cf924b9c 100644
--- a/arch/arm/mach-shmobile/include/mach/clock.h
+++ b/arch/arm/mach-shmobile/include/mach/clock.h
@@ -1,6 +1,21 @@
1#ifndef CLOCK_H 1#ifndef CLOCK_H
2#define CLOCK_H 2#define CLOCK_H
3 3
4#ifdef CONFIG_COMMON_CLK
5/* temporary clock configuration helper for platform devices */
6
7struct clk_name {
8 const char *clk;
9 const char *con_id;
10 const char *dev_id;
11};
12
13void shmobile_clk_workaround(const struct clk_name *clks, int nr_clks,
14 bool enable);
15
16#else /* CONFIG_COMMON_CLK */
17/* legacy clock implementation */
18
4unsigned long shmobile_fixed_ratio_clk_recalc(struct clk *clk); 19unsigned long shmobile_fixed_ratio_clk_recalc(struct clk *clk);
5extern struct sh_clk_ops shmobile_fixed_ratio_clk_ops; 20extern struct sh_clk_ops shmobile_fixed_ratio_clk_ops;
6 21
@@ -36,4 +51,5 @@ do { \
36 (p)->div = d; \ 51 (p)->div = d; \
37} while (0) 52} while (0)
38 53
54#endif /* CONFIG_COMMON_CLK */
39#endif 55#endif
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index cb8e32deb2a3..f7a360edcc35 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -4,6 +4,7 @@
4extern void shmobile_earlytimer_init(void); 4extern void shmobile_earlytimer_init(void);
5extern void shmobile_setup_delay(unsigned int max_cpu_core_mhz, 5extern void shmobile_setup_delay(unsigned int max_cpu_core_mhz,
6 unsigned int mult, unsigned int div); 6 unsigned int mult, unsigned int div);
7extern void shmobile_init_delay(void);
7struct twd_local_timer; 8struct twd_local_timer;
8extern void shmobile_setup_console(void); 9extern void shmobile_setup_console(void);
9extern void shmobile_boot_vector(void); 10extern void shmobile_boot_vector(void);
diff --git a/arch/arm/mach-shmobile/include/mach/emev2.h b/arch/arm/mach-shmobile/include/mach/emev2.h
deleted file mode 100644
index fcb142a14e07..000000000000
--- a/arch/arm/mach-shmobile/include/mach/emev2.h
+++ /dev/null
@@ -1,9 +0,0 @@
1#ifndef __ASM_EMEV2_H__
2#define __ASM_EMEV2_H__
3
4extern void emev2_map_io(void);
5extern void emev2_init_delay(void);
6extern void emev2_clock_init(void);
7extern struct smp_operations emev2_smp_ops;
8
9#endif /* __ASM_EMEV2_H__ */
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7740.h b/arch/arm/mach-shmobile/include/mach/r8a7740.h
index d07932f872b6..5e3c9ec06303 100644
--- a/arch/arm/mach-shmobile/include/mach/r8a7740.h
+++ b/arch/arm/mach-shmobile/include/mach/r8a7740.h
@@ -47,7 +47,6 @@ enum {
47}; 47};
48 48
49extern void r8a7740_meram_workaround(void); 49extern void r8a7740_meram_workaround(void);
50extern void r8a7740_init_delay(void);
51extern void r8a7740_init_irq_of(void); 50extern void r8a7740_init_irq_of(void);
52extern void r8a7740_map_io(void); 51extern void r8a7740_map_io(void);
53extern void r8a7740_add_early_devices(void); 52extern void r8a7740_add_early_devices(void);
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7791.h b/arch/arm/mach-shmobile/include/mach/r8a7791.h
index 200fa699f730..664274cc4b64 100644
--- a/arch/arm/mach-shmobile/include/mach/r8a7791.h
+++ b/arch/arm/mach-shmobile/include/mach/r8a7791.h
@@ -5,7 +5,6 @@ void r8a7791_add_standard_devices(void);
5void r8a7791_add_dt_devices(void); 5void r8a7791_add_dt_devices(void);
6void r8a7791_clock_init(void); 6void r8a7791_clock_init(void);
7void r8a7791_pinmux_init(void); 7void r8a7791_pinmux_init(void);
8void r8a7791_init_early(void);
9extern struct smp_operations r8a7791_smp_ops; 8extern struct smp_operations r8a7791_smp_ops;
10 9
11#endif /* __ASM_R8A7791_H__ */ 10#endif /* __ASM_R8A7791_H__ */
diff --git a/arch/arm/mach-shmobile/pm-rmobile.c b/arch/arm/mach-shmobile/pm-rmobile.c
index 1fc05d9453d0..f710235aff2f 100644
--- a/arch/arm/mach-shmobile/pm-rmobile.c
+++ b/arch/arm/mach-shmobile/pm-rmobile.c
@@ -99,39 +99,7 @@ static int rmobile_pd_power_up(struct generic_pm_domain *genpd)
99 99
100static bool rmobile_pd_active_wakeup(struct device *dev) 100static bool rmobile_pd_active_wakeup(struct device *dev)
101{ 101{
102 bool (*active_wakeup)(struct device *dev); 102 return true;
103
104 active_wakeup = dev_gpd_data(dev)->ops.active_wakeup;
105 return active_wakeup ? active_wakeup(dev) : true;
106}
107
108static int rmobile_pd_stop_dev(struct device *dev)
109{
110 int (*stop)(struct device *dev);
111
112 stop = dev_gpd_data(dev)->ops.stop;
113 if (stop) {
114 int ret = stop(dev);
115 if (ret)
116 return ret;
117 }
118 return pm_clk_suspend(dev);
119}
120
121static int rmobile_pd_start_dev(struct device *dev)
122{
123 int (*start)(struct device *dev);
124 int ret;
125
126 ret = pm_clk_resume(dev);
127 if (ret)
128 return ret;
129
130 start = dev_gpd_data(dev)->ops.start;
131 if (start)
132 ret = start(dev);
133
134 return ret;
135} 103}
136 104
137static void rmobile_init_pm_domain(struct rmobile_pm_domain *rmobile_pd) 105static void rmobile_init_pm_domain(struct rmobile_pm_domain *rmobile_pd)
@@ -140,8 +108,8 @@ static void rmobile_init_pm_domain(struct rmobile_pm_domain *rmobile_pd)
140 struct dev_power_governor *gov = rmobile_pd->gov; 108 struct dev_power_governor *gov = rmobile_pd->gov;
141 109
142 pm_genpd_init(genpd, gov ? : &simple_qos_governor, false); 110 pm_genpd_init(genpd, gov ? : &simple_qos_governor, false);
143 genpd->dev_ops.stop = rmobile_pd_stop_dev; 111 genpd->dev_ops.stop = pm_clk_suspend;
144 genpd->dev_ops.start = rmobile_pd_start_dev; 112 genpd->dev_ops.start = pm_clk_resume;
145 genpd->dev_ops.active_wakeup = rmobile_pd_active_wakeup; 113 genpd->dev_ops.active_wakeup = rmobile_pd_active_wakeup;
146 genpd->dev_irq_safe = true; 114 genpd->dev_irq_safe = true;
147 genpd->power_off = rmobile_pd_power_down; 115 genpd->power_off = rmobile_pd_power_down;
diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c
index c71d667007b8..d953ff6e78a2 100644
--- a/arch/arm/mach-shmobile/setup-emev2.c
+++ b/arch/arm/mach-shmobile/setup-emev2.c
@@ -21,7 +21,6 @@
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/of_platform.h> 22#include <linux/of_platform.h>
23#include <mach/common.h> 23#include <mach/common.h>
24#include <mach/emev2.h>
25#include <asm/mach-types.h> 24#include <asm/mach-types.h>
26#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
27#include <asm/mach/map.h> 26#include <asm/mach/map.h>
@@ -38,23 +37,19 @@ static struct map_desc emev2_io_desc[] __initdata = {
38#endif 37#endif
39}; 38};
40 39
41void __init emev2_map_io(void) 40static void __init emev2_map_io(void)
42{ 41{
43 iotable_init(emev2_io_desc, ARRAY_SIZE(emev2_io_desc)); 42 iotable_init(emev2_io_desc, ARRAY_SIZE(emev2_io_desc));
44} 43}
45 44
46void __init emev2_init_delay(void) 45static void __init emev2_init_delay(void)
47{ 46{
48 shmobile_setup_delay(533, 1, 3); /* Cortex-A9 @ 533MHz */ 47 shmobile_setup_delay(533, 1, 3); /* Cortex-A9 @ 533MHz */
49} 48}
50 49
51static void __init emev2_add_standard_devices_dt(void) 50static void __init emev2_add_standard_devices_dt(void)
52{ 51{
53#ifdef CONFIG_COMMON_CLK
54 of_clk_init(NULL); 52 of_clk_init(NULL);
55#else
56 emev2_clock_init();
57#endif
58 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 53 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
59} 54}
60 55
@@ -63,6 +58,8 @@ static const char *emev2_boards_compat_dt[] __initconst = {
63 NULL, 58 NULL,
64}; 59};
65 60
61extern struct smp_operations emev2_smp_ops;
62
66DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)") 63DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)")
67 .smp = smp_ops(emev2_smp_ops), 64 .smp = smp_ops(emev2_smp_ops),
68 .map_io = emev2_map_io, 65 .map_io = emev2_map_io,
diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
index a177a7b3bdbd..2dfd198fb635 100644
--- a/arch/arm/mach-shmobile/setup-r8a7740.c
+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
@@ -876,11 +876,6 @@ void __init r8a7740_add_standard_devices_dt(void)
876 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 876 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
877} 877}
878 878
879void __init r8a7740_init_delay(void)
880{
881 shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
882};
883
884void __init r8a7740_init_irq_of(void) 879void __init r8a7740_init_irq_of(void)
885{ 880{
886 void __iomem *intc_prio_base = ioremap_nocache(0xe6900010, 0x10); 881 void __iomem *intc_prio_base = ioremap_nocache(0xe6900010, 0x10);
@@ -924,9 +919,10 @@ static const char *r8a7740_boards_compat_dt[] __initdata = {
924 919
925DT_MACHINE_START(R8A7740_DT, "Generic R8A7740 (Flattened Device Tree)") 920DT_MACHINE_START(R8A7740_DT, "Generic R8A7740 (Flattened Device Tree)")
926 .map_io = r8a7740_map_io, 921 .map_io = r8a7740_map_io,
927 .init_early = r8a7740_init_delay, 922 .init_early = shmobile_init_delay,
928 .init_irq = r8a7740_init_irq_of, 923 .init_irq = r8a7740_init_irq_of,
929 .init_machine = r8a7740_generic_init, 924 .init_machine = r8a7740_generic_init,
925 .init_late = shmobile_init_late,
930 .dt_compat = r8a7740_boards_compat_dt, 926 .dt_compat = r8a7740_boards_compat_dt,
931MACHINE_END 927MACHINE_END
932 928
diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
index c4616f0698c6..a901d9ef53f6 100644
--- a/arch/arm/mach-shmobile/setup-r8a7790.c
+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
@@ -185,12 +185,6 @@ void __init r8a7790_pinmux_init(void)
185 r8a7790_register_gpio(3); 185 r8a7790_register_gpio(3);
186 r8a7790_register_gpio(4); 186 r8a7790_register_gpio(4);
187 r8a7790_register_gpio(5); 187 r8a7790_register_gpio(5);
188 r8a7790_register_i2c(0);
189 r8a7790_register_i2c(1);
190 r8a7790_register_i2c(2);
191 r8a7790_register_i2c(3);
192 r8a7790_register_audio_dmac(0);
193 r8a7790_register_audio_dmac(1);
194} 188}
195 189
196#define __R8A7790_SCIF(scif_type, _scscr, index, baseaddr, irq) \ 190#define __R8A7790_SCIF(scif_type, _scscr, index, baseaddr, irq) \
@@ -308,6 +302,12 @@ void __init r8a7790_add_standard_devices(void)
308 r8a7790_add_dt_devices(); 302 r8a7790_add_dt_devices();
309 r8a7790_register_irqc(0); 303 r8a7790_register_irqc(0);
310 r8a7790_register_thermal(); 304 r8a7790_register_thermal();
305 r8a7790_register_i2c(0);
306 r8a7790_register_i2c(1);
307 r8a7790_register_i2c(2);
308 r8a7790_register_i2c(3);
309 r8a7790_register_audio_dmac(0);
310 r8a7790_register_audio_dmac(1);
311} 311}
312 312
313void __init r8a7790_init_early(void) 313void __init r8a7790_init_early(void)
diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c
index e28404e43860..949580ae150a 100644
--- a/arch/arm/mach-shmobile/setup-r8a7791.c
+++ b/arch/arm/mach-shmobile/setup-r8a7791.c
@@ -210,13 +210,6 @@ void __init r8a7791_add_standard_devices(void)
210 r8a7791_register_thermal(); 210 r8a7791_register_thermal();
211} 211}
212 212
213void __init r8a7791_init_early(void)
214{
215#ifndef CONFIG_ARM_ARCH_TIMER
216 shmobile_setup_delay(1300, 2, 4); /* Cortex-A15 @ 1300MHz */
217#endif
218}
219
220#ifdef CONFIG_USE_OF 213#ifdef CONFIG_USE_OF
221static const char *r8a7791_boards_compat_dt[] __initdata = { 214static const char *r8a7791_boards_compat_dt[] __initdata = {
222 "renesas,r8a7791", 215 "renesas,r8a7791",
@@ -225,7 +218,7 @@ static const char *r8a7791_boards_compat_dt[] __initdata = {
225 218
226DT_MACHINE_START(R8A7791_DT, "Generic R8A7791 (Flattened Device Tree)") 219DT_MACHINE_START(R8A7791_DT, "Generic R8A7791 (Flattened Device Tree)")
227 .smp = smp_ops(r8a7791_smp_ops), 220 .smp = smp_ops(r8a7791_smp_ops),
228 .init_early = r8a7791_init_early, 221 .init_early = shmobile_init_delay,
229 .init_time = rcar_gen2_timer_init, 222 .init_time = rcar_gen2_timer_init,
230 .dt_compat = r8a7791_boards_compat_dt, 223 .dt_compat = r8a7791_boards_compat_dt,
231MACHINE_END 224MACHINE_END
diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c
index 10604480f325..542c5a47173f 100644
--- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
+++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
@@ -30,12 +30,16 @@
30 30
31u32 rcar_gen2_read_mode_pins(void) 31u32 rcar_gen2_read_mode_pins(void)
32{ 32{
33 void __iomem *modemr = ioremap_nocache(MODEMR, 4); 33 static u32 mode;
34 u32 mode; 34 static bool mode_valid;
35 35
36 BUG_ON(!modemr); 36 if (!mode_valid) {
37 mode = ioread32(modemr); 37 void __iomem *modemr = ioremap_nocache(MODEMR, 4);
38 iounmap(modemr); 38 BUG_ON(!modemr);
39 mode = ioread32(modemr);
40 iounmap(modemr);
41 mode_valid = true;
42 }
39 43
40 return mode; 44 return mode;
41} 45}
diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c
index f2ca92308f75..2dfd748da7f3 100644
--- a/arch/arm/mach-shmobile/smp-emev2.c
+++ b/arch/arm/mach-shmobile/smp-emev2.c
@@ -24,7 +24,6 @@
24#include <linux/io.h> 24#include <linux/io.h>
25#include <linux/delay.h> 25#include <linux/delay.h>
26#include <mach/common.h> 26#include <mach/common.h>
27#include <mach/emev2.h>
28#include <asm/smp_plat.h> 27#include <asm/smp_plat.h>
29#include <asm/smp_scu.h> 28#include <asm/smp_scu.h>
30 29
diff --git a/arch/arm/mach-shmobile/smp-r8a7791.c b/arch/arm/mach-shmobile/smp-r8a7791.c
index 2df5bd190fe4..ec979529f30f 100644
--- a/arch/arm/mach-shmobile/smp-r8a7791.c
+++ b/arch/arm/mach-shmobile/smp-r8a7791.c
@@ -20,6 +20,7 @@
20#include <asm/smp_plat.h> 20#include <asm/smp_plat.h>
21#include <mach/common.h> 21#include <mach/common.h>
22#include <mach/r8a7791.h> 22#include <mach/r8a7791.h>
23#include <mach/rcar-gen2.h>
23 24
24#define RST 0xe6160000 25#define RST 0xe6160000
25#define CA15BAR 0x0020 26#define CA15BAR 0x0020
@@ -51,9 +52,21 @@ static void __init r8a7791_smp_prepare_cpus(unsigned int max_cpus)
51 iounmap(p); 52 iounmap(p);
52} 53}
53 54
55static int r8a7791_smp_boot_secondary(unsigned int cpu,
56 struct task_struct *idle)
57{
58 /* Error out when hardware debug mode is enabled */
59 if (rcar_gen2_read_mode_pins() & BIT(21)) {
60 pr_warn("Unable to boot CPU%u when MD21 is set\n", cpu);
61 return -ENOTSUPP;
62 }
63
64 return shmobile_smp_apmu_boot_secondary(cpu, idle);
65}
66
54struct smp_operations r8a7791_smp_ops __initdata = { 67struct smp_operations r8a7791_smp_ops __initdata = {
55 .smp_prepare_cpus = r8a7791_smp_prepare_cpus, 68 .smp_prepare_cpus = r8a7791_smp_prepare_cpus,
56 .smp_boot_secondary = shmobile_smp_apmu_boot_secondary, 69 .smp_boot_secondary = r8a7791_smp_boot_secondary,
57#ifdef CONFIG_HOTPLUG_CPU 70#ifdef CONFIG_HOTPLUG_CPU
58 .cpu_disable = shmobile_smp_cpu_disable, 71 .cpu_disable = shmobile_smp_cpu_disable,
59 .cpu_die = shmobile_smp_apmu_cpu_die, 72 .cpu_die = shmobile_smp_apmu_cpu_die,
diff --git a/arch/arm/mach-shmobile/timer.c b/arch/arm/mach-shmobile/timer.c
index 62d7052d6f21..68bc0b82226d 100644
--- a/arch/arm/mach-shmobile/timer.c
+++ b/arch/arm/mach-shmobile/timer.c
@@ -21,6 +21,24 @@
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22#include <linux/clocksource.h> 22#include <linux/clocksource.h>
23#include <linux/delay.h> 23#include <linux/delay.h>
24#include <linux/of_address.h>
25
26void __init shmobile_setup_delay_hz(unsigned int max_cpu_core_hz,
27 unsigned int mult, unsigned int div)
28{
29 /* calculate a worst-case loops-per-jiffy value
30 * based on maximum cpu core hz setting and the
31 * __delay() implementation in arch/arm/lib/delay.S
32 *
33 * this will result in a longer delay than expected
34 * when the cpu core runs on lower frequencies.
35 */
36
37 unsigned int value = HZ * div / mult;
38
39 if (!preset_lpj)
40 preset_lpj = max_cpu_core_hz / value;
41}
24 42
25void __init shmobile_setup_delay(unsigned int max_cpu_core_mhz, 43void __init shmobile_setup_delay(unsigned int max_cpu_core_mhz,
26 unsigned int mult, unsigned int div) 44 unsigned int mult, unsigned int div)
@@ -39,6 +57,33 @@ void __init shmobile_setup_delay(unsigned int max_cpu_core_mhz,
39 preset_lpj = max_cpu_core_mhz * value; 57 preset_lpj = max_cpu_core_mhz * value;
40} 58}
41 59
60void __init shmobile_init_delay(void)
61{
62 struct device_node *np, *parent;
63 u32 max_freq, freq;
64
65 max_freq = 0;
66
67 parent = of_find_node_by_path("/cpus");
68 if (parent) {
69 for_each_child_of_node(parent, np) {
70 if (!of_property_read_u32(np, "clock-frequency", &freq))
71 max_freq = max(max_freq, freq);
72 }
73 of_node_put(parent);
74 }
75
76 if (max_freq) {
77 if (of_find_compatible_node(NULL, NULL, "arm,cortex-a8"))
78 shmobile_setup_delay_hz(max_freq, 1, 3);
79 else if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9"))
80 shmobile_setup_delay_hz(max_freq, 1, 3);
81 else if (of_find_compatible_node(NULL, NULL, "arm,cortex-a15"))
82 if (!IS_ENABLED(CONFIG_ARM_ARCH_TIMER))
83 shmobile_setup_delay_hz(max_freq, 2, 4);
84 }
85}
86
42static void __init shmobile_late_time_init(void) 87static void __init shmobile_late_time_init(void)
43{ 88{
44 /* 89 /*