diff options
author | Phil Edworthy <phil.edworthy@renesas.com> | 2012-08-06 08:31:04 -0400 |
---|---|---|
committer | Simon Horman <horms@verge.net.au> | 2012-09-05 21:49:18 -0400 |
commit | 263510ec774b490dffbd0b8db7b723025cf560c9 (patch) | |
tree | fa1caa3dde3e092a3ac95bf467be360dadf83039 /arch/arm/mach-shmobile | |
parent | 7952717adb69efc1d2443a1858f96d23c2fb93e0 (diff) |
r8a7779: add SDHI clock support
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
Diffstat (limited to 'arch/arm/mach-shmobile')
-rw-r--r-- | arch/arm/mach-shmobile/clock-r8a7779.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c index 339c62c824d5..3cafb6ab5e9a 100644 --- a/arch/arm/mach-shmobile/clock-r8a7779.c +++ b/arch/arm/mach-shmobile/clock-r8a7779.c | |||
@@ -86,11 +86,16 @@ static struct clk div4_clks[DIV4_NR] = { | |||
86 | 0x0300, CLK_ENABLE_ON_INIT), | 86 | 0x0300, CLK_ENABLE_ON_INIT), |
87 | }; | 87 | }; |
88 | 88 | ||
89 | enum { MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021, | 89 | enum { MSTP323, MSTP322, MSTP321, MSTP320, |
90 | MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021, | ||
90 | MSTP016, MSTP015, MSTP014, | 91 | MSTP016, MSTP015, MSTP014, |
91 | MSTP_NR }; | 92 | MSTP_NR }; |
92 | 93 | ||
93 | static struct clk mstp_clks[MSTP_NR] = { | 94 | static struct clk mstp_clks[MSTP_NR] = { |
95 | [MSTP323] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 23, 0), /* SDHI0 */ | ||
96 | [MSTP322] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 22, 0), /* SDHI1 */ | ||
97 | [MSTP321] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 21, 0), /* SDHI2 */ | ||
98 | [MSTP320] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 20, 0), /* SDHI3 */ | ||
94 | [MSTP026] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 26, 0), /* SCIF0 */ | 99 | [MSTP026] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 26, 0), /* SCIF0 */ |
95 | [MSTP025] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 25, 0), /* SCIF1 */ | 100 | [MSTP025] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 25, 0), /* SCIF1 */ |
96 | [MSTP024] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 24, 0), /* SCIF2 */ | 101 | [MSTP024] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 24, 0), /* SCIF2 */ |
@@ -149,6 +154,10 @@ static struct clk_lookup lookups[] = { | |||
149 | CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP023]), /* SCIF3 */ | 154 | CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP023]), /* SCIF3 */ |
150 | CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP022]), /* SCIF4 */ | 155 | CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP022]), /* SCIF4 */ |
151 | CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */ | 156 | CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */ |
157 | CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */ | ||
158 | CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */ | ||
159 | CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */ | ||
160 | CLKDEV_DEV_ID("sh_mobile_sdhi.3", &mstp_clks[MSTP320]), /* SDHI3 */ | ||
152 | }; | 161 | }; |
153 | 162 | ||
154 | void __init r8a7779_clock_init(void) | 163 | void __init r8a7779_clock_init(void) |