aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-shmobile/smp-r8a7791.c
diff options
context:
space:
mode:
authorKevin Hilman <khilman@linaro.org>2013-10-10 18:33:39 -0400
committerKevin Hilman <khilman@linaro.org>2013-10-10 18:34:26 -0400
commit695e6044775daac00bac95901b597540fbf3108e (patch)
treefa71121d1602eb6ab13b646118bdfdaf6d9dbdba /arch/arm/mach-shmobile/smp-r8a7791.c
parenteea4fba5b3e33df88704691e02799305e3b91de1 (diff)
parent687c27b07050c21a62c4c975777c89e698649a6b (diff)
Merge tag 'renesas-soc2-for-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
From Simon Horman: Second Round of Renesas ARM based SoC updates for v3.13 * SMP support for r8a7791 SoC * r8a7779_init_irq_extpin() for DT for r8a7779 and r8a7778 SoCs * Add HPB-DMAC to r8a7779 and r8a7778 SoCs * Add r7s72100 SoC * Make use of ARCH timer workaround on r8a7791 SoC * Add IRQC platform device support to r8a7791 SoC * Add I2C clocks and aliases for the DT mode for r8a7790 SoC * Add MAC platform device to r8a73a4 SoC * tag 'renesas-soc2-for-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: r8a7791 SMP support ARM: shmobile: r8a7779: split r8a7779_init_irq_extpin() for DT ARM: shmobile: r8a7778: split r8a7778_init_irq_extpin() for DT ARM: shmobile: r7s72100 SCIF support ARM: shmobile: Initial r7s72100 SoC support ARM: shmobile: r8a7791 Arch timer workaround ARM: shmobile: r8a7791 IRQC platform device support ARM: shmobile: Introduce r8a7791_add_standard_devices() ARM: shmobile: Break out R-Car Gen2 setup code ARM: shmobile: r8a73a4: add a clock alias for the DMAC in DT mode ARM: shmobile: r8a7790: add I2C clocks and aliases for the DT mode ARM: shmobile: r8a7779: add HPB-DMAC support ARM: shmobile: r8a7778: add HPB-DMAC support ARM: shmobile: r8a73a4: add a DMAC platform device and clock for it ARM: shmobile: Remove #gpio-ranges-cells DT property gpio: rcar: Remove #gpio-range-cells DT property usage ARM: shmobile: armadillo: fixup ether pinctrl naming ARM: shmobile: Lager: add Micrel KSZ8041 PHY fixup ARM: shmobile: update SDHI DT compatibility string to the <unit>-<soc> format Signed-off-by: Kevin Hilman <khilman@linaro.org>
Diffstat (limited to 'arch/arm/mach-shmobile/smp-r8a7791.c')
-rw-r--r--arch/arm/mach-shmobile/smp-r8a7791.c62
1 files changed, 62 insertions, 0 deletions
diff --git a/arch/arm/mach-shmobile/smp-r8a7791.c b/arch/arm/mach-shmobile/smp-r8a7791.c
new file mode 100644
index 000000000000..2df5bd190fe4
--- /dev/null
+++ b/arch/arm/mach-shmobile/smp-r8a7791.c
@@ -0,0 +1,62 @@
1/*
2 * SMP support for r8a7791
3 *
4 * Copyright (C) 2013 Renesas Solutions Corp.
5 * Copyright (C) 2013 Magnus Damm
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/smp.h>
19#include <linux/io.h>
20#include <asm/smp_plat.h>
21#include <mach/common.h>
22#include <mach/r8a7791.h>
23
24#define RST 0xe6160000
25#define CA15BAR 0x0020
26#define CA15RESCNT 0x0040
27#define RAM 0xe6300000
28
29static void __init r8a7791_smp_prepare_cpus(unsigned int max_cpus)
30{
31 void __iomem *p;
32 u32 bar;
33
34 /* let APMU code install data related to shmobile_boot_vector */
35 shmobile_smp_apmu_prepare_cpus(max_cpus);
36
37 /* RAM for jump stub, because BAR requires 256KB aligned address */
38 p = ioremap_nocache(RAM, shmobile_boot_size);
39 memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
40 iounmap(p);
41
42 /* setup reset vectors */
43 p = ioremap_nocache(RST, 0x63);
44 bar = (RAM >> 8) & 0xfffffc00;
45 writel_relaxed(bar, p + CA15BAR);
46 writel_relaxed(bar | 0x10, p + CA15BAR);
47
48 /* enable clocks to all CPUs */
49 writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 0xa5a50000,
50 p + CA15RESCNT);
51 iounmap(p);
52}
53
54struct smp_operations r8a7791_smp_ops __initdata = {
55 .smp_prepare_cpus = r8a7791_smp_prepare_cpus,
56 .smp_boot_secondary = shmobile_smp_apmu_boot_secondary,
57#ifdef CONFIG_HOTPLUG_CPU
58 .cpu_disable = shmobile_smp_cpu_disable,
59 .cpu_die = shmobile_smp_apmu_cpu_die,
60 .cpu_kill = shmobile_smp_apmu_cpu_kill,
61#endif
62};