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authorMagnus Damm <damm@opensource.se>2014-01-15 02:43:08 -0500
committerSimon Horman <horms+renesas@verge.net.au>2014-02-23 18:55:46 -0500
commita6557eb795edcf7832b5278a11842c4ca302f4af (patch)
treef46f65b333815c8fe013575496bb229b57161668 /arch/arm/mach-shmobile/pm-rcar.c
parent4a51856b42672cfcb7d6fbab22dcf2caba2be5ab (diff)
ARM: shmobile: Break out R-Car SYSC PM code
Break out the R-Car SYSC power management code from the r8a7779 SoC code. With this new shared R-Car SYSC code base it is possible to hook in Generation 2 SoCs as well. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/mach-shmobile/pm-rcar.c')
-rw-r--r--arch/arm/mach-shmobile/pm-rcar.c142
1 files changed, 142 insertions, 0 deletions
diff --git a/arch/arm/mach-shmobile/pm-rcar.c b/arch/arm/mach-shmobile/pm-rcar.c
new file mode 100644
index 000000000000..17225db09558
--- /dev/null
+++ b/arch/arm/mach-shmobile/pm-rcar.c
@@ -0,0 +1,142 @@
1/*
2 * R-Car SYSC Power management support
3 *
4 * Copyright (C) 2014 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/delay.h>
12#include <linux/err.h>
13#include <linux/mm.h>
14#include <linux/spinlock.h>
15#include <asm/io.h>
16#include <mach/pm-rcar.h>
17
18static void __iomem *rcar_sysc_base;
19
20/* SYSC */
21#define SYSCSR 0x00
22#define SYSCISR 0x04
23#define SYSCISCR 0x08
24
25#define PWRSR_OFFS 0x00
26#define PWROFFCR_OFFS 0x04
27#define PWRONCR_OFFS 0x0c
28#define PWRER_OFFS 0x14
29
30#define SYSCSR_RETRIES 100
31#define SYSCSR_DELAY_US 1
32
33#define SYSCISR_RETRIES 1000
34#define SYSCISR_DELAY_US 1
35
36#if defined(CONFIG_PM) || defined(CONFIG_SMP)
37
38static DEFINE_SPINLOCK(rcar_sysc_lock); /* SMP CPUs + I/O devices */
39
40static int rcar_sysc_pwr_on_off(struct rcar_sysc_ch *sysc_ch,
41 int sr_bit, int reg_offs)
42{
43 int k;
44
45 for (k = 0; k < SYSCSR_RETRIES; k++) {
46 if (ioread32(rcar_sysc_base + SYSCSR) & (1 << sr_bit))
47 break;
48 udelay(SYSCSR_DELAY_US);
49 }
50
51 if (k == SYSCSR_RETRIES)
52 return -EAGAIN;
53
54 iowrite32(1 << sysc_ch->chan_bit,
55 rcar_sysc_base + sysc_ch->chan_offs + reg_offs);
56
57 return 0;
58}
59
60static int rcar_sysc_pwr_off(struct rcar_sysc_ch *sysc_ch)
61{
62 return rcar_sysc_pwr_on_off(sysc_ch, 0, PWROFFCR_OFFS);
63}
64
65static int rcar_sysc_pwr_on(struct rcar_sysc_ch *sysc_ch)
66{
67 return rcar_sysc_pwr_on_off(sysc_ch, 1, PWRONCR_OFFS);
68}
69
70static int rcar_sysc_update(struct rcar_sysc_ch *sysc_ch,
71 int (*on_off_fn)(struct rcar_sysc_ch *))
72{
73 unsigned int isr_mask = 1 << sysc_ch->isr_bit;
74 unsigned int chan_mask = 1 << sysc_ch->chan_bit;
75 unsigned int status;
76 unsigned long flags;
77 int ret = 0;
78 int k;
79
80 spin_lock_irqsave(&rcar_sysc_lock, flags);
81
82 iowrite32(isr_mask, rcar_sysc_base + SYSCISCR);
83
84 do {
85 ret = on_off_fn(sysc_ch);
86 if (ret)
87 goto out;
88
89 status = ioread32(rcar_sysc_base +
90 sysc_ch->chan_offs + PWRER_OFFS);
91 } while (status & chan_mask);
92
93 for (k = 0; k < SYSCISR_RETRIES; k++) {
94 if (ioread32(rcar_sysc_base + SYSCISR) & isr_mask)
95 break;
96 udelay(SYSCISR_DELAY_US);
97 }
98
99 if (k == SYSCISR_RETRIES)
100 ret = -EIO;
101
102 iowrite32(isr_mask, rcar_sysc_base + SYSCISCR);
103
104 out:
105 spin_unlock_irqrestore(&rcar_sysc_lock, flags);
106
107 pr_debug("sysc power domain %d: %08x -> %d\n",
108 sysc_ch->isr_bit, ioread32(rcar_sysc_base + SYSCISR), ret);
109 return ret;
110}
111
112int rcar_sysc_power_down(struct rcar_sysc_ch *sysc_ch)
113{
114 return rcar_sysc_update(sysc_ch, rcar_sysc_pwr_off);
115}
116
117int rcar_sysc_power_up(struct rcar_sysc_ch *sysc_ch)
118{
119 return rcar_sysc_update(sysc_ch, rcar_sysc_pwr_on);
120}
121
122bool rcar_sysc_power_is_off(struct rcar_sysc_ch *sysc_ch)
123{
124 unsigned int st;
125
126 st = ioread32(rcar_sysc_base + sysc_ch->chan_offs + PWRSR_OFFS);
127 if (st & (1 << sysc_ch->chan_bit))
128 return true;
129
130 return false;
131}
132
133void __iomem *rcar_sysc_init(phys_addr_t base)
134{
135 rcar_sysc_base = ioremap_nocache(base, PAGE_SIZE);
136 if (!rcar_sysc_base)
137 panic("unable to ioremap R-Car SYSC hardware block\n");
138
139 return rcar_sysc_base;
140}
141
142#endif /* CONFIG_PM || CONFIG_SMP */