diff options
author | Valentine Barshak <valentine.barshak@cogentembedded.com> | 2013-12-27 06:27:38 -0500 |
---|---|---|
committer | Simon Horman <horms+renesas@verge.net.au> | 2014-02-03 20:22:52 -0500 |
commit | 106c0e8fa3a2f7a40d25583e193e34af3861564d (patch) | |
tree | b69fb0b62a2bbc9d7725027e651bb7af9ab5d595 /arch/arm/mach-shmobile/clock-r8a7791.c | |
parent | cb9ec3adf882688831cdc9e7b84bb388f215f8ce (diff) |
ARM: shmobile: r8a7791: Add I2C clocks
This adds I2C[0-5] clock support to R8A7791 SoC.
Changes in V2:
* Capitalized ARM in the subject.
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/mach-shmobile/clock-r8a7791.c')
-rw-r--r-- | arch/arm/mach-shmobile/clock-r8a7791.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c index f5461262ee25..fe4a774b6211 100644 --- a/arch/arm/mach-shmobile/clock-r8a7791.c +++ b/arch/arm/mach-shmobile/clock-r8a7791.c | |||
@@ -122,6 +122,7 @@ static struct clk *main_clks[] = { | |||
122 | 122 | ||
123 | /* MSTP */ | 123 | /* MSTP */ |
124 | enum { | 124 | enum { |
125 | MSTP931, MSTP930, MSTP929, MSTP928, MSTP927, MSTP925, | ||
125 | MSTP813, | 126 | MSTP813, |
126 | MSTP726, MSTP724, MSTP723, MSTP721, MSTP720, | 127 | MSTP726, MSTP724, MSTP723, MSTP721, MSTP720, |
127 | MSTP719, MSTP718, MSTP715, MSTP714, | 128 | MSTP719, MSTP718, MSTP715, MSTP714, |
@@ -133,6 +134,12 @@ enum { | |||
133 | }; | 134 | }; |
134 | 135 | ||
135 | static struct clk mstp_clks[MSTP_NR] = { | 136 | static struct clk mstp_clks[MSTP_NR] = { |
137 | [MSTP931] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 31, 0), /* I2C0 */ | ||
138 | [MSTP930] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 30, 0), /* I2C1 */ | ||
139 | [MSTP929] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 29, 0), /* I2C2 */ | ||
140 | [MSTP928] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 28, 0), /* I2C3 */ | ||
141 | [MSTP927] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 27, 0), /* I2C4 */ | ||
142 | [MSTP925] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 25, 0), /* I2C5 */ | ||
136 | [MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */ | 143 | [MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */ |
137 | [MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */ | 144 | [MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */ |
138 | [MSTP724] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 24, 0), /* DU0 */ | 145 | [MSTP724] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 24, 0), /* DU0 */ |
@@ -194,6 +201,12 @@ static struct clk_lookup lookups[] = { | |||
194 | CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]), | 201 | CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]), |
195 | CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]), | 202 | CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]), |
196 | CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]), | 203 | CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]), |
204 | CLKDEV_DEV_ID("i2c-rcar_gen2.0", &mstp_clks[MSTP931]), | ||
205 | CLKDEV_DEV_ID("i2c-rcar_gen2.1", &mstp_clks[MSTP930]), | ||
206 | CLKDEV_DEV_ID("i2c-rcar_gen2.2", &mstp_clks[MSTP929]), | ||
207 | CLKDEV_DEV_ID("i2c-rcar_gen2.3", &mstp_clks[MSTP928]), | ||
208 | CLKDEV_DEV_ID("i2c-rcar_gen2.4", &mstp_clks[MSTP927]), | ||
209 | CLKDEV_DEV_ID("i2c-rcar_gen2.5", &mstp_clks[MSTP925]), | ||
197 | CLKDEV_DEV_ID("r8a7791-ether", &mstp_clks[MSTP813]), /* Ether */ | 210 | CLKDEV_DEV_ID("r8a7791-ether", &mstp_clks[MSTP813]), /* Ether */ |
198 | }; | 211 | }; |
199 | 212 | ||