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authorGuennadi Liakhovetski <g.liakhovetski@gmx.de>2013-09-26 13:20:57 -0400
committerSimon Horman <horms+renesas@verge.net.au>2013-10-07 20:44:42 -0400
commit911a644cfa03d834220621f22bb4a4d41dfe27d4 (patch)
tree51d1c6851411efe0094b4fa91ff7f954abc87ef6 /arch/arm/mach-shmobile/clock-r8a7790.c
parent441f750236f3d3d435a1e89ad885ec896832b9c6 (diff)
ARM: shmobile: r8a7790: add I2C clocks and aliases for the DT mode
This patch adds clock definitions for the 4 I2C interfaces on r8a7790 and clock aliases, suitable for the DT mode. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/mach-shmobile/clock-r8a7790.c')
-rw-r--r--arch/arm/mach-shmobile/clock-r8a7790.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
index d99b87bc76ea..7661e898f376 100644
--- a/arch/arm/mach-shmobile/clock-r8a7790.c
+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
@@ -52,6 +52,7 @@
52#define SMSTPCR5 0xe6150144 52#define SMSTPCR5 0xe6150144
53#define SMSTPCR7 0xe615014c 53#define SMSTPCR7 0xe615014c
54#define SMSTPCR8 0xe6150990 54#define SMSTPCR8 0xe6150990
55#define SMSTPCR9 0xe6150994
55 56
56#define SDCKCR 0xE6150074 57#define SDCKCR 0xE6150074
57#define SD2CKCR 0xE6150078 58#define SD2CKCR 0xE6150078
@@ -181,6 +182,7 @@ static struct clk div6_clks[DIV6_NR] = {
181 182
182/* MSTP */ 183/* MSTP */
183enum { 184enum {
185 MSTP931, MSTP930, MSTP929, MSTP928,
184 MSTP813, 186 MSTP813,
185 MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720, 187 MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720,
186 MSTP717, MSTP716, 188 MSTP717, MSTP716,
@@ -192,6 +194,10 @@ enum {
192}; 194};
193 195
194static struct clk mstp_clks[MSTP_NR] = { 196static struct clk mstp_clks[MSTP_NR] = {
197 [MSTP931] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 31, 0), /* I2C0 */
198 [MSTP930] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 30, 0), /* I2C1 */
199 [MSTP929] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 29, 0), /* I2C2 */
200 [MSTP928] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 28, 0), /* I2C3 */
195 [MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */ 201 [MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
196 [MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */ 202 [MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */
197 [MSTP725] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 25, 0), /* LVDS1 */ 203 [MSTP725] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 25, 0), /* LVDS1 */
@@ -271,6 +277,10 @@ static struct clk_lookup lookups[] = {
271 CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP720]), 277 CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP720]),
272 CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP717]), 278 CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP717]),
273 CLKDEV_DEV_ID("sh-sci.9", &mstp_clks[MSTP716]), 279 CLKDEV_DEV_ID("sh-sci.9", &mstp_clks[MSTP716]),
280 CLKDEV_DEV_ID("e6508000.i2c", &mstp_clks[MSTP931]),
281 CLKDEV_DEV_ID("e6518000.i2c", &mstp_clks[MSTP930]),
282 CLKDEV_DEV_ID("e6530000.i2c", &mstp_clks[MSTP929]),
283 CLKDEV_DEV_ID("e6540000.i2c", &mstp_clks[MSTP928]),
274 CLKDEV_DEV_ID("r8a7790-ether", &mstp_clks[MSTP813]), 284 CLKDEV_DEV_ID("r8a7790-ether", &mstp_clks[MSTP813]),
275 CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]), 285 CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
276 CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]), 286 CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]),