diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-12-04 11:13:29 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-12-14 14:21:42 -0500 |
commit | ff2e27ae0b17f53a6a289c87d325f706598f3788 (patch) | |
tree | 1288f491bce11b3d8a6d48604fd00d68bea6eb98 /arch/arm/mach-s5pv310 | |
parent | 384895330e0f3954d9478fd0853145f9c169df12 (diff) |
ARM: GIC: consolidate gic_cpu_base_addr to common GIC code
Every architecture using the GIC has a gic_cpu_base_addr pointer for
GIC 0 for their entry assembly code to use to decode the cause of the
current interrupt. Move this into the common GIC code.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-s5pv310')
-rw-r--r-- | arch/arm/mach-s5pv310/cpu.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-s5pv310/include/mach/smp.h | 2 |
2 files changed, 0 insertions, 5 deletions
diff --git a/arch/arm/mach-s5pv310/cpu.c b/arch/arm/mach-s5pv310/cpu.c index bce3e91be432..72ab289e7816 100644 --- a/arch/arm/mach-s5pv310/cpu.c +++ b/arch/arm/mach-s5pv310/cpu.c | |||
@@ -24,8 +24,6 @@ | |||
24 | 24 | ||
25 | #include <mach/regs-irq.h> | 25 | #include <mach/regs-irq.h> |
26 | 26 | ||
27 | void __iomem *gic_cpu_base_addr; | ||
28 | |||
29 | extern int combiner_init(unsigned int combiner_nr, void __iomem *base, | 27 | extern int combiner_init(unsigned int combiner_nr, void __iomem *base, |
30 | unsigned int irq_start); | 28 | unsigned int irq_start); |
31 | extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq); | 29 | extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq); |
@@ -122,7 +120,6 @@ void __init s5pv310_init_irq(void) | |||
122 | { | 120 | { |
123 | int irq; | 121 | int irq; |
124 | 122 | ||
125 | gic_cpu_base_addr = S5P_VA_GIC_CPU; | ||
126 | gic_init(0, IRQ_LOCALTIMER, S5P_VA_GIC_DIST, S5P_VA_GIC_CPU); | 123 | gic_init(0, IRQ_LOCALTIMER, S5P_VA_GIC_DIST, S5P_VA_GIC_CPU); |
127 | 124 | ||
128 | for (irq = 0; irq < MAX_COMBINER_NR; irq++) { | 125 | for (irq = 0; irq < MAX_COMBINER_NR; irq++) { |
diff --git a/arch/arm/mach-s5pv310/include/mach/smp.h b/arch/arm/mach-s5pv310/include/mach/smp.h index b7ec252384f4..e1cc6a251c6a 100644 --- a/arch/arm/mach-s5pv310/include/mach/smp.h +++ b/arch/arm/mach-s5pv310/include/mach/smp.h | |||
@@ -9,8 +9,6 @@ | |||
9 | #include <asm/hardware/gic.h> | 9 | #include <asm/hardware/gic.h> |
10 | #include <asm/smp_mpidr.h> | 10 | #include <asm/smp_mpidr.h> |
11 | 11 | ||
12 | extern void __iomem *gic_cpu_base_addr; | ||
13 | |||
14 | /* | 12 | /* |
15 | * We use IRQ1 as the IPI | 13 | * We use IRQ1 as the IPI |
16 | */ | 14 | */ |