ARM: S5P: add support for tv device

This patch adds all the resources for TV drivers and devices for Samsung
Exynos4 and S5PV210 platforms.

Signed-off-by: Tomasz Stanislawski <t.stanislaws@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[m.szyprowski: squashed Exynos4 and S5PV210 patches and rewrote commit message]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

5 files changed, 137 insertions, 13 deletions

diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
index 60cf8226de8b..4c5ac7a69e9e 100644
--- a/arch/arm/mach-s5pv210/clock.c
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -174,6 +174,16 @@ static int s5pv210_clk_mask1_ctrl(struct clk *clk, int enable)
         return s5p_gatectrl(S5P_CLK_SRC_MASK1, clk, enable);
 }
 
+static int exynos4_clk_hdmiphy_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(S5P_HDMI_PHY_CONTROL, clk, enable);
+}
+
+static int exynos4_clk_dac_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(S5P_DAC_PHY_CONTROL, clk, enable);
+}
+
 static struct clk clk_sclk_hdmi27m = {
         .name           = "sclk_hdmi27m",
         .rate           = 27000000,
@@ -335,6 +345,40 @@ static struct clk init_clocks_off[] = {
                 .enable         = s5pv210_clk_ip0_ctrl,
                 .ctrlbit        = (1 << 16),
         }, {
+                .name           = "dac",
+                .devname        = "s5p-sdo",
+                .parent         = &clk_hclk_dsys.clk,
+                .enable         = s5pv210_clk_ip1_ctrl,
+                .ctrlbit        = (1 << 10),
+        }, {
+                .name           = "mixer",
+                .devname        = "s5p-mixer",
+                .parent         = &clk_hclk_dsys.clk,
+                .enable         = s5pv210_clk_ip1_ctrl,
+                .ctrlbit        = (1 << 9),
+        }, {
+                .name           = "vp",
+                .devname        = "s5p-mixer",
+                .parent         = &clk_hclk_dsys.clk,
+                .enable         = s5pv210_clk_ip1_ctrl,
+                .ctrlbit        = (1 << 8),
+        }, {
+                .name           = "hdmi",
+                .devname        = "s5pv210-hdmi",
+                .parent         = &clk_hclk_dsys.clk,
+                .enable         = s5pv210_clk_ip1_ctrl,
+                .ctrlbit        = (1 << 11),
+        }, {
+                .name           = "hdmiphy",
+                .devname        = "s5pv210-hdmi",
+                .enable         = exynos4_clk_hdmiphy_ctrl,
+                .ctrlbit        = (1 << 0),
+        }, {
+                .name           = "dacphy",
+                .devname        = "s5p-sdo",
+                .enable         = exynos4_clk_dac_ctrl,
+                .ctrlbit        = (1 << 0),
+        }, {
                 .name           = "otg",
                 .parent         = &clk_hclk_psys.clk,
                 .enable         = s5pv210_clk_ip1_ctrl,
@@ -605,6 +649,23 @@ static struct clksrc_sources clkset_sclk_mixer = {
         .nr_sources     = ARRAY_SIZE(clkset_sclk_mixer_list),
 };
 
+static struct clksrc_clk clk_sclk_mixer = {
+        .clk            = {
+                .name           = "sclk_mixer",
+                .enable         = s5pv210_clk_mask0_ctrl,
+                .ctrlbit        = (1 << 1),
+        },
+        .sources = &clkset_sclk_mixer,
+        .reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 1 },
+};
+
+static struct clksrc_clk *sclk_tv[] = {
+        &clk_sclk_dac,
+        &clk_sclk_pixel,
+        &clk_sclk_hdmi,
+        &clk_sclk_mixer,
+};
+
 static struct clk *clkset_sclk_audio0_list[] = {
         [0] = &clk_ext_xtal_mux,
         [1] = &clk_pcmcdclk0,
@@ -788,14 +849,6 @@ static struct clksrc_clk clksrcs[] = {
                 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 28, .size = 4 },
         }, {
                 .clk    = {
-                        .name           = "sclk_mixer",
-                        .enable         = s5pv210_clk_mask0_ctrl,
-                        .ctrlbit        = (1 << 1),
-                },
-                .sources = &clkset_sclk_mixer,
-                .reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 1 },
-        }, {
-                .clk    = {
                         .name           = "sclk_fimc",
                         .devname        = "s5pv210-fimc.0",
                         .enable         = s5pv210_clk_mask1_ctrl,
@@ -984,9 +1037,6 @@ static struct clksrc_clk *sysclks[] = {
         &clk_pclk_psys,
         &clk_vpllsrc,
         &clk_sclk_vpll,
-        &clk_sclk_dac,
-        &clk_sclk_pixel,
-        &clk_sclk_hdmi,
         &clk_mout_dmc0,
         &clk_sclk_dmc0,
         &clk_sclk_audio0,
@@ -1071,6 +1121,61 @@ static struct clk_ops s5pv210_epll_ops = {
         .get_rate = s5p_epll_get_rate,
 };
 
+static u32 vpll_div[][5] = {
+        {  54000000, 3, 53, 3, 0 },
+        { 108000000, 3, 53, 2, 0 },
+};
+
+static unsigned long s5pv210_vpll_get_rate(struct clk *clk)
+{
+        return clk->rate;
+}
+
+static int s5pv210_vpll_set_rate(struct clk *clk, unsigned long rate)
+{
+        unsigned int vpll_con;
+        unsigned int i;
+
+        /* Return if nothing changed */
+        if (clk->rate == rate)
+                return 0;
+
+        vpll_con = __raw_readl(S5P_VPLL_CON);
+        vpll_con &= ~(0x1 << 27 |                                       \
+                        PLL90XX_MDIV_MASK << PLL90XX_MDIV_SHIFT |       \
+                        PLL90XX_PDIV_MASK << PLL90XX_PDIV_SHIFT |       \
+                        PLL90XX_SDIV_MASK << PLL90XX_SDIV_SHIFT);
+
+        for (i = 0; i < ARRAY_SIZE(vpll_div); i++) {
+                if (vpll_div[i][0] == rate) {
+                        vpll_con |= vpll_div[i][1] << PLL90XX_PDIV_SHIFT;
+                        vpll_con |= vpll_div[i][2] << PLL90XX_MDIV_SHIFT;
+                        vpll_con |= vpll_div[i][3] << PLL90XX_SDIV_SHIFT;
+                        vpll_con |= vpll_div[i][4] << 27;
+                        break;
+                }
+        }
+
+        if (i == ARRAY_SIZE(vpll_div)) {
+                printk(KERN_ERR "%s: Invalid Clock VPLL Frequency\n",
+                                __func__);
+                return -EINVAL;
+        }
+
+        __raw_writel(vpll_con, S5P_VPLL_CON);
+
+        /* Wait for VPLL lock */
+        while (!(__raw_readl(S5P_VPLL_CON) & (1 << PLL90XX_LOCKED_SHIFT)))
+                continue;
+
+        clk->rate = rate;
+        return 0;
+}
+static struct clk_ops s5pv210_vpll_ops = {
+        .get_rate = s5pv210_vpll_get_rate,
+        .set_rate = s5pv210_vpll_set_rate,
+};
+
 void __init_or_cpufreq s5pv210_setup_clocks(void)
 {
         struct clk *xtal_clk;
@@ -1119,6 +1224,7 @@ void __init_or_cpufreq s5pv210_setup_clocks(void)
         clk_fout_apll.ops = &clk_fout_apll_ops;
         clk_fout_mpll.rate = mpll;
         clk_fout_epll.rate = epll;
+        clk_fout_vpll.ops = &s5pv210_vpll_ops;
         clk_fout_vpll.rate = vpll;
 
         printk(KERN_INFO "S5PV210: PLL settings, A=%ld, M=%ld, E=%ld V=%ld",
@@ -1164,6 +1270,9 @@ void __init s5pv210_register_clocks(void)
         for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
                 s3c_register_clksrc(sysclks[ptr], 1);
 
+        for (ptr = 0; ptr < ARRAY_SIZE(sclk_tv); ptr++)
+                s3c_register_clksrc(sclk_tv[ptr], 1);
+
         s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
         s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
 
diff --git a/arch/arm/mach-s5pv210/cpu.c b/arch/arm/mach-s5pv210/cpu.c
index 79907ec78d43..6b8cdccbe931 100644
--- a/arch/arm/mach-s5pv210/cpu.c
+++ b/arch/arm/mach-s5pv210/cpu.c
@@ -41,6 +41,7 @@
 #include <plat/keypad-core.h>
 #include <plat/sdhci.h>
 #include <plat/reset.h>
+#include <plat/tv-core.h>
 
 /* Initial IO mappings */
 
@@ -143,6 +144,9 @@ void __init s5pv210_map_io(void)
 
         /* Use s5pv210-keypad instead of samsung-keypad */
         samsung_keypad_setname("s5pv210-keypad");
+
+        /* setup TV devices */
+        s5p_hdmi_setname("s5pv210-hdmi");
 }
 
 void __init s5pv210_init_clocks(int xtal)
diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h
index c1da0a7fb184..5e0de3a31f3d 100644
--- a/arch/arm/mach-s5pv210/include/mach/irqs.h
+++ b/arch/arm/mach-s5pv210/include/mach/irqs.h
@@ -86,7 +86,7 @@
 #define IRQ_HDMI                S5P_IRQ_VIC2(12)
 #define IRQ_IIC1                S5P_IRQ_VIC2(13)
 #define IRQ_MFC                 S5P_IRQ_VIC2(14)
-#define IRQ_TVENC               S5P_IRQ_VIC2(15)
+#define IRQ_SDO                 S5P_IRQ_VIC2(15)
 #define IRQ_I2S0                S5P_IRQ_VIC2(16)
 #define IRQ_I2S1                S5P_IRQ_VIC2(17)
 #define IRQ_I2S2                S5P_IRQ_VIC2(18)
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h
index a420654c2c73..7ff609f1568b 100644
--- a/arch/arm/mach-s5pv210/include/mach/map.h
+++ b/arch/arm/mach-s5pv210/include/mach/map.h
@@ -90,6 +90,10 @@
 #define S5PV210_PA_FIMC1                0xFB300000
 #define S5PV210_PA_FIMC2                0xFB400000
 
+#define S5PV210_PA_SDO                  0xF9000000
+#define S5PV210_PA_VP                   0xF9100000
+#define S5PV210_PA_MIXER                0xF9200000
+#define S5PV210_PA_HDMI                 0xFA100000
 #define S5PV210_PA_IIC_HDMIPHY          0xFA900000
 
 /* Compatibiltiy Defines */
@@ -113,6 +117,12 @@
 #define S5P_PA_MIPI_CSIS0               S5PV210_PA_MIPI_CSIS
 #define S5P_PA_MFC                      S5PV210_PA_MFC
 #define S5P_PA_IIC_HDMIPHY              S5PV210_PA_IIC_HDMIPHY
+
+#define S5P_PA_SDO                      S5PV210_PA_SDO
+#define S5P_PA_VP                       S5PV210_PA_VP
+#define S5P_PA_MIXER                    S5PV210_PA_MIXER
+#define S5P_PA_HDMI                     S5PV210_PA_HDMI
+
 #define S5P_PA_ONENAND                  S5PC110_PA_ONENAND
 #define S5P_PA_ONENAND_DMA              S5PC110_PA_ONENAND_DMA
 #define S5P_PA_SDRAM                    S5PV210_PA_SDRAM
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/arch/arm/mach-s5pv210/include/mach/regs-clock.h
index 78925c516346..032de66fb8be 100644
--- a/arch/arm/mach-s5pv210/include/mach/regs-clock.h
+++ b/arch/arm/mach-s5pv210/include/mach/regs-clock.h
@@ -144,8 +144,9 @@
 
 #define S5P_OTHERS              S5P_CLKREG(0xE000)
 #define S5P_OM_STAT             S5P_CLKREG(0xE100)
+#define S5P_HDMI_PHY_CONTROL    S5P_CLKREG(0xE804)
 #define S5P_USB_PHY_CONTROL     S5P_CLKREG(0xE80C)
-#define S5P_DAC_CONTROL         S5P_CLKREG(0xE810)
+#define S5P_DAC_PHY_CONTROL     S5P_CLKREG(0xE810)
 #define S5P_MIPI_DPHY_CONTROL(x) S5P_CLKREG(0xE814)
 #define S5P_MIPI_DPHY_ENABLE    (1 << 0)
 #define S5P_MIPI_DPHY_SRESETN   (1 << 1)