diff options
author | Sylwester Nawrocki <s.nawrocki@samsung.com> | 2010-12-17 01:08:00 -0500 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2010-12-29 19:37:49 -0500 |
commit | 5905bbfa5b47f14c9df5c23edf1ec805ceb0d6fe (patch) | |
tree | 718062ceaf9a26b8f57afba1851046450d205e37 /arch/arm/mach-s5pv210 | |
parent | 9b580cdb1c0294df2a2cfa845f11d65ee53e27ca (diff) |
ARM: S5PV210: Add resource definitions for MIPI CSIS
Naming changed for consistency with s5pv310 where there are two instances
of the device.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s5pv210')
-rw-r--r-- | arch/arm/mach-s5pv210/include/mach/irqs.h | 3 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/include/mach/map.h | 3 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/include/mach/regs-clock.h | 5 |
3 files changed, 6 insertions, 5 deletions
diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h index 119b95fdc3ce..26710b35ef87 100644 --- a/arch/arm/mach-s5pv210/include/mach/irqs.h +++ b/arch/arm/mach-s5pv210/include/mach/irqs.h | |||
@@ -65,7 +65,7 @@ | |||
65 | #define IRQ_HSMMC0 S5P_IRQ_VIC1(26) | 65 | #define IRQ_HSMMC0 S5P_IRQ_VIC1(26) |
66 | #define IRQ_HSMMC1 S5P_IRQ_VIC1(27) | 66 | #define IRQ_HSMMC1 S5P_IRQ_VIC1(27) |
67 | #define IRQ_HSMMC2 S5P_IRQ_VIC1(28) | 67 | #define IRQ_HSMMC2 S5P_IRQ_VIC1(28) |
68 | #define IRQ_MIPICSI S5P_IRQ_VIC1(29) | 68 | #define IRQ_MIPI_CSIS S5P_IRQ_VIC1(29) |
69 | #define IRQ_MIPIDSI S5P_IRQ_VIC1(30) | 69 | #define IRQ_MIPIDSI S5P_IRQ_VIC1(30) |
70 | #define IRQ_ONENAND_AUDI S5P_IRQ_VIC1(31) | 70 | #define IRQ_ONENAND_AUDI S5P_IRQ_VIC1(31) |
71 | 71 | ||
@@ -132,5 +132,6 @@ | |||
132 | #define IRQ_LCD_FIFO IRQ_LCD0 | 132 | #define IRQ_LCD_FIFO IRQ_LCD0 |
133 | #define IRQ_LCD_VSYNC IRQ_LCD1 | 133 | #define IRQ_LCD_VSYNC IRQ_LCD1 |
134 | #define IRQ_LCD_SYSTEM IRQ_LCD2 | 134 | #define IRQ_LCD_SYSTEM IRQ_LCD2 |
135 | #define IRQ_MIPI_CSIS0 IRQ_MIPI_CSIS | ||
135 | 136 | ||
136 | #endif /* ASM_ARCH_IRQS_H */ | 137 | #endif /* ASM_ARCH_IRQS_H */ |
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h index b2e0a62023ed..3611492ad681 100644 --- a/arch/arm/mach-s5pv210/include/mach/map.h +++ b/arch/arm/mach-s5pv210/include/mach/map.h | |||
@@ -110,6 +110,8 @@ | |||
110 | #define S5PV210_PA_DMC0 (0xF0000000) | 110 | #define S5PV210_PA_DMC0 (0xF0000000) |
111 | #define S5PV210_PA_DMC1 (0xF1400000) | 111 | #define S5PV210_PA_DMC1 (0xF1400000) |
112 | 112 | ||
113 | #define S5PV210_PA_MIPI_CSIS 0xFA600000 | ||
114 | |||
113 | /* compatibiltiy defines. */ | 115 | /* compatibiltiy defines. */ |
114 | #define S3C_PA_UART S5PV210_PA_UART | 116 | #define S3C_PA_UART S5PV210_PA_UART |
115 | #define S3C_PA_HSMMC0 S5PV210_PA_HSMMC(0) | 117 | #define S3C_PA_HSMMC0 S5PV210_PA_HSMMC(0) |
@@ -126,6 +128,7 @@ | |||
126 | #define S5P_PA_FIMC0 S5PV210_PA_FIMC0 | 128 | #define S5P_PA_FIMC0 S5PV210_PA_FIMC0 |
127 | #define S5P_PA_FIMC1 S5PV210_PA_FIMC1 | 129 | #define S5P_PA_FIMC1 S5PV210_PA_FIMC1 |
128 | #define S5P_PA_FIMC2 S5PV210_PA_FIMC2 | 130 | #define S5P_PA_FIMC2 S5PV210_PA_FIMC2 |
131 | #define S5P_PA_MIPI_CSIS0 S5PV210_PA_MIPI_CSIS | ||
129 | 132 | ||
130 | #define SAMSUNG_PA_ADC S5PV210_PA_ADC | 133 | #define SAMSUNG_PA_ADC S5PV210_PA_ADC |
131 | #define SAMSUNG_PA_CFCON S5PV210_PA_CFCON | 134 | #define SAMSUNG_PA_CFCON S5PV210_PA_CFCON |
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/arch/arm/mach-s5pv210/include/mach/regs-clock.h index ebaabe021af9..4c45b74def5f 100644 --- a/arch/arm/mach-s5pv210/include/mach/regs-clock.h +++ b/arch/arm/mach-s5pv210/include/mach/regs-clock.h | |||
@@ -161,7 +161,7 @@ | |||
161 | #define S5P_MDNIE_SEL S5P_CLKREG(0x7008) | 161 | #define S5P_MDNIE_SEL S5P_CLKREG(0x7008) |
162 | #define S5P_MIPI_PHY_CON0 S5P_CLKREG(0x7200) | 162 | #define S5P_MIPI_PHY_CON0 S5P_CLKREG(0x7200) |
163 | #define S5P_MIPI_PHY_CON1 S5P_CLKREG(0x7204) | 163 | #define S5P_MIPI_PHY_CON1 S5P_CLKREG(0x7204) |
164 | #define S5P_MIPI_CONTROL S5P_CLKREG(0xE814) | 164 | #define S5P_MIPI_DPHY_CONTROL S5P_CLKREG(0xE814) |
165 | 165 | ||
166 | #define S5P_IDLE_CFG_TL_MASK (3 << 30) | 166 | #define S5P_IDLE_CFG_TL_MASK (3 << 30) |
167 | #define S5P_IDLE_CFG_TM_MASK (3 << 28) | 167 | #define S5P_IDLE_CFG_TM_MASK (3 << 28) |
@@ -195,9 +195,6 @@ | |||
195 | #define S5P_OTHERS_RET_UART (1 << 28) | 195 | #define S5P_OTHERS_RET_UART (1 << 28) |
196 | #define S5P_OTHERS_USB_SIG_MASK (1 << 16) | 196 | #define S5P_OTHERS_USB_SIG_MASK (1 << 16) |
197 | 197 | ||
198 | /* MIPI */ | ||
199 | #define S5P_MIPI_DPHY_EN (3) | ||
200 | |||
201 | /* S5P_DAC_CONTROL */ | 198 | /* S5P_DAC_CONTROL */ |
202 | #define S5P_DAC_ENABLE (1) | 199 | #define S5P_DAC_ENABLE (1) |
203 | #define S5P_DAC_DISABLE (0) | 200 | #define S5P_DAC_DISABLE (0) |