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authorChris Metcalf <cmetcalf@tilera.com>2010-08-13 19:59:15 -0400
committerChris Metcalf <cmetcalf@tilera.com>2010-08-13 19:59:15 -0400
commit7d72e6fa56c4100b9669efe0044f77ed9eb785a1 (patch)
tree5e90bf4969809a1ab20b97432b85be20ccfaa1f4 /arch/arm/mach-s5pv210/mach-smdkc110.c
parentba00376b0b13f234d839541a7b36a5bf5c2a4036 (diff)
parent2be1f3a73dd02e38e181cf5abacb3d45a6a2d6b8 (diff)
Merge branch 'master' into for-linus
Diffstat (limited to 'arch/arm/mach-s5pv210/mach-smdkc110.c')
-rw-r--r--arch/arm/mach-s5pv210/mach-smdkc110.c66
1 files changed, 51 insertions, 15 deletions
diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c
index 4c8903c6d104..8211bb87c54b 100644
--- a/arch/arm/mach-s5pv210/mach-smdkc110.c
+++ b/arch/arm/mach-s5pv210/mach-smdkc110.c
@@ -12,6 +12,7 @@
12#include <linux/types.h> 12#include <linux/types.h>
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/serial_core.h> 14#include <linux/serial_core.h>
15#include <linux/i2c.h>
15 16
16#include <asm/mach/arch.h> 17#include <asm/mach/arch.h>
17#include <asm/mach/map.h> 18#include <asm/mach/map.h>
@@ -25,18 +26,20 @@
25#include <plat/s5pv210.h> 26#include <plat/s5pv210.h>
26#include <plat/devs.h> 27#include <plat/devs.h>
27#include <plat/cpu.h> 28#include <plat/cpu.h>
29#include <plat/ata.h>
30#include <plat/iic.h>
28 31
29/* Following are default values for UCON, ULCON and UFCON UART registers */ 32/* Following are default values for UCON, ULCON and UFCON UART registers */
30#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 33#define SMDKC110_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
31 S3C2410_UCON_RXILEVEL | \ 34 S3C2410_UCON_RXILEVEL | \
32 S3C2410_UCON_TXIRQMODE | \ 35 S3C2410_UCON_TXIRQMODE | \
33 S3C2410_UCON_RXIRQMODE | \ 36 S3C2410_UCON_RXIRQMODE | \
34 S3C2410_UCON_RXFIFO_TOI | \ 37 S3C2410_UCON_RXFIFO_TOI | \
35 S3C2443_UCON_RXERR_IRQEN) 38 S3C2443_UCON_RXERR_IRQEN)
36 39
37#define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8 40#define SMDKC110_ULCON_DEFAULT S3C2410_LCON_CS8
38 41
39#define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ 42#define SMDKC110_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
40 S5PV210_UFCON_TXTRIG4 | \ 43 S5PV210_UFCON_TXTRIG4 | \
41 S5PV210_UFCON_RXTRIG4) 44 S5PV210_UFCON_RXTRIG4)
42 45
@@ -44,39 +47,60 @@ static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = {
44 [0] = { 47 [0] = {
45 .hwport = 0, 48 .hwport = 0,
46 .flags = 0, 49 .flags = 0,
47 .ucon = S5PV210_UCON_DEFAULT, 50 .ucon = SMDKC110_UCON_DEFAULT,
48 .ulcon = S5PV210_ULCON_DEFAULT, 51 .ulcon = SMDKC110_ULCON_DEFAULT,
49 .ufcon = S5PV210_UFCON_DEFAULT, 52 .ufcon = SMDKC110_UFCON_DEFAULT,
50 }, 53 },
51 [1] = { 54 [1] = {
52 .hwport = 1, 55 .hwport = 1,
53 .flags = 0, 56 .flags = 0,
54 .ucon = S5PV210_UCON_DEFAULT, 57 .ucon = SMDKC110_UCON_DEFAULT,
55 .ulcon = S5PV210_ULCON_DEFAULT, 58 .ulcon = SMDKC110_ULCON_DEFAULT,
56 .ufcon = S5PV210_UFCON_DEFAULT, 59 .ufcon = SMDKC110_UFCON_DEFAULT,
57 }, 60 },
58 [2] = { 61 [2] = {
59 .hwport = 2, 62 .hwport = 2,
60 .flags = 0, 63 .flags = 0,
61 .ucon = S5PV210_UCON_DEFAULT, 64 .ucon = SMDKC110_UCON_DEFAULT,
62 .ulcon = S5PV210_ULCON_DEFAULT, 65 .ulcon = SMDKC110_ULCON_DEFAULT,
63 .ufcon = S5PV210_UFCON_DEFAULT, 66 .ufcon = SMDKC110_UFCON_DEFAULT,
64 }, 67 },
65 [3] = { 68 [3] = {
66 .hwport = 3, 69 .hwport = 3,
67 .flags = 0, 70 .flags = 0,
68 .ucon = S5PV210_UCON_DEFAULT, 71 .ucon = SMDKC110_UCON_DEFAULT,
69 .ulcon = S5PV210_ULCON_DEFAULT, 72 .ulcon = SMDKC110_ULCON_DEFAULT,
70 .ufcon = S5PV210_UFCON_DEFAULT, 73 .ufcon = SMDKC110_UFCON_DEFAULT,
71 }, 74 },
72}; 75};
73 76
77static struct s3c_ide_platdata smdkc110_ide_pdata __initdata = {
78 .setup_gpio = s5pv210_ide_setup_gpio,
79};
80
74static struct platform_device *smdkc110_devices[] __initdata = { 81static struct platform_device *smdkc110_devices[] __initdata = {
75 &s5pv210_device_iis0, 82 &s5pv210_device_iis0,
76 &s5pv210_device_ac97, 83 &s5pv210_device_ac97,
84 &s3c_device_cfcon,
85 &s3c_device_i2c0,
86 &s3c_device_i2c1,
87 &s3c_device_i2c2,
88 &s3c_device_rtc,
77 &s3c_device_wdt, 89 &s3c_device_wdt,
78}; 90};
79 91
92static struct i2c_board_info smdkc110_i2c_devs0[] __initdata = {
93 { I2C_BOARD_INFO("24c08", 0x50), }, /* Samsung S524AD0XD1 */
94};
95
96static struct i2c_board_info smdkc110_i2c_devs1[] __initdata = {
97 /* To Be Updated */
98};
99
100static struct i2c_board_info smdkc110_i2c_devs2[] __initdata = {
101 /* To Be Updated */
102};
103
80static void __init smdkc110_map_io(void) 104static void __init smdkc110_map_io(void)
81{ 105{
82 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 106 s5p_init_io(NULL, 0, S5P_VA_CHIPID);
@@ -86,6 +110,18 @@ static void __init smdkc110_map_io(void)
86 110
87static void __init smdkc110_machine_init(void) 111static void __init smdkc110_machine_init(void)
88{ 112{
113 s3c_i2c0_set_platdata(NULL);
114 s3c_i2c1_set_platdata(NULL);
115 s3c_i2c2_set_platdata(NULL);
116 i2c_register_board_info(0, smdkc110_i2c_devs0,
117 ARRAY_SIZE(smdkc110_i2c_devs0));
118 i2c_register_board_info(1, smdkc110_i2c_devs1,
119 ARRAY_SIZE(smdkc110_i2c_devs1));
120 i2c_register_board_info(2, smdkc110_i2c_devs2,
121 ARRAY_SIZE(smdkc110_i2c_devs2));
122
123 s3c_ide_set_platdata(&smdkc110_ide_pdata);
124
89 platform_add_devices(smdkc110_devices, ARRAY_SIZE(smdkc110_devices)); 125 platform_add_devices(smdkc110_devices, ARRAY_SIZE(smdkc110_devices));
90} 126}
91 127