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authorThomas Abraham <thomas.ab@samsung.com>2010-05-16 20:38:12 -0400
committerBen Dooks <ben-linux@fluff.org>2010-05-16 21:37:34 -0400
commiteb1ef1ed06a168cf548419ba6e99f34c8169cffe (patch)
treefeabf52fb0e1bd85b7fc392ff0c0ac8587ca91bd /arch/arm/mach-s5pv210/clock.c
parent59cda520881a1caf4332d6b03634c96fba361591 (diff)
ARM: S5PV210: Register apll/mpll/epll clksrc_clk clocks
This patch modifies the following. 1. Registers the mout_apll clksrc_clk clock. 2. The mout_mpll and mout_epll clocks were registered as 'struct clk' types and then their parents were setup using the s3c_set_clksrc function. This patch reduces the two steps into one by registering the mout_mpll and mout_epll clocks using the s3c_register_clksrc function. 3. As per point 2 above, the init_parents array is no longer required. So the mout clocks are now put together in a new array named 'sysclks'. The sysclks array will list the system level clocks and more clocks will be added to it in the subsequent patches. 4. The clks array is left empty because of the movement of mpll and epll clocks into the sysclks array. It is not deleted since subsequent patches will add clocks into this array. Signed-off-by: Thomas Abraham <thomas.ab <at> samsung.com> Signed-off-by: Kukjin Kim <kgene.kim <at> samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/mach-s5pv210/clock.c')
-rw-r--r--arch/arm/mach-s5pv210/clock.c10
1 files changed, 4 insertions, 6 deletions
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
index a620cd8d347c..25b73a38d6d5 100644
--- a/arch/arm/mach-s5pv210/clock.c
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -324,7 +324,7 @@ static struct clksrc_clk clksrcs[] = {
324}; 324};
325 325
326/* Clock initialisation code */ 326/* Clock initialisation code */
327static struct clksrc_clk *init_parents[] = { 327static struct clksrc_clk *sysclks[] = {
328 &clk_mout_apll, 328 &clk_mout_apll,
329 &clk_mout_epll, 329 &clk_mout_epll,
330 &clk_mout_mpll, 330 &clk_mout_mpll,
@@ -411,16 +411,11 @@ void __init_or_cpufreq s5pv210_setup_clocks(void)
411 clk_h166.rate = hclk166; 411 clk_h166.rate = hclk166;
412 clk_h200.rate = hclk200; 412 clk_h200.rate = hclk200;
413 413
414 for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++)
415 s3c_set_clksrc(init_parents[ptr], true);
416
417 for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) 414 for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
418 s3c_set_clksrc(&clksrcs[ptr], true); 415 s3c_set_clksrc(&clksrcs[ptr], true);
419} 416}
420 417
421static struct clk *clks[] __initdata = { 418static struct clk *clks[] __initdata = {
422 &clk_mout_epll.clk,
423 &clk_mout_mpll.clk,
424}; 419};
425 420
426void __init s5pv210_register_clocks(void) 421void __init s5pv210_register_clocks(void)
@@ -433,6 +428,9 @@ void __init s5pv210_register_clocks(void)
433 if (ret > 0) 428 if (ret > 0)
434 printk(KERN_ERR "Failed to register %u clocks\n", ret); 429 printk(KERN_ERR "Failed to register %u clocks\n", ret);
435 430
431 for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
432 s3c_register_clksrc(sysclks[ptr], 1);
433
436 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); 434 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
437 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); 435 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
438 436