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authorLinus Torvalds <torvalds@linux-foundation.org>2013-03-18 11:17:14 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2013-03-18 11:17:14 -0400
commit1c6ba37b3de535f29ec4353a1f5290f256629775 (patch)
tree2605a0dc3da0458893520cf24bec414b6a7e74da /arch/arm/mach-s5pv210/clock.c
parenta15cd063e15a57aecf9990eaff215940eb307711 (diff)
parentb4811bacbc68f6e17d442df88f98afaa9394d4f5 (diff)
Merge tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC bug fixes from Arnd Bergmann: "Things are calming down for arm-soc as well. This set of bug fixes is dominated in size by the at91 platform bug fixes. Some of them were meant to go through the framebuffer tree during the merge window, but since the framebuffer maintainer could not be reached, I offered to take them here. The other notable at91 change is the addition of pinctrl definitions to fix the NAND controller. The rest are mostly simple regression fixes: - Our removal of VIRT_TO_BUS conflicted with Stephen Rothwell's renaming of the Kconfig symbol. You will get a trivial merge conflict here, we still want to remove it. - missing bits for clocks on imx and s5pv210 - missing header inclusions in mmp and shmobile - typos in s5pv210 camera and vt8500 clock support code and three trivial fixes for pre-3.8 bugs: - an old bogus build warning in the joystick driver - a misleading Kconfig description - a NULL pointer check on davinci" * tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: fix CONFIG_VIRT_TO_BUS handling ARM: i.MX35: enable MAX clock ARM: Scorpion is a v7 architecture, not v6 ARM: mmp: add platform_device head file in gplugd input/joystick: use get_cycles on ARM [media] s5p-fimc: fix s5pv210 build clk: vt8500: Fix "fix device clock divisor calculations" ARM: i.MX25: Fix DT compilation ARM: at91: fix infinite loop in at91_irq_suspend/resume ARM: at91: add gpio suspend/resume support when using pinctrl ARM: at91: fix LCD-wiring mode atmel_lcdfb: fix 16-bpp modes on older SOCs ARM: at91: dt: at91sam9x5: complete NAND pinctrl ARM: at91: dt: at91sam9x5: correct NAND pins comments ARM: davinci: edma: fix dmaengine induced null pointer dereference on da830 ARM: shmobile: marzen: Include mmc/host.h ARM: EXYNOS: Add #dma-cells for generic dma binding support for PL330 ARM: S5PV210: Fix PL330 DMA controller clkdev entries
Diffstat (limited to 'arch/arm/mach-s5pv210/clock.c')
-rw-r--r--arch/arm/mach-s5pv210/clock.c36
1 files changed, 18 insertions, 18 deletions
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
index fcdf52dbcc49..f051f53e35b7 100644
--- a/arch/arm/mach-s5pv210/clock.c
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -214,11 +214,6 @@ static struct clk clk_pcmcdclk2 = {
214 .name = "pcmcdclk", 214 .name = "pcmcdclk",
215}; 215};
216 216
217static struct clk dummy_apb_pclk = {
218 .name = "apb_pclk",
219 .id = -1,
220};
221
222static struct clk *clkset_vpllsrc_list[] = { 217static struct clk *clkset_vpllsrc_list[] = {
223 [0] = &clk_fin_vpll, 218 [0] = &clk_fin_vpll,
224 [1] = &clk_sclk_hdmi27m, 219 [1] = &clk_sclk_hdmi27m,
@@ -305,18 +300,6 @@ static struct clk_ops clk_fout_apll_ops = {
305 300
306static struct clk init_clocks_off[] = { 301static struct clk init_clocks_off[] = {
307 { 302 {
308 .name = "dma",
309 .devname = "dma-pl330.0",
310 .parent = &clk_hclk_psys.clk,
311 .enable = s5pv210_clk_ip0_ctrl,
312 .ctrlbit = (1 << 3),
313 }, {
314 .name = "dma",
315 .devname = "dma-pl330.1",
316 .parent = &clk_hclk_psys.clk,
317 .enable = s5pv210_clk_ip0_ctrl,
318 .ctrlbit = (1 << 4),
319 }, {
320 .name = "rot", 303 .name = "rot",
321 .parent = &clk_hclk_dsys.clk, 304 .parent = &clk_hclk_dsys.clk,
322 .enable = s5pv210_clk_ip0_ctrl, 305 .enable = s5pv210_clk_ip0_ctrl,
@@ -573,6 +556,20 @@ static struct clk clk_hsmmc3 = {
573 .ctrlbit = (1<<19), 556 .ctrlbit = (1<<19),
574}; 557};
575 558
559static struct clk clk_pdma0 = {
560 .name = "pdma0",
561 .parent = &clk_hclk_psys.clk,
562 .enable = s5pv210_clk_ip0_ctrl,
563 .ctrlbit = (1 << 3),
564};
565
566static struct clk clk_pdma1 = {
567 .name = "pdma1",
568 .parent = &clk_hclk_psys.clk,
569 .enable = s5pv210_clk_ip0_ctrl,
570 .ctrlbit = (1 << 4),
571};
572
576static struct clk *clkset_uart_list[] = { 573static struct clk *clkset_uart_list[] = {
577 [6] = &clk_mout_mpll.clk, 574 [6] = &clk_mout_mpll.clk,
578 [7] = &clk_mout_epll.clk, 575 [7] = &clk_mout_epll.clk,
@@ -1075,6 +1072,8 @@ static struct clk *clk_cdev[] = {
1075 &clk_hsmmc1, 1072 &clk_hsmmc1,
1076 &clk_hsmmc2, 1073 &clk_hsmmc2,
1077 &clk_hsmmc3, 1074 &clk_hsmmc3,
1075 &clk_pdma0,
1076 &clk_pdma1,
1078}; 1077};
1079 1078
1080/* Clock initialisation code */ 1079/* Clock initialisation code */
@@ -1333,6 +1332,8 @@ static struct clk_lookup s5pv210_clk_lookup[] = {
1333 CLKDEV_INIT(NULL, "spi_busclk0", &clk_p), 1332 CLKDEV_INIT(NULL, "spi_busclk0", &clk_p),
1334 CLKDEV_INIT("s5pv210-spi.0", "spi_busclk1", &clk_sclk_spi0.clk), 1333 CLKDEV_INIT("s5pv210-spi.0", "spi_busclk1", &clk_sclk_spi0.clk),
1335 CLKDEV_INIT("s5pv210-spi.1", "spi_busclk1", &clk_sclk_spi1.clk), 1334 CLKDEV_INIT("s5pv210-spi.1", "spi_busclk1", &clk_sclk_spi1.clk),
1335 CLKDEV_INIT("dma-pl330.0", "apb_pclk", &clk_pdma0),
1336 CLKDEV_INIT("dma-pl330.1", "apb_pclk", &clk_pdma1),
1336}; 1337};
1337 1338
1338void __init s5pv210_register_clocks(void) 1339void __init s5pv210_register_clocks(void)
@@ -1361,6 +1362,5 @@ void __init s5pv210_register_clocks(void)
1361 for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++) 1362 for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++)
1362 s3c_disable_clocks(clk_cdev[ptr], 1); 1363 s3c_disable_clocks(clk_cdev[ptr], 1);
1363 1364
1364 s3c24xx_register_clock(&dummy_apb_pclk);
1365 s3c_pwmclk_init(); 1365 s3c_pwmclk_init();
1366} 1366}