diff options
author | Kukjin Kim <kgene.kim@samsung.com> | 2010-10-25 02:57:16 -0400 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2010-10-25 02:57:16 -0400 |
commit | 4d9374f39e40f7c7fc15acbfe01dceeee850509f (patch) | |
tree | 31ec5c2ae0ae753a7bdb5a34f3a607fdda2db6c6 /arch/arm/mach-s5pc100 | |
parent | dc6c0ca39daad44f3169656296ef81d39a6dc7f5 (diff) | |
parent | dff2126c548d54b040997257407a69a6cdf7a5b6 (diff) |
Merge branch 'next-gpio-update' into for-next
Diffstat (limited to 'arch/arm/mach-s5pc100')
-rw-r--r-- | arch/arm/mach-s5pc100/dev-audio.c | 32 | ||||
-rw-r--r-- | arch/arm/mach-s5pc100/dev-spi.c | 22 | ||||
-rw-r--r-- | arch/arm/mach-s5pc100/setup-fb-24bpp.c | 30 | ||||
-rw-r--r-- | arch/arm/mach-s5pc100/setup-i2c0.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-s5pc100/setup-i2c1.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-s5pc100/setup-ide.c | 41 | ||||
-rw-r--r-- | arch/arm/mach-s5pc100/setup-keypad.c | 15 | ||||
-rw-r--r-- | arch/arm/mach-s5pc100/setup-sdhci-gpio.c | 35 |
8 files changed, 45 insertions, 142 deletions
diff --git a/arch/arm/mach-s5pc100/dev-audio.c b/arch/arm/mach-s5pc100/dev-audio.c index a699ed6acc23..7f6d01e74b8e 100644 --- a/arch/arm/mach-s5pc100/dev-audio.c +++ b/arch/arm/mach-s5pc100/dev-audio.c | |||
@@ -24,19 +24,11 @@ static int s5pc100_cfg_i2s(struct platform_device *pdev) | |||
24 | /* configure GPIO for i2s port */ | 24 | /* configure GPIO for i2s port */ |
25 | switch (pdev->id) { | 25 | switch (pdev->id) { |
26 | case 1: | 26 | case 1: |
27 | s3c_gpio_cfgpin(S5PC100_GPC(0), S3C_GPIO_SFN(2)); | 27 | s3c_gpio_cfgpin_range(S5PC100_GPC(0), 5, S3C_GPIO_SFN(2)); |
28 | s3c_gpio_cfgpin(S5PC100_GPC(1), S3C_GPIO_SFN(2)); | ||
29 | s3c_gpio_cfgpin(S5PC100_GPC(2), S3C_GPIO_SFN(2)); | ||
30 | s3c_gpio_cfgpin(S5PC100_GPC(3), S3C_GPIO_SFN(2)); | ||
31 | s3c_gpio_cfgpin(S5PC100_GPC(4), S3C_GPIO_SFN(2)); | ||
32 | break; | 28 | break; |
33 | 29 | ||
34 | case 2: | 30 | case 2: |
35 | s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(4)); | 31 | s3c_gpio_cfgpin_range(S5PC100_GPG3(0), 5, S3C_GPIO_SFN(4)); |
36 | s3c_gpio_cfgpin(S5PC100_GPG3(1), S3C_GPIO_SFN(4)); | ||
37 | s3c_gpio_cfgpin(S5PC100_GPG3(2), S3C_GPIO_SFN(4)); | ||
38 | s3c_gpio_cfgpin(S5PC100_GPG3(3), S3C_GPIO_SFN(4)); | ||
39 | s3c_gpio_cfgpin(S5PC100_GPG3(4), S3C_GPIO_SFN(4)); | ||
40 | break; | 32 | break; |
41 | 33 | ||
42 | case -1: /* Dedicated pins */ | 34 | case -1: /* Dedicated pins */ |
@@ -144,19 +136,11 @@ static int s5pc100_pcm_cfg_gpio(struct platform_device *pdev) | |||
144 | { | 136 | { |
145 | switch (pdev->id) { | 137 | switch (pdev->id) { |
146 | case 0: | 138 | case 0: |
147 | s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(5)); | 139 | s3c_gpio_cfgpin_range(S5PC100_GPG3(0), 5, S3C_GPIO_SFN(5)); |
148 | s3c_gpio_cfgpin(S5PC100_GPG3(1), S3C_GPIO_SFN(5)); | ||
149 | s3c_gpio_cfgpin(S5PC100_GPG3(2), S3C_GPIO_SFN(5)); | ||
150 | s3c_gpio_cfgpin(S5PC100_GPG3(3), S3C_GPIO_SFN(5)); | ||
151 | s3c_gpio_cfgpin(S5PC100_GPG3(4), S3C_GPIO_SFN(5)); | ||
152 | break; | 140 | break; |
153 | 141 | ||
154 | case 1: | 142 | case 1: |
155 | s3c_gpio_cfgpin(S5PC100_GPC(0), S3C_GPIO_SFN(3)); | 143 | s3c_gpio_cfgpin_range(S5PC100_GPC(0), 5, S3C_GPIO_SFN(3)); |
156 | s3c_gpio_cfgpin(S5PC100_GPC(1), S3C_GPIO_SFN(3)); | ||
157 | s3c_gpio_cfgpin(S5PC100_GPC(2), S3C_GPIO_SFN(3)); | ||
158 | s3c_gpio_cfgpin(S5PC100_GPC(3), S3C_GPIO_SFN(3)); | ||
159 | s3c_gpio_cfgpin(S5PC100_GPC(4), S3C_GPIO_SFN(3)); | ||
160 | break; | 144 | break; |
161 | 145 | ||
162 | default: | 146 | default: |
@@ -231,13 +215,7 @@ struct platform_device s5pc100_device_pcm1 = { | |||
231 | 215 | ||
232 | static int s5pc100_ac97_cfg_gpio(struct platform_device *pdev) | 216 | static int s5pc100_ac97_cfg_gpio(struct platform_device *pdev) |
233 | { | 217 | { |
234 | s3c_gpio_cfgpin(S5PC100_GPC(0), S3C_GPIO_SFN(4)); | 218 | return s3c_gpio_cfgpin_range(S5PC100_GPC(0), 5, S3C_GPIO_SFN(4)); |
235 | s3c_gpio_cfgpin(S5PC100_GPC(1), S3C_GPIO_SFN(4)); | ||
236 | s3c_gpio_cfgpin(S5PC100_GPC(2), S3C_GPIO_SFN(4)); | ||
237 | s3c_gpio_cfgpin(S5PC100_GPC(3), S3C_GPIO_SFN(4)); | ||
238 | s3c_gpio_cfgpin(S5PC100_GPC(4), S3C_GPIO_SFN(4)); | ||
239 | |||
240 | return 0; | ||
241 | } | 219 | } |
242 | 220 | ||
243 | static struct resource s5pc100_ac97_resource[] = { | 221 | static struct resource s5pc100_ac97_resource[] = { |
diff --git a/arch/arm/mach-s5pc100/dev-spi.c b/arch/arm/mach-s5pc100/dev-spi.c index a0ef7c302c16..57b19794d9bb 100644 --- a/arch/arm/mach-s5pc100/dev-spi.c +++ b/arch/arm/mach-s5pc100/dev-spi.c | |||
@@ -38,30 +38,20 @@ static int s5pc100_spi_cfg_gpio(struct platform_device *pdev) | |||
38 | { | 38 | { |
39 | switch (pdev->id) { | 39 | switch (pdev->id) { |
40 | case 0: | 40 | case 0: |
41 | s3c_gpio_cfgpin(S5PC100_GPB(0), S3C_GPIO_SFN(2)); | 41 | s3c_gpio_cfgall_range(S5PC100_GPB(0), 3, |
42 | s3c_gpio_cfgpin(S5PC100_GPB(1), S3C_GPIO_SFN(2)); | 42 | S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); |
43 | s3c_gpio_cfgpin(S5PC100_GPB(2), S3C_GPIO_SFN(2)); | ||
44 | s3c_gpio_setpull(S5PC100_GPB(0), S3C_GPIO_PULL_UP); | ||
45 | s3c_gpio_setpull(S5PC100_GPB(1), S3C_GPIO_PULL_UP); | ||
46 | s3c_gpio_setpull(S5PC100_GPB(2), S3C_GPIO_PULL_UP); | ||
47 | break; | 43 | break; |
48 | 44 | ||
49 | case 1: | 45 | case 1: |
50 | s3c_gpio_cfgpin(S5PC100_GPB(4), S3C_GPIO_SFN(2)); | 46 | s3c_gpio_cfgall_range(S5PC100_GPB(4), 3, |
51 | s3c_gpio_cfgpin(S5PC100_GPB(5), S3C_GPIO_SFN(2)); | 47 | S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); |
52 | s3c_gpio_cfgpin(S5PC100_GPB(6), S3C_GPIO_SFN(2)); | ||
53 | s3c_gpio_setpull(S5PC100_GPB(4), S3C_GPIO_PULL_UP); | ||
54 | s3c_gpio_setpull(S5PC100_GPB(5), S3C_GPIO_PULL_UP); | ||
55 | s3c_gpio_setpull(S5PC100_GPB(6), S3C_GPIO_PULL_UP); | ||
56 | break; | 48 | break; |
57 | 49 | ||
58 | case 2: | 50 | case 2: |
59 | s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(3)); | 51 | s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(3)); |
60 | s3c_gpio_cfgpin(S5PC100_GPG3(2), S3C_GPIO_SFN(3)); | ||
61 | s3c_gpio_cfgpin(S5PC100_GPG3(3), S3C_GPIO_SFN(3)); | ||
62 | s3c_gpio_setpull(S5PC100_GPG3(0), S3C_GPIO_PULL_UP); | 52 | s3c_gpio_setpull(S5PC100_GPG3(0), S3C_GPIO_PULL_UP); |
63 | s3c_gpio_setpull(S5PC100_GPG3(2), S3C_GPIO_PULL_UP); | 53 | s3c_gpio_cfgall_range(S5PC100_GPB(2), 2, |
64 | s3c_gpio_setpull(S5PC100_GPG3(3), S3C_GPIO_PULL_UP); | 54 | S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP); |
65 | break; | 55 | break; |
66 | 56 | ||
67 | default: | 57 | default: |
diff --git a/arch/arm/mach-s5pc100/setup-fb-24bpp.c b/arch/arm/mach-s5pc100/setup-fb-24bpp.c index 6eba6cb8e2f4..d31c0f3fe222 100644 --- a/arch/arm/mach-s5pc100/setup-fb-24bpp.c +++ b/arch/arm/mach-s5pc100/setup-fb-24bpp.c | |||
@@ -22,27 +22,15 @@ | |||
22 | 22 | ||
23 | #define DISR_OFFSET 0x7008 | 23 | #define DISR_OFFSET 0x7008 |
24 | 24 | ||
25 | void s5pc100_fb_gpio_setup_24bpp(void) | 25 | static void s5pc100_fb_setgpios(unsigned int base, unsigned int nr) |
26 | { | 26 | { |
27 | unsigned int gpio = 0; | 27 | s3c_gpio_cfgrange_nopull(base, nr, S3C_GPIO_SFN(2)); |
28 | 28 | } | |
29 | for (gpio = S5PC100_GPF0(0); gpio <= S5PC100_GPF0(7); gpio++) { | ||
30 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
31 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
32 | } | ||
33 | |||
34 | for (gpio = S5PC100_GPF1(0); gpio <= S5PC100_GPF1(7); gpio++) { | ||
35 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
36 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
37 | } | ||
38 | |||
39 | for (gpio = S5PC100_GPF2(0); gpio <= S5PC100_GPF2(7); gpio++) { | ||
40 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
41 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
42 | } | ||
43 | 29 | ||
44 | for (gpio = S5PC100_GPF3(0); gpio <= S5PC100_GPF3(3); gpio++) { | 30 | void s5pc100_fb_gpio_setup_24bpp(void) |
45 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | 31 | { |
46 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | 32 | s5pc100_fb_setgpios(S5PC100_GPF0(0), 8); |
47 | } | 33 | s5pc100_fb_setgpios(S5PC100_GPF1(0), 8); |
34 | s5pc100_fb_setgpios(S5PC100_GPF2(0), 8); | ||
35 | s5pc100_fb_setgpios(S5PC100_GPF3(0), 4); | ||
48 | } | 36 | } |
diff --git a/arch/arm/mach-s5pc100/setup-i2c0.c b/arch/arm/mach-s5pc100/setup-i2c0.c index dd3174e6ecc5..eaef7a3bda49 100644 --- a/arch/arm/mach-s5pc100/setup-i2c0.c +++ b/arch/arm/mach-s5pc100/setup-i2c0.c | |||
@@ -23,8 +23,6 @@ struct platform_device; /* don't need the contents */ | |||
23 | 23 | ||
24 | void s3c_i2c0_cfg_gpio(struct platform_device *dev) | 24 | void s3c_i2c0_cfg_gpio(struct platform_device *dev) |
25 | { | 25 | { |
26 | s3c_gpio_cfgpin(S5PC100_GPD(3), S3C_GPIO_SFN(2)); | 26 | s3c_gpio_cfgall_range(S5PC100_GPD(3), 2, |
27 | s3c_gpio_setpull(S5PC100_GPD(3), S3C_GPIO_PULL_UP); | 27 | S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); |
28 | s3c_gpio_cfgpin(S5PC100_GPD(4), S3C_GPIO_SFN(2)); | ||
29 | s3c_gpio_setpull(S5PC100_GPD(4), S3C_GPIO_PULL_UP); | ||
30 | } | 28 | } |
diff --git a/arch/arm/mach-s5pc100/setup-i2c1.c b/arch/arm/mach-s5pc100/setup-i2c1.c index d1fec26b69ee..aaff74a90dee 100644 --- a/arch/arm/mach-s5pc100/setup-i2c1.c +++ b/arch/arm/mach-s5pc100/setup-i2c1.c | |||
@@ -23,8 +23,6 @@ struct platform_device; /* don't need the contents */ | |||
23 | 23 | ||
24 | void s3c_i2c1_cfg_gpio(struct platform_device *dev) | 24 | void s3c_i2c1_cfg_gpio(struct platform_device *dev) |
25 | { | 25 | { |
26 | s3c_gpio_cfgpin(S5PC100_GPD(5), S3C_GPIO_SFN(2)); | 26 | s3c_gpio_cfgall_range(S5PC100_GPD(5), 2, |
27 | s3c_gpio_setpull(S5PC100_GPD(5), S3C_GPIO_PULL_UP); | 27 | S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); |
28 | s3c_gpio_cfgpin(S5PC100_GPD(6), S3C_GPIO_SFN(2)); | ||
29 | s3c_gpio_setpull(S5PC100_GPD(6), S3C_GPIO_PULL_UP); | ||
30 | } | 28 | } |
diff --git a/arch/arm/mach-s5pc100/setup-ide.c b/arch/arm/mach-s5pc100/setup-ide.c index 83575671fb59..223aae044466 100644 --- a/arch/arm/mach-s5pc100/setup-ide.c +++ b/arch/arm/mach-s5pc100/setup-ide.c | |||
@@ -17,52 +17,39 @@ | |||
17 | #include <mach/regs-clock.h> | 17 | #include <mach/regs-clock.h> |
18 | #include <plat/gpio-cfg.h> | 18 | #include <plat/gpio-cfg.h> |
19 | 19 | ||
20 | static void s5pc100_ide_cfg_gpios(unsigned int base, unsigned int nr) | ||
21 | { | ||
22 | s3c_gpio_cfgrange_nopull(base, nr, S3C_GPIO_SFN(4)); | ||
23 | |||
24 | for (; nr > 0; nr--, base++) | ||
25 | s5p_gpio_set_drvstr(base, S5P_GPIO_DRVSTR_LV4); | ||
26 | } | ||
27 | |||
20 | void s5pc100_ide_setup_gpio(void) | 28 | void s5pc100_ide_setup_gpio(void) |
21 | { | 29 | { |
22 | u32 reg; | 30 | u32 reg; |
23 | u32 gpio = 0; | ||
24 | 31 | ||
25 | /* Independent CF interface, CF chip select configuration */ | 32 | /* Independent CF interface, CF chip select configuration */ |
26 | reg = readl(S5PC100_MEM_SYS_CFG) & (~0x3f); | 33 | reg = readl(S5PC100_MEM_SYS_CFG) & (~0x3f); |
27 | writel(reg | MEM_SYS_CFG_EBI_FIX_PRI_CFCON, S5PC100_MEM_SYS_CFG); | 34 | writel(reg | MEM_SYS_CFG_EBI_FIX_PRI_CFCON, S5PC100_MEM_SYS_CFG); |
28 | 35 | ||
29 | /* CF_Add[0 - 2], CF_IORDY, CF_INTRQ, CF_DMARQ, CF_DMARST, CF_DMACK */ | 36 | /* CF_Add[0 - 2], CF_IORDY, CF_INTRQ, CF_DMARQ, CF_DMARST, CF_DMACK */ |
30 | for (gpio = S5PC100_GPJ0(0); gpio <= S5PC100_GPJ0(7); gpio++) { | 37 | s5pc100_ide_cfg_gpios(S5PC100_GPJ0(0), 8); |
31 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4)); | ||
32 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
33 | s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); | ||
34 | } | ||
35 | 38 | ||
36 | /*CF_Data[0 - 7] */ | 39 | /*CF_Data[0 - 7] */ |
37 | for (gpio = S5PC100_GPJ2(0); gpio <= S5PC100_GPJ2(7); gpio++) { | 40 | s5pc100_ide_cfg_gpios(S5PC100_GPJ2(0), 8); |
38 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4)); | ||
39 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
40 | s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); | ||
41 | } | ||
42 | 41 | ||
43 | /* CF_Data[8 - 15] */ | 42 | /* CF_Data[8 - 15] */ |
44 | for (gpio = S5PC100_GPJ3(0); gpio <= S5PC100_GPJ3(7); gpio++) { | 43 | s5pc100_ide_cfg_gpios(S5PC100_GPJ3(0), 8); |
45 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4)); | ||
46 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
47 | s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); | ||
48 | } | ||
49 | 44 | ||
50 | /* CF_CS0, CF_CS1, CF_IORD, CF_IOWR */ | 45 | /* CF_CS0, CF_CS1, CF_IORD, CF_IOWR */ |
51 | for (gpio = S5PC100_GPJ4(0); gpio <= S5PC100_GPJ4(3); gpio++) { | 46 | s5pc100_ide_cfg_gpios(S5PC100_GPJ4(0), 4); |
52 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4)); | ||
53 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
54 | s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); | ||
55 | } | ||
56 | 47 | ||
57 | /* EBI_OE, EBI_WE */ | 48 | /* EBI_OE, EBI_WE */ |
58 | for (gpio = S5PC100_GPK0(6); gpio <= S5PC100_GPK0(7); gpio++) | 49 | s3c_gpio_cfgpin_range(S5PC100_GPK0(6), 2, S3C_GPIO_SFN(0)); |
59 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0)); | ||
60 | 50 | ||
61 | /* CF_OE, CF_WE */ | 51 | /* CF_OE, CF_WE */ |
62 | for (gpio = S5PC100_GPK1(6); gpio <= S5PC100_GPK1(7); gpio++) { | 52 | s3c_gpio_cfgrange_nopull(S5PC100_GPK1(6), 8, S3C_GPIO_SFN(2)); |
63 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
64 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
65 | } | ||
66 | 53 | ||
67 | /* CF_CD */ | 54 | /* CF_CD */ |
68 | s3c_gpio_cfgpin(S5PC100_GPK3(5), S3C_GPIO_SFN(2)); | 55 | s3c_gpio_cfgpin(S5PC100_GPK3(5), S3C_GPIO_SFN(2)); |
diff --git a/arch/arm/mach-s5pc100/setup-keypad.c b/arch/arm/mach-s5pc100/setup-keypad.c index d0837a72a58e..ada377f0c206 100644 --- a/arch/arm/mach-s5pc100/setup-keypad.c +++ b/arch/arm/mach-s5pc100/setup-keypad.c | |||
@@ -15,20 +15,9 @@ | |||
15 | 15 | ||
16 | void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols) | 16 | void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols) |
17 | { | 17 | { |
18 | unsigned int gpio; | ||
19 | unsigned int end; | ||
20 | |||
21 | /* Set all the necessary GPH3 pins to special-function 3: KP_ROW[x] */ | 18 | /* Set all the necessary GPH3 pins to special-function 3: KP_ROW[x] */ |
22 | end = S5PC100_GPH3(rows); | 19 | s3c_gpio_cfgrange_nopull(S5PC100_GPH3(0), rows, S3C_GPIO_SFN(3)); |
23 | for (gpio = S5PC100_GPH3(0); gpio < end; gpio++) { | ||
24 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); | ||
25 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
26 | } | ||
27 | 20 | ||
28 | /* Set all the necessary GPH2 pins to special-function 3: KP_COL[x] */ | 21 | /* Set all the necessary GPH2 pins to special-function 3: KP_COL[x] */ |
29 | end = S5PC100_GPH2(cols); | 22 | s3c_gpio_cfgrange_nopull(S5PC100_GPH2(0), cols, S3C_GPIO_SFN(3)); |
30 | for (gpio = S5PC100_GPH2(0); gpio < end; gpio++) { | ||
31 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); | ||
32 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
33 | } | ||
34 | } | 23 | } |
diff --git a/arch/arm/mach-s5pc100/setup-sdhci-gpio.c b/arch/arm/mach-s5pc100/setup-sdhci-gpio.c index dc7208c639ea..03c02d04c68c 100644 --- a/arch/arm/mach-s5pc100/setup-sdhci-gpio.c +++ b/arch/arm/mach-s5pc100/setup-sdhci-gpio.c | |||
@@ -25,8 +25,6 @@ | |||
25 | void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) | 25 | void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) |
26 | { | 26 | { |
27 | struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; | 27 | struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; |
28 | unsigned int gpio; | ||
29 | unsigned int end; | ||
30 | unsigned int num; | 28 | unsigned int num; |
31 | 29 | ||
32 | num = width; | 30 | num = width; |
@@ -34,20 +32,11 @@ void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) | |||
34 | if (width == 8) | 32 | if (width == 8) |
35 | num = width - 2; | 33 | num = width - 2; |
36 | 34 | ||
37 | end = S5PC100_GPG0(2 + num); | ||
38 | |||
39 | /* Set all the necessary GPG0/GPG1 pins to special-function 0 */ | 35 | /* Set all the necessary GPG0/GPG1 pins to special-function 0 */ |
40 | for (gpio = S5PC100_GPG0(0); gpio < end; gpio++) { | 36 | s3c_gpio_cfgrange_nopull(S5PC100_GPG0(0), 2 + num, S3C_GPIO_SFN(2)); |
41 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
42 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
43 | } | ||
44 | 37 | ||
45 | if (width == 8) { | 38 | if (width == 8) |
46 | for (gpio = S5PC100_GPG1(0); gpio <= S5PC100_GPG1(1); gpio++) { | 39 | s3c_gpio_cfgrange_nopull(S5PC100_GPG1(0), 2, S3C_GPIO_SFN(2)); |
47 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
48 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
49 | } | ||
50 | } | ||
51 | 40 | ||
52 | if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { | 41 | if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { |
53 | s3c_gpio_setpull(S5PC100_GPG1(2), S3C_GPIO_PULL_UP); | 42 | s3c_gpio_setpull(S5PC100_GPG1(2), S3C_GPIO_PULL_UP); |
@@ -58,16 +47,9 @@ void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) | |||
58 | void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) | 47 | void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) |
59 | { | 48 | { |
60 | struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; | 49 | struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; |
61 | unsigned int gpio; | ||
62 | unsigned int end; | ||
63 | |||
64 | end = S5PC100_GPG2(2 + width); | ||
65 | 50 | ||
66 | /* Set all the necessary GPG2 pins to special-function 2 */ | 51 | /* Set all the necessary GPG2 pins to special-function 2 */ |
67 | for (gpio = S5PC100_GPG2(0); gpio < end; gpio++) { | 52 | s3c_gpio_cfgrange_nopull(S5PC100_GPG2(0), 2 + width, S3C_GPIO_SFN(2)); |
68 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
69 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
70 | } | ||
71 | 53 | ||
72 | if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { | 54 | if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { |
73 | s3c_gpio_setpull(S5PC100_GPG2(6), S3C_GPIO_PULL_UP); | 55 | s3c_gpio_setpull(S5PC100_GPG2(6), S3C_GPIO_PULL_UP); |
@@ -78,16 +60,9 @@ void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) | |||
78 | void s5pc100_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) | 60 | void s5pc100_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) |
79 | { | 61 | { |
80 | struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; | 62 | struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; |
81 | unsigned int gpio; | ||
82 | unsigned int end; | ||
83 | |||
84 | end = S5PC100_GPG3(2 + width); | ||
85 | 63 | ||
86 | /* Set all the necessary GPG3 pins to special-function 2 */ | 64 | /* Set all the necessary GPG3 pins to special-function 2 */ |
87 | for (gpio = S5PC100_GPG3(0); gpio < end; gpio++) { | 65 | s3c_gpio_cfgrange_nopull(S5PC100_GPG3(0), 2 + width, S3C_GPIO_SFN(2)); |
88 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
89 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
90 | } | ||
91 | 66 | ||
92 | if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { | 67 | if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { |
93 | s3c_gpio_setpull(S5PC100_GPG3(6), S3C_GPIO_PULL_UP); | 68 | s3c_gpio_setpull(S5PC100_GPG3(6), S3C_GPIO_PULL_UP); |