From ce8f9abd62e3c9fb21d6cea96a07f42ed5e008ce Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 1 Oct 2010 14:20:55 +0900 Subject: ARM: S5PC100: Change to using s3c_gpio_cfgpin_range() Change the code setting ranges of GPIO pins using s3c_gpio_cfgpin() to use the recently introduced s3c_gpio_cfgpin_range(). Signed-off-by: Ben Dooks [kgene.kim@samsung.com: Fixed wrong change] Signed-off-by: Kukjin Kim --- arch/arm/mach-s5pc100/dev-audio.c | 32 +++++--------------------------- arch/arm/mach-s5pc100/dev-spi.c | 11 +++-------- arch/arm/mach-s5pc100/setup-sdhci-gpio.c | 15 ++++++--------- 3 files changed, 14 insertions(+), 44 deletions(-) (limited to 'arch/arm/mach-s5pc100') diff --git a/arch/arm/mach-s5pc100/dev-audio.c b/arch/arm/mach-s5pc100/dev-audio.c index a699ed6acc23..7f6d01e74b8e 100644 --- a/arch/arm/mach-s5pc100/dev-audio.c +++ b/arch/arm/mach-s5pc100/dev-audio.c @@ -24,19 +24,11 @@ static int s5pc100_cfg_i2s(struct platform_device *pdev) /* configure GPIO for i2s port */ switch (pdev->id) { case 1: - s3c_gpio_cfgpin(S5PC100_GPC(0), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PC100_GPC(1), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PC100_GPC(2), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PC100_GPC(3), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PC100_GPC(4), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5PC100_GPC(0), 5, S3C_GPIO_SFN(2)); break; case 2: - s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S5PC100_GPG3(1), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S5PC100_GPG3(2), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S5PC100_GPG3(3), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S5PC100_GPG3(4), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin_range(S5PC100_GPG3(0), 5, S3C_GPIO_SFN(4)); break; case -1: /* Dedicated pins */ @@ -144,19 +136,11 @@ static int s5pc100_pcm_cfg_gpio(struct platform_device *pdev) { switch (pdev->id) { case 0: - s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5PC100_GPG3(1), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5PC100_GPG3(2), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5PC100_GPG3(3), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5PC100_GPG3(4), S3C_GPIO_SFN(5)); + s3c_gpio_cfgpin_range(S5PC100_GPG3(0), 5, S3C_GPIO_SFN(5)); break; case 1: - s3c_gpio_cfgpin(S5PC100_GPC(0), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S5PC100_GPC(1), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S5PC100_GPC(2), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S5PC100_GPC(3), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S5PC100_GPC(4), S3C_GPIO_SFN(3)); + s3c_gpio_cfgpin_range(S5PC100_GPC(0), 5, S3C_GPIO_SFN(3)); break; default: @@ -231,13 +215,7 @@ struct platform_device s5pc100_device_pcm1 = { static int s5pc100_ac97_cfg_gpio(struct platform_device *pdev) { - s3c_gpio_cfgpin(S5PC100_GPC(0), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S5PC100_GPC(1), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S5PC100_GPC(2), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S5PC100_GPC(3), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S5PC100_GPC(4), S3C_GPIO_SFN(4)); - - return 0; + return s3c_gpio_cfgpin_range(S5PC100_GPC(0), 5, S3C_GPIO_SFN(4)); } static struct resource s5pc100_ac97_resource[] = { diff --git a/arch/arm/mach-s5pc100/dev-spi.c b/arch/arm/mach-s5pc100/dev-spi.c index a0ef7c302c16..c1c5aed07910 100644 --- a/arch/arm/mach-s5pc100/dev-spi.c +++ b/arch/arm/mach-s5pc100/dev-spi.c @@ -38,18 +38,14 @@ static int s5pc100_spi_cfg_gpio(struct platform_device *pdev) { switch (pdev->id) { case 0: - s3c_gpio_cfgpin(S5PC100_GPB(0), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PC100_GPB(1), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PC100_GPB(2), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5PC100_GPB(0), 3, S3C_GPIO_SFN(2)); s3c_gpio_setpull(S5PC100_GPB(0), S3C_GPIO_PULL_UP); s3c_gpio_setpull(S5PC100_GPB(1), S3C_GPIO_PULL_UP); s3c_gpio_setpull(S5PC100_GPB(2), S3C_GPIO_PULL_UP); break; case 1: - s3c_gpio_cfgpin(S5PC100_GPB(4), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PC100_GPB(5), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PC100_GPB(6), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5PC100_GPB(4), 3, S3C_GPIO_SFN(2)); s3c_gpio_setpull(S5PC100_GPB(4), S3C_GPIO_PULL_UP); s3c_gpio_setpull(S5PC100_GPB(5), S3C_GPIO_PULL_UP); s3c_gpio_setpull(S5PC100_GPB(6), S3C_GPIO_PULL_UP); @@ -57,8 +53,7 @@ static int s5pc100_spi_cfg_gpio(struct platform_device *pdev) case 2: s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S5PC100_GPG3(2), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S5PC100_GPG3(3), S3C_GPIO_SFN(3)); + s3c_gpio_cfgpin_range(S5PC100_GPB(2), 2, S3C_GPIO_SFN(3)); s3c_gpio_setpull(S5PC100_GPG3(0), S3C_GPIO_PULL_UP); s3c_gpio_setpull(S5PC100_GPG3(2), S3C_GPIO_PULL_UP); s3c_gpio_setpull(S5PC100_GPG3(3), S3C_GPIO_PULL_UP); diff --git a/arch/arm/mach-s5pc100/setup-sdhci-gpio.c b/arch/arm/mach-s5pc100/setup-sdhci-gpio.c index dc7208c639ea..79b031f5f434 100644 --- a/arch/arm/mach-s5pc100/setup-sdhci-gpio.c +++ b/arch/arm/mach-s5pc100/setup-sdhci-gpio.c @@ -37,10 +37,9 @@ void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) end = S5PC100_GPG0(2 + num); /* Set all the necessary GPG0/GPG1 pins to special-function 0 */ - for (gpio = S5PC100_GPG0(0); gpio < end; gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5PC100_GPG0(0), 2 + num, S3C_GPIO_SFN(2)); + for (gpio = S5PC100_GPG0(0); gpio < end; gpio++) s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } if (width == 8) { for (gpio = S5PC100_GPG1(0); gpio <= S5PC100_GPG1(1); gpio++) { @@ -64,10 +63,9 @@ void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) end = S5PC100_GPG2(2 + width); /* Set all the necessary GPG2 pins to special-function 2 */ - for (gpio = S5PC100_GPG2(0); gpio < end; gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5PC100_GPG2(0), 2 + width, S3C_GPIO_SFN(2)); + for (gpio = S5PC100_GPG2(0); gpio < end; gpio++) s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S5PC100_GPG2(6), S3C_GPIO_PULL_UP); @@ -84,10 +82,9 @@ void s5pc100_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) end = S5PC100_GPG3(2 + width); /* Set all the necessary GPG3 pins to special-function 2 */ - for (gpio = S5PC100_GPG3(0); gpio < end; gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5PC100_GPG3(0), 2 + width, S3C_GPIO_SFN(2)); + for (gpio = S5PC100_GPG3(0); gpio < end; gpio++) s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S5PC100_GPG3(6), S3C_GPIO_PULL_UP); -- cgit v1.2.2 From a40af06655f97d88fc1b0fcc9b5f2a5c06a27a4a Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 1 Oct 2010 16:49:11 +0900 Subject: ARM: S5PC100: Change to using s3c_gpio_cfgall_range() Change the code setting a range of GPIO pins' configuration and pull state to use the recently introduced s3c_gpio_cfgall_range(). Mop up a few missed s3c_gpio_cfgpin_range() changes. Signed-off-by: Ben Dooks Signed-off-by: Kukjin Kim --- arch/arm/mach-s5pc100/setup-fb-24bpp.c | 30 ++++++++------------------ arch/arm/mach-s5pc100/setup-sdhci-gpio.c | 36 ++++++++------------------------ 2 files changed, 18 insertions(+), 48 deletions(-) (limited to 'arch/arm/mach-s5pc100') diff --git a/arch/arm/mach-s5pc100/setup-fb-24bpp.c b/arch/arm/mach-s5pc100/setup-fb-24bpp.c index 6eba6cb8e2f4..5a882d46c3f5 100644 --- a/arch/arm/mach-s5pc100/setup-fb-24bpp.c +++ b/arch/arm/mach-s5pc100/setup-fb-24bpp.c @@ -22,27 +22,15 @@ #define DISR_OFFSET 0x7008 -void s5pc100_fb_gpio_setup_24bpp(void) +static void s5pc100_fb_setgpios(unsigned int base, unsigned int nr) { - unsigned int gpio = 0; - - for (gpio = S5PC100_GPF0(0); gpio <= S5PC100_GPF0(7); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } - - for (gpio = S5PC100_GPF1(0); gpio <= S5PC100_GPF1(7); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } - - for (gpio = S5PC100_GPF2(0); gpio <= S5PC100_GPF2(7); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } + s3c_gpio_cfgall_range(base, nr, S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); +} - for (gpio = S5PC100_GPF3(0); gpio <= S5PC100_GPF3(3); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } +void s5pc100_fb_gpio_setup_24bpp(void) +{ + s5pc100_fb_setgpios(S5PC100_GPF0(0), 8); + s5pc100_fb_setgpios(S5PC100_GPF1(0), 8); + s5pc100_fb_setgpios(S5PC100_GPF2(0), 8); + s5pc100_fb_setgpios(S5PC100_GPF3(0), 4); } diff --git a/arch/arm/mach-s5pc100/setup-sdhci-gpio.c b/arch/arm/mach-s5pc100/setup-sdhci-gpio.c index 79b031f5f434..a8d22a7b1581 100644 --- a/arch/arm/mach-s5pc100/setup-sdhci-gpio.c +++ b/arch/arm/mach-s5pc100/setup-sdhci-gpio.c @@ -25,8 +25,6 @@ void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) { struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; - unsigned int gpio; - unsigned int end; unsigned int num; num = width; @@ -34,19 +32,13 @@ void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) if (width == 8) num = width - 2; - end = S5PC100_GPG0(2 + num); - /* Set all the necessary GPG0/GPG1 pins to special-function 0 */ - s3c_gpio_cfgpin_range(S5PC100_GPG0(0), 2 + num, S3C_GPIO_SFN(2)); - for (gpio = S5PC100_GPG0(0); gpio < end; gpio++) - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); + s3c_gpio_cfgall_range(S5PC100_GPG0(0), 2 + num, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); - if (width == 8) { - for (gpio = S5PC100_GPG1(0); gpio <= S5PC100_GPG1(1); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } - } + if (width == 8) + s3c_gpio_cfgall_range(S5PC100_GPG1(0), 2, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S5PC100_GPG1(2), S3C_GPIO_PULL_UP); @@ -57,15 +49,10 @@ void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) { struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; - unsigned int gpio; - unsigned int end; - - end = S5PC100_GPG2(2 + width); /* Set all the necessary GPG2 pins to special-function 2 */ - s3c_gpio_cfgpin_range(S5PC100_GPG2(0), 2 + width, S3C_GPIO_SFN(2)); - for (gpio = S5PC100_GPG2(0); gpio < end; gpio++) - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); + s3c_gpio_cfgall_range(S5PC100_GPG2(0), 2 + width, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S5PC100_GPG2(6), S3C_GPIO_PULL_UP); @@ -76,15 +63,10 @@ void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) void s5pc100_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) { struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; - unsigned int gpio; - unsigned int end; - - end = S5PC100_GPG3(2 + width); /* Set all the necessary GPG3 pins to special-function 2 */ - s3c_gpio_cfgpin_range(S5PC100_GPG3(0), 2 + width, S3C_GPIO_SFN(2)); - for (gpio = S5PC100_GPG3(0); gpio < end; gpio++) - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); + s3c_gpio_cfgall_range(S5PC100_GPG3(0), 2 + width, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S5PC100_GPG3(6), S3C_GPIO_PULL_UP); -- cgit v1.2.2 From e27ecd7306992fbe58ab03f20aa3452a8b40499a Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Fri, 1 Oct 2010 20:50:20 +0900 Subject: ARM: S5PC100: 2nd Change to using s3c_gpio_cfgall_range() This patch changes the code setting range of GPIO pins' configuration and pull state to use the recently introduced s3c_gpio_cfgpin_range(). NOTE: This is for missed things from the previous patch. Signed-off-by: Kukjin Kim --- arch/arm/mach-s5pc100/dev-spi.c | 17 ++++++--------- arch/arm/mach-s5pc100/setup-i2c0.c | 6 ++---- arch/arm/mach-s5pc100/setup-i2c1.c | 6 ++---- arch/arm/mach-s5pc100/setup-ide.c | 42 +++++++++++++----------------------- arch/arm/mach-s5pc100/setup-keypad.c | 17 ++++----------- 5 files changed, 29 insertions(+), 59 deletions(-) (limited to 'arch/arm/mach-s5pc100') diff --git a/arch/arm/mach-s5pc100/dev-spi.c b/arch/arm/mach-s5pc100/dev-spi.c index c1c5aed07910..57b19794d9bb 100644 --- a/arch/arm/mach-s5pc100/dev-spi.c +++ b/arch/arm/mach-s5pc100/dev-spi.c @@ -38,25 +38,20 @@ static int s5pc100_spi_cfg_gpio(struct platform_device *pdev) { switch (pdev->id) { case 0: - s3c_gpio_cfgpin_range(S5PC100_GPB(0), 3, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5PC100_GPB(0), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5PC100_GPB(1), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5PC100_GPB(2), S3C_GPIO_PULL_UP); + s3c_gpio_cfgall_range(S5PC100_GPB(0), 3, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); break; case 1: - s3c_gpio_cfgpin_range(S5PC100_GPB(4), 3, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5PC100_GPB(4), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5PC100_GPB(5), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5PC100_GPB(6), S3C_GPIO_PULL_UP); + s3c_gpio_cfgall_range(S5PC100_GPB(4), 3, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); break; case 2: s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin_range(S5PC100_GPB(2), 2, S3C_GPIO_SFN(3)); s3c_gpio_setpull(S5PC100_GPG3(0), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5PC100_GPG3(2), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5PC100_GPG3(3), S3C_GPIO_PULL_UP); + s3c_gpio_cfgall_range(S5PC100_GPB(2), 2, + S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP); break; default: diff --git a/arch/arm/mach-s5pc100/setup-i2c0.c b/arch/arm/mach-s5pc100/setup-i2c0.c index dd3174e6ecc5..eaef7a3bda49 100644 --- a/arch/arm/mach-s5pc100/setup-i2c0.c +++ b/arch/arm/mach-s5pc100/setup-i2c0.c @@ -23,8 +23,6 @@ struct platform_device; /* don't need the contents */ void s3c_i2c0_cfg_gpio(struct platform_device *dev) { - s3c_gpio_cfgpin(S5PC100_GPD(3), S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5PC100_GPD(3), S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(S5PC100_GPD(4), S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5PC100_GPD(4), S3C_GPIO_PULL_UP); + s3c_gpio_cfgall_range(S5PC100_GPD(3), 2, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); } diff --git a/arch/arm/mach-s5pc100/setup-i2c1.c b/arch/arm/mach-s5pc100/setup-i2c1.c index d1fec26b69ee..aaff74a90dee 100644 --- a/arch/arm/mach-s5pc100/setup-i2c1.c +++ b/arch/arm/mach-s5pc100/setup-i2c1.c @@ -23,8 +23,6 @@ struct platform_device; /* don't need the contents */ void s3c_i2c1_cfg_gpio(struct platform_device *dev) { - s3c_gpio_cfgpin(S5PC100_GPD(5), S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5PC100_GPD(5), S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(S5PC100_GPD(6), S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5PC100_GPD(6), S3C_GPIO_PULL_UP); + s3c_gpio_cfgall_range(S5PC100_GPD(5), 2, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); } diff --git a/arch/arm/mach-s5pc100/setup-ide.c b/arch/arm/mach-s5pc100/setup-ide.c index 83575671fb59..d8b0d0eac139 100644 --- a/arch/arm/mach-s5pc100/setup-ide.c +++ b/arch/arm/mach-s5pc100/setup-ide.c @@ -17,52 +17,40 @@ #include #include +static void s5pc100_ide_cfg_gpios(unsigned int base, unsigned int nr) +{ + s3c_gpio_cfgall_range(base, nr, S3C_GPIO_SFN(4), S3C_GPIO_PULL_NONE); + + for (; nr > 0; nr--, base++) + s5p_gpio_set_drvstr(base, S5P_GPIO_DRVSTR_LV4); +} + void s5pc100_ide_setup_gpio(void) { u32 reg; - u32 gpio = 0; /* Independent CF interface, CF chip select configuration */ reg = readl(S5PC100_MEM_SYS_CFG) & (~0x3f); writel(reg | MEM_SYS_CFG_EBI_FIX_PRI_CFCON, S5PC100_MEM_SYS_CFG); /* CF_Add[0 - 2], CF_IORDY, CF_INTRQ, CF_DMARQ, CF_DMARST, CF_DMACK */ - for (gpio = S5PC100_GPJ0(0); gpio <= S5PC100_GPJ0(7); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); - } + s5pc100_ide_cfg_gpios(S5PC100_GPJ0(0), 8); /*CF_Data[0 - 7] */ - for (gpio = S5PC100_GPJ2(0); gpio <= S5PC100_GPJ2(7); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); - } + s5pc100_ide_cfg_gpios(S5PC100_GPJ2(0), 8); /* CF_Data[8 - 15] */ - for (gpio = S5PC100_GPJ3(0); gpio <= S5PC100_GPJ3(7); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); - } + s5pc100_ide_cfg_gpios(S5PC100_GPJ3(0), 8); /* CF_CS0, CF_CS1, CF_IORD, CF_IOWR */ - for (gpio = S5PC100_GPJ4(0); gpio <= S5PC100_GPJ4(3); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); - } + s5pc100_ide_cfg_gpios(S5PC100_GPJ4(0), 4); /* EBI_OE, EBI_WE */ - for (gpio = S5PC100_GPK0(6); gpio <= S5PC100_GPK0(7); gpio++) - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0)); + s3c_gpio_cfgpin_range(S5PC100_GPK0(6), 2, S3C_GPIO_SFN(0)); /* CF_OE, CF_WE */ - for (gpio = S5PC100_GPK1(6); gpio <= S5PC100_GPK1(7); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } + s3c_gpio_cfgall_range(S5PC100_GPK1(6), 8, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); /* CF_CD */ s3c_gpio_cfgpin(S5PC100_GPK3(5), S3C_GPIO_SFN(2)); diff --git a/arch/arm/mach-s5pc100/setup-keypad.c b/arch/arm/mach-s5pc100/setup-keypad.c index d0837a72a58e..966b49f0e281 100644 --- a/arch/arm/mach-s5pc100/setup-keypad.c +++ b/arch/arm/mach-s5pc100/setup-keypad.c @@ -15,20 +15,11 @@ void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols) { - unsigned int gpio; - unsigned int end; - /* Set all the necessary GPH3 pins to special-function 3: KP_ROW[x] */ - end = S5PC100_GPH3(rows); - for (gpio = S5PC100_GPH3(0); gpio < end; gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } + s3c_gpio_cfgall_range(S5PC100_GPH3(0), rows, + S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE); /* Set all the necessary GPH2 pins to special-function 3: KP_COL[x] */ - end = S5PC100_GPH2(cols); - for (gpio = S5PC100_GPH2(0); gpio < end; gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } + s3c_gpio_cfgall_range(S5PC100_GPH2(0), cols, + S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE); } -- cgit v1.2.2 From 8f89d5b3b14ba588f744ba394b6c7f00f4dcd49a Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Thu, 27 May 2010 17:25:46 +0900 Subject: ARM: S5PC100: Change to using s3c_gpio_cfgrange_nopull() Change code setting special-function and no pull-up to use the s3c_gpio_cfgrange_nopull() wrapper. Signed-off-by: Ben Dooks Signed-off-by: Kukjin Kim --- arch/arm/mach-s5pc100/setup-sdhci-gpio.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) (limited to 'arch/arm/mach-s5pc100') diff --git a/arch/arm/mach-s5pc100/setup-sdhci-gpio.c b/arch/arm/mach-s5pc100/setup-sdhci-gpio.c index a8d22a7b1581..03c02d04c68c 100644 --- a/arch/arm/mach-s5pc100/setup-sdhci-gpio.c +++ b/arch/arm/mach-s5pc100/setup-sdhci-gpio.c @@ -33,12 +33,10 @@ void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) num = width - 2; /* Set all the necessary GPG0/GPG1 pins to special-function 0 */ - s3c_gpio_cfgall_range(S5PC100_GPG0(0), 2 + num, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S5PC100_GPG0(0), 2 + num, S3C_GPIO_SFN(2)); if (width == 8) - s3c_gpio_cfgall_range(S5PC100_GPG1(0), 2, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S5PC100_GPG1(0), 2, S3C_GPIO_SFN(2)); if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S5PC100_GPG1(2), S3C_GPIO_PULL_UP); @@ -51,8 +49,7 @@ void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; /* Set all the necessary GPG2 pins to special-function 2 */ - s3c_gpio_cfgall_range(S5PC100_GPG2(0), 2 + width, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S5PC100_GPG2(0), 2 + width, S3C_GPIO_SFN(2)); if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S5PC100_GPG2(6), S3C_GPIO_PULL_UP); @@ -65,8 +62,7 @@ void s5pc100_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; /* Set all the necessary GPG3 pins to special-function 2 */ - s3c_gpio_cfgall_range(S5PC100_GPG3(0), 2 + width, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S5PC100_GPG3(0), 2 + width, S3C_GPIO_SFN(2)); if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S5PC100_GPG3(6), S3C_GPIO_PULL_UP); -- cgit v1.2.2 From 20dbc43dd33a35ee24b6892d980c5e6107a27d32 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Fri, 1 Oct 2010 20:10:33 +0900 Subject: ARM: S5PC100: 2nd Change to using s3c_gpio_cfgrange_nopull() This patch changes code setting special-function and no pull-up to use the s3c_gpio_cfgrange_nopull() wrapper. NOTE: This is for missed things from the previous patch. Signed-off-by: Kukjin Kim --- arch/arm/mach-s5pc100/setup-fb-24bpp.c | 2 +- arch/arm/mach-s5pc100/setup-ide.c | 5 ++--- arch/arm/mach-s5pc100/setup-keypad.c | 6 ++---- 3 files changed, 5 insertions(+), 8 deletions(-) (limited to 'arch/arm/mach-s5pc100') diff --git a/arch/arm/mach-s5pc100/setup-fb-24bpp.c b/arch/arm/mach-s5pc100/setup-fb-24bpp.c index 5a882d46c3f5..d31c0f3fe222 100644 --- a/arch/arm/mach-s5pc100/setup-fb-24bpp.c +++ b/arch/arm/mach-s5pc100/setup-fb-24bpp.c @@ -24,7 +24,7 @@ static void s5pc100_fb_setgpios(unsigned int base, unsigned int nr) { - s3c_gpio_cfgall_range(base, nr, S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(base, nr, S3C_GPIO_SFN(2)); } void s5pc100_fb_gpio_setup_24bpp(void) diff --git a/arch/arm/mach-s5pc100/setup-ide.c b/arch/arm/mach-s5pc100/setup-ide.c index d8b0d0eac139..223aae044466 100644 --- a/arch/arm/mach-s5pc100/setup-ide.c +++ b/arch/arm/mach-s5pc100/setup-ide.c @@ -19,7 +19,7 @@ static void s5pc100_ide_cfg_gpios(unsigned int base, unsigned int nr) { - s3c_gpio_cfgall_range(base, nr, S3C_GPIO_SFN(4), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(base, nr, S3C_GPIO_SFN(4)); for (; nr > 0; nr--, base++) s5p_gpio_set_drvstr(base, S5P_GPIO_DRVSTR_LV4); @@ -49,8 +49,7 @@ void s5pc100_ide_setup_gpio(void) s3c_gpio_cfgpin_range(S5PC100_GPK0(6), 2, S3C_GPIO_SFN(0)); /* CF_OE, CF_WE */ - s3c_gpio_cfgall_range(S5PC100_GPK1(6), 8, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S5PC100_GPK1(6), 8, S3C_GPIO_SFN(2)); /* CF_CD */ s3c_gpio_cfgpin(S5PC100_GPK3(5), S3C_GPIO_SFN(2)); diff --git a/arch/arm/mach-s5pc100/setup-keypad.c b/arch/arm/mach-s5pc100/setup-keypad.c index 966b49f0e281..ada377f0c206 100644 --- a/arch/arm/mach-s5pc100/setup-keypad.c +++ b/arch/arm/mach-s5pc100/setup-keypad.c @@ -16,10 +16,8 @@ void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols) { /* Set all the necessary GPH3 pins to special-function 3: KP_ROW[x] */ - s3c_gpio_cfgall_range(S5PC100_GPH3(0), rows, - S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S5PC100_GPH3(0), rows, S3C_GPIO_SFN(3)); /* Set all the necessary GPH2 pins to special-function 3: KP_COL[x] */ - s3c_gpio_cfgall_range(S5PC100_GPH2(0), cols, - S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S5PC100_GPH2(0), cols, S3C_GPIO_SFN(3)); } -- cgit v1.2.2