aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-s5pc100/setup-ide.c
diff options
context:
space:
mode:
authorKukjin Kim <kgene.kim@samsung.com>2010-10-01 07:10:33 -0400
committerKukjin Kim <kgene.kim@samsung.com>2010-10-22 22:52:15 -0400
commit20dbc43dd33a35ee24b6892d980c5e6107a27d32 (patch)
treed06894f0a233f01cc17eafe2c3b43a1d7d0a3b88 /arch/arm/mach-s5pc100/setup-ide.c
parent3e9b7261502e78e351fc6a61a9b7241433c779c4 (diff)
ARM: S5PC100: 2nd Change to using s3c_gpio_cfgrange_nopull()
This patch changes code setting special-function and no pull-up to use the s3c_gpio_cfgrange_nopull() wrapper. NOTE: This is for missed things from the previous patch. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s5pc100/setup-ide.c')
-rw-r--r--arch/arm/mach-s5pc100/setup-ide.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/arch/arm/mach-s5pc100/setup-ide.c b/arch/arm/mach-s5pc100/setup-ide.c
index d8b0d0eac139..223aae044466 100644
--- a/arch/arm/mach-s5pc100/setup-ide.c
+++ b/arch/arm/mach-s5pc100/setup-ide.c
@@ -19,7 +19,7 @@
19 19
20static void s5pc100_ide_cfg_gpios(unsigned int base, unsigned int nr) 20static void s5pc100_ide_cfg_gpios(unsigned int base, unsigned int nr)
21{ 21{
22 s3c_gpio_cfgall_range(base, nr, S3C_GPIO_SFN(4), S3C_GPIO_PULL_NONE); 22 s3c_gpio_cfgrange_nopull(base, nr, S3C_GPIO_SFN(4));
23 23
24 for (; nr > 0; nr--, base++) 24 for (; nr > 0; nr--, base++)
25 s5p_gpio_set_drvstr(base, S5P_GPIO_DRVSTR_LV4); 25 s5p_gpio_set_drvstr(base, S5P_GPIO_DRVSTR_LV4);
@@ -49,8 +49,7 @@ void s5pc100_ide_setup_gpio(void)
49 s3c_gpio_cfgpin_range(S5PC100_GPK0(6), 2, S3C_GPIO_SFN(0)); 49 s3c_gpio_cfgpin_range(S5PC100_GPK0(6), 2, S3C_GPIO_SFN(0));
50 50
51 /* CF_OE, CF_WE */ 51 /* CF_OE, CF_WE */
52 s3c_gpio_cfgall_range(S5PC100_GPK1(6), 8, 52 s3c_gpio_cfgrange_nopull(S5PC100_GPK1(6), 8, S3C_GPIO_SFN(2));
53 S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE);
54 53
55 /* CF_CD */ 54 /* CF_CD */
56 s3c_gpio_cfgpin(S5PC100_GPK3(5), S3C_GPIO_SFN(2)); 55 s3c_gpio_cfgpin(S5PC100_GPK3(5), S3C_GPIO_SFN(2));