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authorKukjin Kim <kgene.kim@samsung.com>2014-07-01 18:51:50 -0400
committerKukjin Kim <kgene.kim@samsung.com>2014-07-12 18:35:11 -0400
commitb8529ec1c1b0984d2baeda450c28eeb40efc87fe (patch)
treef05e326930e2870cecc408ff42b7fe717dd0a51e /arch/arm/mach-s5pc100/include
parent8340417c666d7700e81ef72c863d8b3c0ca797fa (diff)
ARM: S5PC100: no more support S5PC100 SoC
This patch removes supporting codes for s5pc100 because no more used now. [jason@lakedaemon.net: for drivers/irqchip/Kconfig] Acked-by: Jason Cooper <jason@lakedaemon.net> Acked-by: Arnd Bergmann <arnd@arndb.de> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s5pc100/include')
-rw-r--r--arch/arm/mach-s5pc100/include/mach/debug-macro.S39
-rw-r--r--arch/arm/mach-s5pc100/include/mach/dma.h26
-rw-r--r--arch/arm/mach-s5pc100/include/mach/entry-macro.S19
-rw-r--r--arch/arm/mach-s5pc100/include/mach/gpio.h144
-rw-r--r--arch/arm/mach-s5pc100/include/mach/hardware.h14
-rw-r--r--arch/arm/mach-s5pc100/include/mach/irqs.h115
-rw-r--r--arch/arm/mach-s5pc100/include/mach/map.h137
-rw-r--r--arch/arm/mach-s5pc100/include/mach/regs-clock.h80
-rw-r--r--arch/arm/mach-s5pc100/include/mach/regs-gpio.h38
-rw-r--r--arch/arm/mach-s5pc100/include/mach/regs-irq.h18
10 files changed, 0 insertions, 630 deletions
diff --git a/arch/arm/mach-s5pc100/include/mach/debug-macro.S b/arch/arm/mach-s5pc100/include/mach/debug-macro.S
deleted file mode 100644
index 22c23859e45e..000000000000
--- a/arch/arm/mach-s5pc100/include/mach/debug-macro.S
+++ /dev/null
@@ -1,39 +0,0 @@
1/* arch/arm/mach-s5pc100/include/mach/debug-macro.S
2 *
3 * Copyright 2009 Samsung Electronics Co.
4 * Byungho Min <bhmin@samsung.com>
5 *
6 *
7 * Based on mach-s3c6400/include/mach/debug-macro.S
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14/* pull in the relevant register and map files. */
15
16#include <linux/serial_s3c.h>
17#include <mach/map.h>
18
19 /* note, for the boot process to work we have to keep the UART
20 * virtual address aligned to an 1MiB boundary for the L1
21 * mapping the head code makes. We keep the UART virtual address
22 * aligned and add in the offset when we load the value here.
23 */
24
25 .macro addruart, rp, rv, tmp
26 ldr \rp, = S3C_PA_UART
27 ldr \rv, = S3C_VA_UART
28#if CONFIG_DEBUG_S3C_UART != 0
29 add \rp, \rp, #(0x400 * CONFIG_DEBUG_S3C_UART)
30 add \rv, \rv, #(0x400 * CONFIG_DEBUG_S3C_UART)
31#endif
32 .endm
33
34/* include the reset of the code which will do the work, we're only
35 * compiling for a single cpu processor type so the default of s3c2440
36 * will be fine with us.
37 */
38
39#include <debug/samsung.S>
diff --git a/arch/arm/mach-s5pc100/include/mach/dma.h b/arch/arm/mach-s5pc100/include/mach/dma.h
deleted file mode 100644
index 201842a3769e..000000000000
--- a/arch/arm/mach-s5pc100/include/mach/dma.h
+++ /dev/null
@@ -1,26 +0,0 @@
1/*
2 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
3 * Jaswinder Singh <jassi.brar@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 */
19
20#ifndef __MACH_DMA_H
21#define __MACH_DMA_H
22
23/* This platform uses the common DMA API driver for PL330 */
24#include <plat/dma-pl330.h>
25
26#endif /* __MACH_DMA_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/entry-macro.S b/arch/arm/mach-s5pc100/include/mach/entry-macro.S
deleted file mode 100644
index bad0700457db..000000000000
--- a/arch/arm/mach-s5pc100/include/mach/entry-macro.S
+++ /dev/null
@@ -1,19 +0,0 @@
1/* arch/arm/mach-s5pc100/include/mach/entry-macro.S
2 *
3 * Copyright 2009 Samsung Electronics Co.
4 * Byungho Min <bhmin@samsung.com>
5 *
6 * Based on mach-s3c6400/include/mach/entry-macro.S
7 *
8 * Low-level IRQ helper macros for the Samsung S5PC1XX series
9 *
10 * This file is licensed under the terms of the GNU General Public
11 * License version 2. This program is licensed "as is" without any
12 * warranty of any kind, whether express or implied.
13*/
14
15 .macro get_irqnr_preamble, base, tmp
16 .endm
17
18 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
19 .endm
diff --git a/arch/arm/mach-s5pc100/include/mach/gpio.h b/arch/arm/mach-s5pc100/include/mach/gpio.h
deleted file mode 100644
index 5e1a924b595f..000000000000
--- a/arch/arm/mach-s5pc100/include/mach/gpio.h
+++ /dev/null
@@ -1,144 +0,0 @@
1/* arch/arm/mach-s5pc100/include/mach/gpio.h
2 *
3 * Copyright 2009 Samsung Electronics Co.
4 * Byungho Min <bhmin@samsung.com>
5 *
6 * S5PC100 - GPIO lib support
7 *
8 * Base on mach-s3c6400/include/mach/gpio.h
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#ifndef __ASM_ARCH_GPIO_H
16#define __ASM_ARCH_GPIO_H __FILE__
17
18/* GPIO bank sizes */
19#define S5PC100_GPIO_A0_NR (8)
20#define S5PC100_GPIO_A1_NR (5)
21#define S5PC100_GPIO_B_NR (8)
22#define S5PC100_GPIO_C_NR (5)
23#define S5PC100_GPIO_D_NR (7)
24#define S5PC100_GPIO_E0_NR (8)
25#define S5PC100_GPIO_E1_NR (6)
26#define S5PC100_GPIO_F0_NR (8)
27#define S5PC100_GPIO_F1_NR (8)
28#define S5PC100_GPIO_F2_NR (8)
29#define S5PC100_GPIO_F3_NR (4)
30#define S5PC100_GPIO_G0_NR (8)
31#define S5PC100_GPIO_G1_NR (3)
32#define S5PC100_GPIO_G2_NR (7)
33#define S5PC100_GPIO_G3_NR (7)
34#define S5PC100_GPIO_H0_NR (8)
35#define S5PC100_GPIO_H1_NR (8)
36#define S5PC100_GPIO_H2_NR (8)
37#define S5PC100_GPIO_H3_NR (8)
38#define S5PC100_GPIO_I_NR (8)
39#define S5PC100_GPIO_J0_NR (8)
40#define S5PC100_GPIO_J1_NR (5)
41#define S5PC100_GPIO_J2_NR (8)
42#define S5PC100_GPIO_J3_NR (8)
43#define S5PC100_GPIO_J4_NR (4)
44#define S5PC100_GPIO_K0_NR (8)
45#define S5PC100_GPIO_K1_NR (6)
46#define S5PC100_GPIO_K2_NR (8)
47#define S5PC100_GPIO_K3_NR (8)
48#define S5PC100_GPIO_L0_NR (8)
49#define S5PC100_GPIO_L1_NR (8)
50#define S5PC100_GPIO_L2_NR (8)
51#define S5PC100_GPIO_L3_NR (8)
52#define S5PC100_GPIO_L4_NR (8)
53
54/* GPIO bank numbes */
55
56/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
57 * space for debugging purposes so that any accidental
58 * change from one gpio bank to another can be caught.
59*/
60
61#define S5PC100_GPIO_NEXT(__gpio) \
62 ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
63
64enum s5p_gpio_number {
65 S5PC100_GPIO_A0_START = 0,
66 S5PC100_GPIO_A1_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_A0),
67 S5PC100_GPIO_B_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_A1),
68 S5PC100_GPIO_C_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_B),
69 S5PC100_GPIO_D_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_C),
70 S5PC100_GPIO_E0_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_D),
71 S5PC100_GPIO_E1_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_E0),
72 S5PC100_GPIO_F0_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_E1),
73 S5PC100_GPIO_F1_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_F0),
74 S5PC100_GPIO_F2_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_F1),
75 S5PC100_GPIO_F3_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_F2),
76 S5PC100_GPIO_G0_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_F3),
77 S5PC100_GPIO_G1_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_G0),
78 S5PC100_GPIO_G2_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_G1),
79 S5PC100_GPIO_G3_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_G2),
80 S5PC100_GPIO_H0_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_G3),
81 S5PC100_GPIO_H1_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_H0),
82 S5PC100_GPIO_H2_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_H1),
83 S5PC100_GPIO_H3_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_H2),
84 S5PC100_GPIO_I_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_H3),
85 S5PC100_GPIO_J0_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_I),
86 S5PC100_GPIO_J1_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_J0),
87 S5PC100_GPIO_J2_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_J1),
88 S5PC100_GPIO_J3_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_J2),
89 S5PC100_GPIO_J4_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_J3),
90 S5PC100_GPIO_K0_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_J4),
91 S5PC100_GPIO_K1_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_K0),
92 S5PC100_GPIO_K2_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_K1),
93 S5PC100_GPIO_K3_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_K2),
94 S5PC100_GPIO_L0_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_K3),
95 S5PC100_GPIO_L1_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_L0),
96 S5PC100_GPIO_L2_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_L1),
97 S5PC100_GPIO_L3_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_L2),
98 S5PC100_GPIO_L4_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_L3),
99 S5PC100_GPIO_END = S5PC100_GPIO_NEXT(S5PC100_GPIO_L4),
100};
101
102/* S5PC100 GPIO number definitions. */
103#define S5PC100_GPA0(_nr) (S5PC100_GPIO_A0_START + (_nr))
104#define S5PC100_GPA1(_nr) (S5PC100_GPIO_A1_START + (_nr))
105#define S5PC100_GPB(_nr) (S5PC100_GPIO_B_START + (_nr))
106#define S5PC100_GPC(_nr) (S5PC100_GPIO_C_START + (_nr))
107#define S5PC100_GPD(_nr) (S5PC100_GPIO_D_START + (_nr))
108#define S5PC100_GPE0(_nr) (S5PC100_GPIO_E0_START + (_nr))
109#define S5PC100_GPE1(_nr) (S5PC100_GPIO_E1_START + (_nr))
110#define S5PC100_GPF0(_nr) (S5PC100_GPIO_F0_START + (_nr))
111#define S5PC100_GPF1(_nr) (S5PC100_GPIO_F1_START + (_nr))
112#define S5PC100_GPF2(_nr) (S5PC100_GPIO_F2_START + (_nr))
113#define S5PC100_GPF3(_nr) (S5PC100_GPIO_F3_START + (_nr))
114#define S5PC100_GPG0(_nr) (S5PC100_GPIO_G0_START + (_nr))
115#define S5PC100_GPG1(_nr) (S5PC100_GPIO_G1_START + (_nr))
116#define S5PC100_GPG2(_nr) (S5PC100_GPIO_G2_START + (_nr))
117#define S5PC100_GPG3(_nr) (S5PC100_GPIO_G3_START + (_nr))
118#define S5PC100_GPH0(_nr) (S5PC100_GPIO_H0_START + (_nr))
119#define S5PC100_GPH1(_nr) (S5PC100_GPIO_H1_START + (_nr))
120#define S5PC100_GPH2(_nr) (S5PC100_GPIO_H2_START + (_nr))
121#define S5PC100_GPH3(_nr) (S5PC100_GPIO_H3_START + (_nr))
122#define S5PC100_GPI(_nr) (S5PC100_GPIO_I_START + (_nr))
123#define S5PC100_GPJ0(_nr) (S5PC100_GPIO_J0_START + (_nr))
124#define S5PC100_GPJ1(_nr) (S5PC100_GPIO_J1_START + (_nr))
125#define S5PC100_GPJ2(_nr) (S5PC100_GPIO_J2_START + (_nr))
126#define S5PC100_GPJ3(_nr) (S5PC100_GPIO_J3_START + (_nr))
127#define S5PC100_GPJ4(_nr) (S5PC100_GPIO_J4_START + (_nr))
128#define S5PC100_GPK0(_nr) (S5PC100_GPIO_K0_START + (_nr))
129#define S5PC100_GPK1(_nr) (S5PC100_GPIO_K1_START + (_nr))
130#define S5PC100_GPK2(_nr) (S5PC100_GPIO_K2_START + (_nr))
131#define S5PC100_GPK3(_nr) (S5PC100_GPIO_K3_START + (_nr))
132#define S5PC100_GPL0(_nr) (S5PC100_GPIO_L0_START + (_nr))
133#define S5PC100_GPL1(_nr) (S5PC100_GPIO_L1_START + (_nr))
134#define S5PC100_GPL2(_nr) (S5PC100_GPIO_L2_START + (_nr))
135#define S5PC100_GPL3(_nr) (S5PC100_GPIO_L3_START + (_nr))
136#define S5PC100_GPL4(_nr) (S5PC100_GPIO_L4_START + (_nr))
137
138/* It used the end of the S5PC100 gpios */
139#define S3C_GPIO_END S5PC100_GPIO_END
140
141/* define the number of gpios we need to the one after the MP04() range */
142#define ARCH_NR_GPIOS (S5PC100_GPIO_END + 1)
143
144#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/hardware.h b/arch/arm/mach-s5pc100/include/mach/hardware.h
deleted file mode 100644
index 6b38618c2fd9..000000000000
--- a/arch/arm/mach-s5pc100/include/mach/hardware.h
+++ /dev/null
@@ -1,14 +0,0 @@
1/* linux/arch/arm/mach-s5pc100/include/mach/hardware.h
2 *
3 * Copyright 2009 Samsung Electronics Co.
4 * Byungho Min <bhmin@samsung.com>
5 *
6 * S5PC100 - Hardware support
7 */
8
9#ifndef __ASM_ARCH_HARDWARE_H
10#define __ASM_ARCH_HARDWARE_H __FILE__
11
12/* currently nothing here, placeholder */
13
14#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/irqs.h b/arch/arm/mach-s5pc100/include/mach/irqs.h
deleted file mode 100644
index d2eb4757381f..000000000000
--- a/arch/arm/mach-s5pc100/include/mach/irqs.h
+++ /dev/null
@@ -1,115 +0,0 @@
1/* linux/arch/arm/mach-s5pc100/include/mach/irqs.h
2 *
3 * Copyright 2009 Samsung Electronics Co.
4 * Byungho Min <bhmin@samsung.com>
5 *
6 * S5PC100 - IRQ definitions
7 */
8
9#ifndef __ASM_ARCH_IRQS_H
10#define __ASM_ARCH_IRQS_H __FILE__
11
12#include <plat/irqs.h>
13
14/* VIC0: system, DMA, timer */
15#define IRQ_EINT16_31 S5P_IRQ_VIC0(16)
16#define IRQ_BATF S5P_IRQ_VIC0(17)
17#define IRQ_MDMA S5P_IRQ_VIC0(18)
18#define IRQ_PDMA0 S5P_IRQ_VIC0(19)
19#define IRQ_PDMA1 S5P_IRQ_VIC0(20)
20#define IRQ_TIMER0_VIC S5P_IRQ_VIC0(21)
21#define IRQ_TIMER1_VIC S5P_IRQ_VIC0(22)
22#define IRQ_TIMER2_VIC S5P_IRQ_VIC0(23)
23#define IRQ_TIMER3_VIC S5P_IRQ_VIC0(24)
24#define IRQ_TIMER4_VIC S5P_IRQ_VIC0(25)
25#define IRQ_SYSTIMER S5P_IRQ_VIC0(26)
26#define IRQ_WDT S5P_IRQ_VIC0(27)
27#define IRQ_RTC_ALARM S5P_IRQ_VIC0(28)
28#define IRQ_RTC_TIC S5P_IRQ_VIC0(29)
29#define IRQ_GPIOINT S5P_IRQ_VIC0(30)
30
31/* VIC1: ARM, power, memory, connectivity */
32#define IRQ_PMU S5P_IRQ_VIC1(0)
33#define IRQ_CORTEX1 S5P_IRQ_VIC1(1)
34#define IRQ_CORTEX2 S5P_IRQ_VIC1(2)
35#define IRQ_CORTEX3 S5P_IRQ_VIC1(3)
36#define IRQ_CORTEX4 S5P_IRQ_VIC1(4)
37#define IRQ_IEMAPC S5P_IRQ_VIC1(5)
38#define IRQ_IEMIEC S5P_IRQ_VIC1(6)
39#define IRQ_ONENAND S5P_IRQ_VIC1(7)
40#define IRQ_NFC S5P_IRQ_VIC1(8)
41#define IRQ_CFCON S5P_IRQ_VIC1(9)
42#define IRQ_UART0 S5P_IRQ_VIC1(10)
43#define IRQ_UART1 S5P_IRQ_VIC1(11)
44#define IRQ_UART2 S5P_IRQ_VIC1(12)
45#define IRQ_UART3 S5P_IRQ_VIC1(13)
46#define IRQ_IIC S5P_IRQ_VIC1(14)
47#define IRQ_SPI0 S5P_IRQ_VIC1(15)
48#define IRQ_SPI1 S5P_IRQ_VIC1(16)
49#define IRQ_SPI2 S5P_IRQ_VIC1(17)
50#define IRQ_IRDA S5P_IRQ_VIC1(18)
51#define IRQ_IIC2 S5P_IRQ_VIC1(19)
52#define IRQ_IIC3 S5P_IRQ_VIC1(20)
53#define IRQ_HSIRX S5P_IRQ_VIC1(21)
54#define IRQ_HSITX S5P_IRQ_VIC1(22)
55#define IRQ_UHOST S5P_IRQ_VIC1(23)
56#define IRQ_OTG S5P_IRQ_VIC1(24)
57#define IRQ_MSM S5P_IRQ_VIC1(25)
58#define IRQ_HSMMC0 S5P_IRQ_VIC1(26)
59#define IRQ_HSMMC1 S5P_IRQ_VIC1(27)
60#define IRQ_HSMMC2 S5P_IRQ_VIC1(28)
61#define IRQ_MIPICSI S5P_IRQ_VIC1(29)
62#define IRQ_MIPIDSI S5P_IRQ_VIC1(30)
63
64/* VIC2: multimedia, audio, security */
65#define IRQ_LCD0 S5P_IRQ_VIC2(0)
66#define IRQ_LCD1 S5P_IRQ_VIC2(1)
67#define IRQ_LCD2 S5P_IRQ_VIC2(2)
68#define IRQ_LCD3 S5P_IRQ_VIC2(3)
69#define IRQ_ROTATOR S5P_IRQ_VIC2(4)
70#define IRQ_FIMC0 S5P_IRQ_VIC2(5)
71#define IRQ_FIMC1 S5P_IRQ_VIC2(6)
72#define IRQ_FIMC2 S5P_IRQ_VIC2(7)
73#define IRQ_JPEG S5P_IRQ_VIC2(8)
74#define IRQ_2D S5P_IRQ_VIC2(9)
75#define IRQ_3D S5P_IRQ_VIC2(10)
76#define IRQ_MIXER S5P_IRQ_VIC2(11)
77#define IRQ_HDMI S5P_IRQ_VIC2(12)
78#define IRQ_IIC1 S5P_IRQ_VIC2(13)
79#define IRQ_MFC S5P_IRQ_VIC2(14)
80#define IRQ_TVENC S5P_IRQ_VIC2(15)
81#define IRQ_I2S0 S5P_IRQ_VIC2(16)
82#define IRQ_I2S1 S5P_IRQ_VIC2(17)
83#define IRQ_I2S2 S5P_IRQ_VIC2(18)
84#define IRQ_AC97 S5P_IRQ_VIC2(19)
85#define IRQ_PCM0 S5P_IRQ_VIC2(20)
86#define IRQ_PCM1 S5P_IRQ_VIC2(21)
87#define IRQ_SPDIF S5P_IRQ_VIC2(22)
88#define IRQ_ADC S5P_IRQ_VIC2(23)
89#define IRQ_PENDN S5P_IRQ_VIC2(24)
90#define IRQ_TC IRQ_PENDN
91#define IRQ_KEYPAD S5P_IRQ_VIC2(25)
92#define IRQ_CG S5P_IRQ_VIC2(26)
93#define IRQ_SEC S5P_IRQ_VIC2(27)
94#define IRQ_SECRX S5P_IRQ_VIC2(28)
95#define IRQ_SECTX S5P_IRQ_VIC2(29)
96#define IRQ_SDMIRQ S5P_IRQ_VIC2(30)
97#define IRQ_SDMFIQ S5P_IRQ_VIC2(31)
98#define IRQ_VIC_END S5P_IRQ_VIC2(31)
99
100#define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0))
101#define S5P_EINT_BASE2 (IRQ_VIC_END + 1)
102
103/* GPIO interrupt */
104#define S5P_GPIOINT_BASE (IRQ_EINT(31) + 1)
105#define S5P_GPIOINT_GROUP_MAXNR 21
106
107/* Set the default NR_IRQS */
108#define NR_IRQS (IRQ_EINT(31) + S5P_GPIOINT_COUNT + 1)
109
110/* Compatibility */
111#define IRQ_LCD_FIFO IRQ_LCD0
112#define IRQ_LCD_VSYNC IRQ_LCD1
113#define IRQ_LCD_SYSTEM IRQ_LCD2
114
115#endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/map.h b/arch/arm/mach-s5pc100/include/mach/map.h
deleted file mode 100644
index 2550b6112b82..000000000000
--- a/arch/arm/mach-s5pc100/include/mach/map.h
+++ /dev/null
@@ -1,137 +0,0 @@
1/* linux/arch/arm/mach-s5pc100/include/mach/map.h
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Copyright 2009 Samsung Electronics Co.
7 * Byungho Min <bhmin@samsung.com>
8 *
9 * S5PC100 - Memory map definitions
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14*/
15
16#ifndef __ASM_ARCH_MAP_H
17#define __ASM_ARCH_MAP_H __FILE__
18
19#include <plat/map-base.h>
20#include <plat/map-s5p.h>
21
22#define S5PC100_PA_SDRAM 0x20000000
23
24#define S5PC100_PA_ONENAND 0xE7100000
25#define S5PC100_PA_ONENAND_BUF 0xB0000000
26
27#define S5PC100_PA_CHIPID 0xE0000000
28
29#define S5PC100_PA_SYSCON 0xE0100000
30
31#define S5PC100_PA_OTHERS 0xE0200000
32
33#define S5PC100_PA_GPIO 0xE0300000
34
35#define S5PC100_PA_VIC0 0xE4000000
36#define S5PC100_PA_VIC1 0xE4100000
37#define S5PC100_PA_VIC2 0xE4200000
38
39#define S5PC100_PA_SROMC 0xE7000000
40
41#define S5PC100_PA_CFCON 0xE7800000
42
43#define S5PC100_PA_MDMA 0xE8100000
44#define S5PC100_PA_PDMA0 0xE9000000
45#define S5PC100_PA_PDMA1 0xE9200000
46
47#define S5PC100_PA_TIMER 0xEA000000
48#define S5PC100_PA_SYSTIMER 0xEA100000
49#define S5PC100_PA_WATCHDOG 0xEA200000
50#define S5PC100_PA_RTC 0xEA300000
51
52#define S5PC100_PA_UART 0xEC000000
53
54#define S5PC100_PA_IIC0 0xEC100000
55#define S5PC100_PA_IIC1 0xEC200000
56
57#define S5PC100_PA_SPI0 0xEC300000
58#define S5PC100_PA_SPI1 0xEC400000
59#define S5PC100_PA_SPI2 0xEC500000
60
61#define S5PC100_PA_USB_HSOTG 0xED200000
62#define S5PC100_PA_USB_HSPHY 0xED300000
63
64#define S5PC100_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000))
65
66#define S5PC100_PA_FB 0xEE000000
67
68#define S5PC100_PA_FIMC0 0xEE200000
69#define S5PC100_PA_FIMC1 0xEE300000
70#define S5PC100_PA_FIMC2 0xEE400000
71
72#define S5PC100_PA_I2S0 0xF2000000
73#define S5PC100_PA_I2S1 0xF2100000
74#define S5PC100_PA_I2S2 0xF2200000
75
76#define S5PC100_PA_AC97 0xF2300000
77
78#define S5PC100_PA_PCM0 0xF2400000
79#define S5PC100_PA_PCM1 0xF2500000
80
81#define S5PC100_PA_SPDIF 0xF2600000
82
83#define S5PC100_PA_TSADC 0xF3000000
84
85#define S5PC100_PA_KEYPAD 0xF3100000
86
87/* Compatibiltiy Defines */
88
89#define S3C_PA_FB S5PC100_PA_FB
90#define S3C_PA_HSMMC0 S5PC100_PA_HSMMC(0)
91#define S3C_PA_HSMMC1 S5PC100_PA_HSMMC(1)
92#define S3C_PA_HSMMC2 S5PC100_PA_HSMMC(2)
93#define S3C_PA_IIC S5PC100_PA_IIC0
94#define S3C_PA_IIC1 S5PC100_PA_IIC1
95#define S3C_PA_KEYPAD S5PC100_PA_KEYPAD
96#define S3C_PA_ONENAND S5PC100_PA_ONENAND
97#define S3C_PA_ONENAND_BUF S5PC100_PA_ONENAND_BUF
98#define S3C_PA_RTC S5PC100_PA_RTC
99#define S3C_PA_TSADC S5PC100_PA_TSADC
100#define S3C_PA_USB_HSOTG S5PC100_PA_USB_HSOTG
101#define S3C_PA_USB_HSPHY S5PC100_PA_USB_HSPHY
102#define S3C_PA_WDT S5PC100_PA_WATCHDOG
103#define S3C_PA_SPI0 S5PC100_PA_SPI0
104#define S3C_PA_SPI1 S5PC100_PA_SPI1
105#define S3C_PA_SPI2 S5PC100_PA_SPI2
106
107#define S5P_PA_CHIPID S5PC100_PA_CHIPID
108#define S5P_PA_FIMC0 S5PC100_PA_FIMC0
109#define S5P_PA_FIMC1 S5PC100_PA_FIMC1
110#define S5P_PA_FIMC2 S5PC100_PA_FIMC2
111#define S5P_PA_SDRAM S5PC100_PA_SDRAM
112#define S5P_PA_SROMC S5PC100_PA_SROMC
113#define S5P_PA_SYSCON S5PC100_PA_SYSCON
114#define S5P_PA_TIMER S5PC100_PA_TIMER
115
116#define SAMSUNG_PA_ADC S5PC100_PA_TSADC
117#define SAMSUNG_PA_CFCON S5PC100_PA_CFCON
118#define SAMSUNG_PA_KEYPAD S5PC100_PA_KEYPAD
119#define SAMSUNG_PA_TIMER S5PC100_PA_TIMER
120
121#define S5PC100_VA_OTHERS (S3C_VA_SYS + 0x10000)
122
123#define S3C_SZ_ONENAND_BUF (SZ_256M - SZ_32M)
124
125/* UART */
126
127#define S3C_PA_UART S5PC100_PA_UART
128
129#define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET))
130#define S5P_PA_UART0 S5P_PA_UART(0)
131#define S5P_PA_UART1 S5P_PA_UART(1)
132#define S5P_PA_UART2 S5P_PA_UART(2)
133#define S5P_PA_UART3 S5P_PA_UART(3)
134
135#define S5P_SZ_UART SZ_256
136
137#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-clock.h b/arch/arm/mach-s5pc100/include/mach/regs-clock.h
deleted file mode 100644
index bc92da2e0ba2..000000000000
--- a/arch/arm/mach-s5pc100/include/mach/regs-clock.h
+++ /dev/null
@@ -1,80 +0,0 @@
1/* linux/arch/arm/mach-s5pc100/include/mach/regs-clock.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5PC100 - Clock register definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_REGS_CLOCK_H
14#define __ASM_ARCH_REGS_CLOCK_H __FILE__
15
16#include <mach/map.h>
17
18#define S5P_CLKREG(x) (S3C_VA_SYS + (x))
19
20#define S5PC100_REG_OTHERS(x) (S5PC100_VA_OTHERS + (x))
21
22#define S5P_APLL_LOCK S5P_CLKREG(0x00)
23#define S5P_MPLL_LOCK S5P_CLKREG(0x04)
24#define S5P_EPLL_LOCK S5P_CLKREG(0x08)
25#define S5P_HPLL_LOCK S5P_CLKREG(0x0C)
26
27#define S5P_APLL_CON S5P_CLKREG(0x100)
28#define S5P_MPLL_CON S5P_CLKREG(0x104)
29#define S5P_EPLL_CON S5P_CLKREG(0x108)
30#define S5P_HPLL_CON S5P_CLKREG(0x10C)
31
32#define S5P_CLK_SRC0 S5P_CLKREG(0x200)
33#define S5P_CLK_SRC1 S5P_CLKREG(0x204)
34#define S5P_CLK_SRC2 S5P_CLKREG(0x208)
35#define S5P_CLK_SRC3 S5P_CLKREG(0x20C)
36
37#define S5P_CLK_DIV0 S5P_CLKREG(0x300)
38#define S5P_CLK_DIV1 S5P_CLKREG(0x304)
39#define S5P_CLK_DIV2 S5P_CLKREG(0x308)
40#define S5P_CLK_DIV3 S5P_CLKREG(0x30C)
41#define S5P_CLK_DIV4 S5P_CLKREG(0x310)
42
43#define S5P_CLK_OUT S5P_CLKREG(0x400)
44
45#define S5P_CLKGATE_D00 S5P_CLKREG(0x500)
46#define S5P_CLKGATE_D01 S5P_CLKREG(0x504)
47#define S5P_CLKGATE_D02 S5P_CLKREG(0x508)
48
49#define S5P_CLKGATE_D10 S5P_CLKREG(0x520)
50#define S5P_CLKGATE_D11 S5P_CLKREG(0x524)
51#define S5P_CLKGATE_D12 S5P_CLKREG(0x528)
52#define S5P_CLKGATE_D13 S5P_CLKREG(0x52C)
53#define S5P_CLKGATE_D14 S5P_CLKREG(0x530)
54#define S5P_CLKGATE_D15 S5P_CLKREG(0x534)
55
56#define S5P_CLKGATE_D20 S5P_CLKREG(0x540)
57
58#define S5P_CLKGATE_SCLK0 S5P_CLKREG(0x560)
59#define S5P_CLKGATE_SCLK1 S5P_CLKREG(0x564)
60
61/* CLKDIV0 */
62#define S5P_CLKDIV0_D0_MASK (0x7<<8)
63#define S5P_CLKDIV0_D0_SHIFT (8)
64#define S5P_CLKDIV0_PCLKD0_MASK (0x7<<12)
65#define S5P_CLKDIV0_PCLKD0_SHIFT (12)
66
67/* CLKDIV1 */
68#define S5P_CLKDIV1_D1_MASK (0x7<<12)
69#define S5P_CLKDIV1_D1_SHIFT (12)
70#define S5P_CLKDIV1_PCLKD1_MASK (0x7<<16)
71#define S5P_CLKDIV1_PCLKD1_SHIFT (16)
72
73#define S5PC100_SWRESET S5PC100_REG_OTHERS(0x000)
74#define S5PC100_MEM_SYS_CFG S5PC100_REG_OTHERS(0x200)
75
76#define S5PC100_SWRESET_RESETVAL 0xc100
77
78#define MEM_SYS_CFG_EBI_FIX_PRI_CFCON 0x30
79
80#endif /* __ASM_ARCH_REGS_CLOCK_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-gpio.h b/arch/arm/mach-s5pc100/include/mach/regs-gpio.h
deleted file mode 100644
index 0bf73209ec7b..000000000000
--- a/arch/arm/mach-s5pc100/include/mach/regs-gpio.h
+++ /dev/null
@@ -1,38 +0,0 @@
1/* linux/arch/arm/plat-s5pc100/include/plat/regs-gpio.h
2 *
3 * Copyright 2009 Samsung Electronics Co.
4 * Byungho Min <bhmin@samsung.com>
5 *
6 * S5PC100 - GPIO register definitions
7 */
8
9#ifndef __ASM_MACH_S5PC100_REGS_GPIO_H
10#define __ASM_MACH_S5PC100_REGS_GPIO_H __FILE__
11
12#include <mach/map.h>
13
14#define S5PC100EINT30CON (S5P_VA_GPIO + 0xE00)
15#define S5P_EINT_CON(x) (S5PC100EINT30CON + ((x) * 0x4))
16
17#define S5PC100EINT30FLTCON0 (S5P_VA_GPIO + 0xE80)
18#define S5P_EINT_FLTCON(x) (S5PC100EINT30FLTCON0 + ((x) * 0x4))
19
20#define S5PC100EINT30MASK (S5P_VA_GPIO + 0xF00)
21#define S5P_EINT_MASK(x) (S5PC100EINT30MASK + ((x) * 0x4))
22
23#define S5PC100EINT30PEND (S5P_VA_GPIO + 0xF40)
24#define S5P_EINT_PEND(x) (S5PC100EINT30PEND + ((x) * 0x4))
25
26#define EINT_REG_NR(x) (EINT_OFFSET(x) >> 3)
27
28#define eint_irq_to_bit(irq) (1 << (EINT_OFFSET(irq) & 0x7))
29
30#define EINT_MODE S3C_GPIO_SFN(0x2)
31
32#define EINT_GPIO_0(x) S5PC100_GPH0(x)
33#define EINT_GPIO_1(x) S5PC100_GPH1(x)
34#define EINT_GPIO_2(x) S5PC100_GPH2(x)
35#define EINT_GPIO_3(x) S5PC100_GPH3(x)
36
37#endif /* __ASM_MACH_S5PC100_REGS_GPIO_H */
38
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-irq.h b/arch/arm/mach-s5pc100/include/mach/regs-irq.h
deleted file mode 100644
index 761627897f30..000000000000
--- a/arch/arm/mach-s5pc100/include/mach/regs-irq.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/* linux/arch/arm/mach-s5pc100/include/mach/regs-irq.h
2 *
3 * Copyright 2009 Samsung Electronics Co.
4 * Byungho Min <bhmin@samsung.com>
5 *
6 * S5PC100 - IRQ register definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_REGS_IRQ_H
14#define __ASM_ARCH_REGS_IRQ_H __FILE__
15
16#include <mach/map.h>
17
18#endif /* __ASM_ARCH_REGS_IRQ_H */
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-17 04:36:06 -0500