diff options
| author | Kukjin Kim <kgene.kim@samsung.com> | 2010-10-01 08:32:52 -0400 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2010-10-25 03:02:15 -0400 |
| commit | 2ad530d2e76f24cb8c13f88067cb57473a0af202 (patch) | |
| tree | 8998f67862742da4c0ee62e6fd1299ad3d1a36b1 /arch/arm/mach-s5pc100/include | |
| parent | 4d9374f39e40f7c7fc15acbfe01dceeee850509f (diff) | |
ARM: S5PC100: Cleanup the GPIOlib code
This patch clean up the GPIO code and removes useless GPIO addresses.
It can be calculated with offset, the 'base' member of s3c_gpio_chip
is also initialized in the init function.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s5pc100/include')
| -rw-r--r-- | arch/arm/mach-s5pc100/include/mach/regs-gpio.h | 37 |
1 files changed, 0 insertions, 37 deletions
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-gpio.h b/arch/arm/mach-s5pc100/include/mach/regs-gpio.h index 8c47536b117b..0bf73209ec7b 100644 --- a/arch/arm/mach-s5pc100/include/mach/regs-gpio.h +++ b/arch/arm/mach-s5pc100/include/mach/regs-gpio.h | |||
| @@ -11,43 +11,6 @@ | |||
| 11 | 11 | ||
| 12 | #include <mach/map.h> | 12 | #include <mach/map.h> |
| 13 | 13 | ||
| 14 | /* S5PC100 */ | ||
| 15 | #define S5PC100_GPIO_BASE S5P_VA_GPIO | ||
| 16 | #define S5PC100_GPA0_BASE (S5PC100_GPIO_BASE + 0x0000) | ||
| 17 | #define S5PC100_GPA1_BASE (S5PC100_GPIO_BASE + 0x0020) | ||
| 18 | #define S5PC100_GPB_BASE (S5PC100_GPIO_BASE + 0x0040) | ||
| 19 | #define S5PC100_GPC_BASE (S5PC100_GPIO_BASE + 0x0060) | ||
| 20 | #define S5PC100_GPD_BASE (S5PC100_GPIO_BASE + 0x0080) | ||
| 21 | #define S5PC100_GPE0_BASE (S5PC100_GPIO_BASE + 0x00A0) | ||
| 22 | #define S5PC100_GPE1_BASE (S5PC100_GPIO_BASE + 0x00C0) | ||
| 23 | #define S5PC100_GPF0_BASE (S5PC100_GPIO_BASE + 0x00E0) | ||
| 24 | #define S5PC100_GPF1_BASE (S5PC100_GPIO_BASE + 0x0100) | ||
| 25 | #define S5PC100_GPF2_BASE (S5PC100_GPIO_BASE + 0x0120) | ||
| 26 | #define S5PC100_GPF3_BASE (S5PC100_GPIO_BASE + 0x0140) | ||
| 27 | #define S5PC100_GPG0_BASE (S5PC100_GPIO_BASE + 0x0160) | ||
| 28 | #define S5PC100_GPG1_BASE (S5PC100_GPIO_BASE + 0x0180) | ||
| 29 | #define S5PC100_GPG2_BASE (S5PC100_GPIO_BASE + 0x01A0) | ||
| 30 | #define S5PC100_GPG3_BASE (S5PC100_GPIO_BASE + 0x01C0) | ||
| 31 | #define S5PC100_GPH0_BASE (S5PC100_GPIO_BASE + 0x0C00) | ||
| 32 | #define S5PC100_GPH1_BASE (S5PC100_GPIO_BASE + 0x0C20) | ||
| 33 | #define S5PC100_GPH2_BASE (S5PC100_GPIO_BASE + 0x0C40) | ||
| 34 | #define S5PC100_GPH3_BASE (S5PC100_GPIO_BASE + 0x0C60) | ||
| 35 | #define S5PC100_GPI_BASE (S5PC100_GPIO_BASE + 0x01E0) | ||
| 36 | #define S5PC100_GPJ0_BASE (S5PC100_GPIO_BASE + 0x0200) | ||
| 37 | #define S5PC100_GPJ1_BASE (S5PC100_GPIO_BASE + 0x0220) | ||
| 38 | #define S5PC100_GPJ2_BASE (S5PC100_GPIO_BASE + 0x0240) | ||
| 39 | #define S5PC100_GPJ3_BASE (S5PC100_GPIO_BASE + 0x0260) | ||
| 40 | #define S5PC100_GPJ4_BASE (S5PC100_GPIO_BASE + 0x0280) | ||
| 41 | #define S5PC100_GPK0_BASE (S5PC100_GPIO_BASE + 0x02A0) | ||
| 42 | #define S5PC100_GPK1_BASE (S5PC100_GPIO_BASE + 0x02C0) | ||
| 43 | #define S5PC100_GPK2_BASE (S5PC100_GPIO_BASE + 0x02E0) | ||
| 44 | #define S5PC100_GPK3_BASE (S5PC100_GPIO_BASE + 0x0300) | ||
| 45 | #define S5PC100_GPL0_BASE (S5PC100_GPIO_BASE + 0x0320) | ||
| 46 | #define S5PC100_GPL1_BASE (S5PC100_GPIO_BASE + 0x0340) | ||
| 47 | #define S5PC100_GPL2_BASE (S5PC100_GPIO_BASE + 0x0360) | ||
| 48 | #define S5PC100_GPL3_BASE (S5PC100_GPIO_BASE + 0x0380) | ||
| 49 | #define S5PC100_GPL4_BASE (S5PC100_GPIO_BASE + 0x03A0) | ||
| 50 | |||
| 51 | #define S5PC100EINT30CON (S5P_VA_GPIO + 0xE00) | 14 | #define S5PC100EINT30CON (S5P_VA_GPIO + 0xE00) |
| 52 | #define S5P_EINT_CON(x) (S5PC100EINT30CON + ((x) * 0x4)) | 15 | #define S5P_EINT_CON(x) (S5PC100EINT30CON + ((x) * 0x4)) |
| 53 | 16 | ||