diff options
author | Marek Szyprowski <m.szyprowski@samsung.com> | 2010-08-05 05:22:27 -0400 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2010-08-05 05:30:51 -0400 |
commit | aaeedff6b1f3cc8e2de0d2899c9ab2699a1ce817 (patch) | |
tree | 4858e4b5debe60a1bdaf2fa4666a3d526d58e546 /arch/arm/mach-s5pc100/clock.c | |
parent | fa9ce74255d9ed5bff4c69e005dcd3a529ad9f66 (diff) |
ARM: S5PC100: cleanup hsmmc clock definitions
This patch performs minor clocks cleanup for S5PC100 SoC. HSMMC special
clocks has been renamed back to sclk_mmc to match the common style of
clock names. This clock has been also added to sdhci clock source list.
The duplicate HCLK clock entry for sdhci-s3c has been disabled.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s5pc100/clock.c')
-rw-r--r-- | arch/arm/mach-s5pc100/clock.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-s5pc100/clock.c b/arch/arm/mach-s5pc100/clock.c index e1136f4ad3c2..084abd13b0a5 100644 --- a/arch/arm/mach-s5pc100/clock.c +++ b/arch/arm/mach-s5pc100/clock.c | |||
@@ -1078,7 +1078,7 @@ static struct clksrc_clk clksrcs[] = { | |||
1078 | .reg_div = { .reg = S5P_CLK_DIV3, .shift = 24, .size = 4 }, | 1078 | .reg_div = { .reg = S5P_CLK_DIV3, .shift = 24, .size = 4 }, |
1079 | }, { | 1079 | }, { |
1080 | .clk = { | 1080 | .clk = { |
1081 | .name = "mmc_bus", | 1081 | .name = "sclk_mmc", |
1082 | .id = 0, | 1082 | .id = 0, |
1083 | .ctrlbit = (1 << 12), | 1083 | .ctrlbit = (1 << 12), |
1084 | .enable = s5pc100_sclk1_ctrl, | 1084 | .enable = s5pc100_sclk1_ctrl, |
@@ -1089,7 +1089,7 @@ static struct clksrc_clk clksrcs[] = { | |||
1089 | .reg_div = { .reg = S5P_CLK_DIV3, .shift = 0, .size = 4 }, | 1089 | .reg_div = { .reg = S5P_CLK_DIV3, .shift = 0, .size = 4 }, |
1090 | }, { | 1090 | }, { |
1091 | .clk = { | 1091 | .clk = { |
1092 | .name = "mmc_bus", | 1092 | .name = "sclk_mmc", |
1093 | .id = 1, | 1093 | .id = 1, |
1094 | .ctrlbit = (1 << 13), | 1094 | .ctrlbit = (1 << 13), |
1095 | .enable = s5pc100_sclk1_ctrl, | 1095 | .enable = s5pc100_sclk1_ctrl, |
@@ -1100,7 +1100,7 @@ static struct clksrc_clk clksrcs[] = { | |||
1100 | .reg_div = { .reg = S5P_CLK_DIV3, .shift = 4, .size = 4 }, | 1100 | .reg_div = { .reg = S5P_CLK_DIV3, .shift = 4, .size = 4 }, |
1101 | }, { | 1101 | }, { |
1102 | .clk = { | 1102 | .clk = { |
1103 | .name = "mmc_bus", | 1103 | .name = "sclk_mmc", |
1104 | .id = 2, | 1104 | .id = 2, |
1105 | .ctrlbit = (1 << 14), | 1105 | .ctrlbit = (1 << 14), |
1106 | .enable = s5pc100_sclk1_ctrl, | 1106 | .enable = s5pc100_sclk1_ctrl, |