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authorKukjin Kim <kgene.kim@samsung.com>2011-10-04 07:20:08 -0400
committerKukjin Kim <kgene.kim@samsung.com>2011-10-04 07:20:08 -0400
commit86f82da586098f16d92b5637808c323f5455e935 (patch)
tree6397eb5550172b89d383254c7e4bca87ae4a8659 /arch/arm/mach-s5p64x0
parentdb3c94a7edc6b29f8d52ba5884dec6a15feeadad (diff)
parente90a0f3c460406d6a5a698016bc525c3e6968cb6 (diff)
Merge branch 'next-samsung-cleanup-2' into next-samsung-devel-2
Conflicts: arch/arm/plat-s5p/include/plat/pll.h
Diffstat (limited to 'arch/arm/mach-s5p64x0')
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/clkdev.h7
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/pwm-clock.h68
2 files changed, 0 insertions, 75 deletions
diff --git a/arch/arm/mach-s5p64x0/include/mach/clkdev.h b/arch/arm/mach-s5p64x0/include/mach/clkdev.h
deleted file mode 100644
index 7dffa83d23ff..000000000000
--- a/arch/arm/mach-s5p64x0/include/mach/clkdev.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef __MACH_CLKDEV_H__
2#define __MACH_CLKDEV_H__
3
4#define __clk_get(clk) ({ 1; })
5#define __clk_put(clk) do {} while (0)
6
7#endif
diff --git a/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h b/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h
deleted file mode 100644
index 19fff8b701c0..000000000000
--- a/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h
+++ /dev/null
@@ -1,68 +0,0 @@
1/* linux/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Copyright 2008 Openmoko, Inc.
7 * Copyright 2008 Simtec Electronics
8 * Ben Dooks <ben@simtec.co.uk>
9 * http://armlinux.simtec.co.uk/
10 *
11 * S5P64X0 - pwm clock and timer support
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16*/
17
18#ifndef __ASM_ARCH_PWMCLK_H
19#define __ASM_ARCH_PWMCLK_H __FILE__
20
21/**
22 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
23 * @tcfg: The timer TCFG1 register bits shifted down to 0.
24 *
25 * Return true if the given configuration from TCFG1 is a TCLK instead
26 * any of the TDIV clocks.
27 */
28static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
29{
30 return 0;
31}
32
33/**
34 * tcfg_to_divisor() - convert tcfg1 setting to a divisor
35 * @tcfg1: The tcfg1 setting, shifted down.
36 *
37 * Get the divisor value for the given tcfg1 setting. We assume the
38 * caller has already checked to see if this is not a TCLK source.
39 */
40static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
41{
42 return 1 << tcfg1;
43}
44
45/**
46 * pwm_tdiv_has_div1() - does the tdiv setting have a /1
47 *
48 * Return true if we have a /1 in the tdiv setting.
49 */
50static inline unsigned int pwm_tdiv_has_div1(void)
51{
52 return 1;
53}
54
55/**
56 * pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
57 * @div: The divisor to calculate the bit information for.
58 *
59 * Turn a divisor into the necessary bit field for TCFG1.
60 */
61static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
62{
63 return ilog2(div);
64}
65
66#define S3C_TCFG1_MUX_TCLK 0
67
68#endif /* __ASM_ARCH_PWMCLK_H */