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authorThomas Abraham <thomas.abraham@linaro.org>2012-03-24 12:28:48 -0400
committerFlorian Tobias Schandinat <FlorianSchandinat@gmx.de>2012-04-09 12:11:24 -0400
commit79d3c41ae444fb064cc8aab7cb249f577d6e0aae (patch)
tree3bb1e422478e9d0eb6065e56f7f9cafdb0a6d7e0 /arch/arm/mach-s3c64xx
parent884924be2a3368a3ac96587f347f9973c80140f6 (diff)
ARM: Samsung: Rework platform data of s3c-fb driver
For all the Samsung SoC based boards which have the platform data for s3c-fb driver, the 'default_win' element in the platform data is removed and the lcd panel video timing values are moved out of individual window configuration data. Acked-by: Jingoo Han <jg1.han@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: JeongHyeon Kim <jhkim@insignal.co.kr> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Heiko Stuebner <heiko@sntech.de> Cc: Ben Dooks <ben-linux@fluff.org> Cc: Kwangwoo Lee <kwangwoo.lee@gmail.com> Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: Peter Korsgaard <jacmet@sunsite.dk> Cc: Darius Augulis <augulis.darius@gmail.com> Cc: Maurus Cuelenaere <mcuelenaere@gmail.com> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
Diffstat (limited to 'arch/arm/mach-s3c64xx')
-rw-r--r--arch/arm/mach-s3c64xx/mach-anw6410.c25
-rw-r--r--arch/arm/mach-s3c64xx/mach-crag6410.c25
-rw-r--r--arch/arm/mach-s3c64xx/mach-hmt.c24
-rw-r--r--arch/arm/mach-s3c64xx/mach-mini6410.c54
-rw-r--r--arch/arm/mach-s3c64xx/mach-real6410.c52
-rw-r--r--arch/arm/mach-s3c64xx/mach-smartq5.c26
-rw-r--r--arch/arm/mach-s3c64xx/mach-smartq7.c26
-rw-r--r--arch/arm/mach-s3c64xx/mach-smdk6410.c25
8 files changed, 148 insertions, 109 deletions
diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c
index b86f2779e4e6..58fd0e3ad2b4 100644
--- a/arch/arm/mach-s3c64xx/mach-anw6410.c
+++ b/arch/arm/mach-s3c64xx/mach-anw6410.c
@@ -134,24 +134,27 @@ static struct platform_device anw6410_lcd_powerdev = {
134}; 134};
135 135
136static struct s3c_fb_pd_win anw6410_fb_win0 = { 136static struct s3c_fb_pd_win anw6410_fb_win0 = {
137 /* this is to ensure we use win0 */
138 .win_mode = {
139 .left_margin = 8,
140 .right_margin = 13,
141 .upper_margin = 7,
142 .lower_margin = 5,
143 .hsync_len = 3,
144 .vsync_len = 1,
145 .xres = 800,
146 .yres = 480,
147 },
148 .max_bpp = 32, 137 .max_bpp = 32,
149 .default_bpp = 16, 138 .default_bpp = 16,
139 .xres = 800,
140 .yres = 480,
141};
142
143static struct fb_videomode anw6410_lcd_timing = {
144 .left_margin = 8,
145 .right_margin = 13,
146 .upper_margin = 7,
147 .lower_margin = 5,
148 .hsync_len = 3,
149 .vsync_len = 1,
150 .xres = 800,
151 .yres = 480,
150}; 152};
151 153
152/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */ 154/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
153static struct s3c_fb_platdata anw6410_lcd_pdata __initdata = { 155static struct s3c_fb_platdata anw6410_lcd_pdata __initdata = {
154 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, 156 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
157 .vtiming = &anw6410_lcd_timing,
155 .win[0] = &anw6410_fb_win0, 158 .win[0] = &anw6410_fb_win0,
156 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, 159 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
157 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, 160 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
index e20bf5835365..c1ef57edd42d 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -151,26 +151,29 @@ static struct platform_device crag6410_lcd_powerdev = {
151 151
152/* 640x480 URT */ 152/* 640x480 URT */
153static struct s3c_fb_pd_win crag6410_fb_win0 = { 153static struct s3c_fb_pd_win crag6410_fb_win0 = {
154 /* this is to ensure we use win0 */
155 .win_mode = {
156 .left_margin = 150,
157 .right_margin = 80,
158 .upper_margin = 40,
159 .lower_margin = 5,
160 .hsync_len = 40,
161 .vsync_len = 5,
162 .xres = 640,
163 .yres = 480,
164 },
165 .max_bpp = 32, 154 .max_bpp = 32,
166 .default_bpp = 16, 155 .default_bpp = 16,
156 .xres = 640,
157 .yres = 480,
167 .virtual_y = 480 * 2, 158 .virtual_y = 480 * 2,
168 .virtual_x = 640, 159 .virtual_x = 640,
169}; 160};
170 161
162static struct fb_videomode crag6410_lcd_timing = {
163 .left_margin = 150,
164 .right_margin = 80,
165 .upper_margin = 40,
166 .lower_margin = 5,
167 .hsync_len = 40,
168 .vsync_len = 5,
169 .xres = 640,
170 .yres = 480,
171};
172
171/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */ 173/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
172static struct s3c_fb_platdata crag6410_lcd_pdata __initdata = { 174static struct s3c_fb_platdata crag6410_lcd_pdata __initdata = {
173 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, 175 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
176 .vtiming = &crag6410_lcd_timing,
174 .win[0] = &crag6410_fb_win0, 177 .win[0] = &crag6410_fb_win0,
175 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, 178 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
176 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, 179 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c
index 521e07b8501b..4e9b1acefb07 100644
--- a/arch/arm/mach-s3c64xx/mach-hmt.c
+++ b/arch/arm/mach-s3c64xx/mach-hmt.c
@@ -129,23 +129,27 @@ static struct platform_device hmt_backlight_device = {
129}; 129};
130 130
131static struct s3c_fb_pd_win hmt_fb_win0 = { 131static struct s3c_fb_pd_win hmt_fb_win0 = {
132 .win_mode = {
133 .left_margin = 8,
134 .right_margin = 13,
135 .upper_margin = 7,
136 .lower_margin = 5,
137 .hsync_len = 3,
138 .vsync_len = 1,
139 .xres = 800,
140 .yres = 480,
141 },
142 .max_bpp = 32, 132 .max_bpp = 32,
143 .default_bpp = 16, 133 .default_bpp = 16,
134 .xres = 800,
135 .yres = 480,
136};
137
138static struct fb_videomode hmt_lcd_timing = {
139 .left_margin = 8,
140 .right_margin = 13,
141 .upper_margin = 7,
142 .lower_margin = 5,
143 .hsync_len = 3,
144 .vsync_len = 1,
145 .xres = 800,
146 .yres = 480,
144}; 147};
145 148
146/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */ 149/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
147static struct s3c_fb_platdata hmt_lcd_pdata __initdata = { 150static struct s3c_fb_platdata hmt_lcd_pdata __initdata = {
148 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, 151 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
152 .vtiming = &hmt_lcd_timing,
149 .win[0] = &hmt_fb_win0, 153 .win[0] = &hmt_fb_win0,
150 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, 154 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
151 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, 155 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c
index 34f51950b46e..2f425d5d8af5 100644
--- a/arch/arm/mach-s3c64xx/mach-mini6410.c
+++ b/arch/arm/mach-s3c64xx/mach-mini6410.c
@@ -152,43 +152,53 @@ static struct s3c2410_platform_nand mini6410_nand_info = {
152}; 152};
153 153
154static struct s3c_fb_pd_win mini6410_lcd_type0_fb_win = { 154static struct s3c_fb_pd_win mini6410_lcd_type0_fb_win = {
155 .win_mode = { /* 4.3" 480x272 */
156 .left_margin = 3,
157 .right_margin = 2,
158 .upper_margin = 1,
159 .lower_margin = 1,
160 .hsync_len = 40,
161 .vsync_len = 1,
162 .xres = 480,
163 .yres = 272,
164 },
165 .max_bpp = 32, 155 .max_bpp = 32,
166 .default_bpp = 16, 156 .default_bpp = 16,
157 .xres = 480,
158 .yres = 272,
159};
160
161static struct fb_videomode mini6410_lcd_type0_timing = {
162 /* 4.3" 480x272 */
163 .left_margin = 3,
164 .right_margin = 2,
165 .upper_margin = 1,
166 .lower_margin = 1,
167 .hsync_len = 40,
168 .vsync_len = 1,
169 .xres = 480,
170 .yres = 272,
167}; 171};
168 172
169static struct s3c_fb_pd_win mini6410_lcd_type1_fb_win = { 173static struct s3c_fb_pd_win mini6410_lcd_type1_fb_win = {
170 .win_mode = { /* 7.0" 800x480 */
171 .left_margin = 8,
172 .right_margin = 13,
173 .upper_margin = 7,
174 .lower_margin = 5,
175 .hsync_len = 3,
176 .vsync_len = 1,
177 .xres = 800,
178 .yres = 480,
179 },
180 .max_bpp = 32, 174 .max_bpp = 32,
181 .default_bpp = 16, 175 .default_bpp = 16,
176 .xres = 800,
177 .yres = 480,
178};
179
180static struct fb_videomode mini6410_lcd_type1_timing = {
181 /* 7.0" 800x480 */
182 .left_margin = 8,
183 .right_margin = 13,
184 .upper_margin = 7,
185 .lower_margin = 5,
186 .hsync_len = 3,
187 .vsync_len = 1,
188 .xres = 800,
189 .yres = 480,
182}; 190};
183 191
184static struct s3c_fb_platdata mini6410_lcd_pdata[] __initdata = { 192static struct s3c_fb_platdata mini6410_lcd_pdata[] __initdata = {
185 { 193 {
186 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, 194 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
195 .vtiming = &mini6410_lcd_type0_timing,
187 .win[0] = &mini6410_lcd_type0_fb_win, 196 .win[0] = &mini6410_lcd_type0_fb_win,
188 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, 197 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
189 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, 198 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
190 }, { 199 }, {
191 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, 200 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
201 .vtiming = &mini6410_lcd_type1_timing,
192 .win[0] = &mini6410_lcd_type1_fb_win, 202 .win[0] = &mini6410_lcd_type1_fb_win,
193 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, 203 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
194 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, 204 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
@@ -316,8 +326,8 @@ static void __init mini6410_machine_init(void)
316 mini6410_parse_features(&features, mini6410_features_str); 326 mini6410_parse_features(&features, mini6410_features_str);
317 327
318 printk(KERN_INFO "MINI6410: selected LCD display is %dx%d\n", 328 printk(KERN_INFO "MINI6410: selected LCD display is %dx%d\n",
319 mini6410_lcd_pdata[features.lcd_index].win[0]->win_mode.xres, 329 mini6410_lcd_pdata[features.lcd_index].win[0]->xres,
320 mini6410_lcd_pdata[features.lcd_index].win[0]->win_mode.yres); 330 mini6410_lcd_pdata[features.lcd_index].win[0]->yres);
321 331
322 s3c_nand_set_platdata(&mini6410_nand_info); 332 s3c_nand_set_platdata(&mini6410_nand_info);
323 s3c_fb_set_platdata(&mini6410_lcd_pdata[features.lcd_index]); 333 s3c_fb_set_platdata(&mini6410_lcd_pdata[features.lcd_index]);
diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c
index 21f91e5b093d..0fbd32c74ee5 100644
--- a/arch/arm/mach-s3c64xx/mach-real6410.c
+++ b/arch/arm/mach-s3c64xx/mach-real6410.c
@@ -118,43 +118,51 @@ static struct platform_device real6410_device_eth = {
118}; 118};
119 119
120static struct s3c_fb_pd_win real6410_lcd_type0_fb_win = { 120static struct s3c_fb_pd_win real6410_lcd_type0_fb_win = {
121 .win_mode = { /* 4.3" 480x272 */
122 .left_margin = 3,
123 .right_margin = 2,
124 .upper_margin = 1,
125 .lower_margin = 1,
126 .hsync_len = 40,
127 .vsync_len = 1,
128 .xres = 480,
129 .yres = 272,
130 },
131 .max_bpp = 32, 121 .max_bpp = 32,
132 .default_bpp = 16, 122 .default_bpp = 16,
123 .xres = 480,
124 .yres = 272,
125};
126
127static struct fb_videomode real6410_lcd_type0_timing = {
128 /* 4.3" 480x272 */
129 .left_margin = 3,
130 .right_margin = 2,
131 .upper_margin = 1,
132 .lower_margin = 1,
133 .hsync_len = 40,
134 .vsync_len = 1,
133}; 135};
134 136
135static struct s3c_fb_pd_win real6410_lcd_type1_fb_win = { 137static struct s3c_fb_pd_win real6410_lcd_type1_fb_win = {
136 .win_mode = { /* 7.0" 800x480 */
137 .left_margin = 8,
138 .right_margin = 13,
139 .upper_margin = 7,
140 .lower_margin = 5,
141 .hsync_len = 3,
142 .vsync_len = 1,
143 .xres = 800,
144 .yres = 480,
145 },
146 .max_bpp = 32, 138 .max_bpp = 32,
147 .default_bpp = 16, 139 .default_bpp = 16,
140 .xres = 800,
141 .yres = 480,
142};
143
144static struct fb_videomode real6410_lcd_type1_timing = {
145 /* 7.0" 800x480 */
146 .left_margin = 8,
147 .right_margin = 13,
148 .upper_margin = 7,
149 .lower_margin = 5,
150 .hsync_len = 3,
151 .vsync_len = 1,
152 .xres = 800,
153 .yres = 480,
148}; 154};
149 155
150static struct s3c_fb_platdata real6410_lcd_pdata[] __initdata = { 156static struct s3c_fb_platdata real6410_lcd_pdata[] __initdata = {
151 { 157 {
152 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, 158 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
159 .vtiming = &real6410_lcd_type0_timing,
153 .win[0] = &real6410_lcd_type0_fb_win, 160 .win[0] = &real6410_lcd_type0_fb_win,
154 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, 161 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
155 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, 162 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
156 }, { 163 }, {
157 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, 164 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
165 .vtiming = &real6410_lcd_type1_timing,
158 .win[0] = &real6410_lcd_type1_fb_win, 166 .win[0] = &real6410_lcd_type1_fb_win,
159 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, 167 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
160 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, 168 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
@@ -297,8 +305,8 @@ static void __init real6410_machine_init(void)
297 real6410_parse_features(&features, real6410_features_str); 305 real6410_parse_features(&features, real6410_features_str);
298 306
299 printk(KERN_INFO "REAL6410: selected LCD display is %dx%d\n", 307 printk(KERN_INFO "REAL6410: selected LCD display is %dx%d\n",
300 real6410_lcd_pdata[features.lcd_index].win[0]->win_mode.xres, 308 real6410_lcd_pdata[features.lcd_index].win[0]->xres,
301 real6410_lcd_pdata[features.lcd_index].win[0]->win_mode.yres); 309 real6410_lcd_pdata[features.lcd_index].win[0]->yres);
302 310
303 s3c_fb_set_platdata(&real6410_lcd_pdata[features.lcd_index]); 311 s3c_fb_set_platdata(&real6410_lcd_pdata[features.lcd_index]);
304 s3c_nand_set_platdata(&real6410_nand_info); 312 s3c_nand_set_platdata(&real6410_nand_info);
diff --git a/arch/arm/mach-s3c64xx/mach-smartq5.c b/arch/arm/mach-s3c64xx/mach-smartq5.c
index 3f42431d4dda..03a2f88aabe1 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq5.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq5.c
@@ -108,23 +108,27 @@ static struct platform_device smartq5_buttons_device = {
108}; 108};
109 109
110static struct s3c_fb_pd_win smartq5_fb_win0 = { 110static struct s3c_fb_pd_win smartq5_fb_win0 = {
111 .win_mode = {
112 .left_margin = 216,
113 .right_margin = 40,
114 .upper_margin = 35,
115 .lower_margin = 10,
116 .hsync_len = 1,
117 .vsync_len = 1,
118 .xres = 800,
119 .yres = 480,
120 .refresh = 80,
121 },
122 .max_bpp = 32, 111 .max_bpp = 32,
123 .default_bpp = 16, 112 .default_bpp = 16,
113 .xres = 800,
114 .yres = 480,
115};
116
117static struct fb_videomode smartq5_lcd_timing = {
118 .left_margin = 216,
119 .right_margin = 40,
120 .upper_margin = 35,
121 .lower_margin = 10,
122 .hsync_len = 1,
123 .vsync_len = 1,
124 .xres = 800,
125 .yres = 480,
126 .refresh = 80,
124}; 127};
125 128
126static struct s3c_fb_platdata smartq5_lcd_pdata __initdata = { 129static struct s3c_fb_platdata smartq5_lcd_pdata __initdata = {
127 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, 130 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
131 .vtiming = &smartq5_lcd_timing,
128 .win[0] = &smartq5_fb_win0, 132 .win[0] = &smartq5_fb_win0,
129 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, 133 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
130 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC | 134 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
diff --git a/arch/arm/mach-s3c64xx/mach-smartq7.c b/arch/arm/mach-s3c64xx/mach-smartq7.c
index e5c09b6db967..4e3b0385e868 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq7.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq7.c
@@ -124,23 +124,27 @@ static struct platform_device smartq7_buttons_device = {
124}; 124};
125 125
126static struct s3c_fb_pd_win smartq7_fb_win0 = { 126static struct s3c_fb_pd_win smartq7_fb_win0 = {
127 .win_mode = {
128 .left_margin = 3,
129 .right_margin = 5,
130 .upper_margin = 1,
131 .lower_margin = 20,
132 .hsync_len = 10,
133 .vsync_len = 3,
134 .xres = 800,
135 .yres = 480,
136 .refresh = 80,
137 },
138 .max_bpp = 32, 127 .max_bpp = 32,
139 .default_bpp = 16, 128 .default_bpp = 16,
129 .xres = 800,
130 .yres = 480,
131};
132
133static struct fb_videomode smartq7_lcd_timing = {
134 .left_margin = 3,
135 .right_margin = 5,
136 .upper_margin = 1,
137 .lower_margin = 20,
138 .hsync_len = 10,
139 .vsync_len = 3,
140 .xres = 800,
141 .yres = 480,
142 .refresh = 80,
140}; 143};
141 144
142static struct s3c_fb_platdata smartq7_lcd_pdata __initdata = { 145static struct s3c_fb_platdata smartq7_lcd_pdata __initdata = {
143 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, 146 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
147 .vtiming = &smartq7_lcd_timing,
144 .win[0] = &smartq7_fb_win0, 148 .win[0] = &smartq7_fb_win0,
145 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, 149 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
146 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC | 150 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index d55bc96d9582..3cfc90f7ed31 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -146,26 +146,29 @@ static struct platform_device smdk6410_lcd_powerdev = {
146}; 146};
147 147
148static struct s3c_fb_pd_win smdk6410_fb_win0 = { 148static struct s3c_fb_pd_win smdk6410_fb_win0 = {
149 /* this is to ensure we use win0 */
150 .win_mode = {
151 .left_margin = 8,
152 .right_margin = 13,
153 .upper_margin = 7,
154 .lower_margin = 5,
155 .hsync_len = 3,
156 .vsync_len = 1,
157 .xres = 800,
158 .yres = 480,
159 },
160 .max_bpp = 32, 149 .max_bpp = 32,
161 .default_bpp = 16, 150 .default_bpp = 16,
151 .xres = 800,
152 .yres = 480,
162 .virtual_y = 480 * 2, 153 .virtual_y = 480 * 2,
163 .virtual_x = 800, 154 .virtual_x = 800,
164}; 155};
165 156
157static struct fb_videomode smdk6410_lcd_timing = {
158 .left_margin = 8,
159 .right_margin = 13,
160 .upper_margin = 7,
161 .lower_margin = 5,
162 .hsync_len = 3,
163 .vsync_len = 1,
164 .xres = 800,
165 .yres = 480,
166};
167
166/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */ 168/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
167static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = { 169static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
168 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, 170 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
171 .vtiming = &smdk6410_lcd_timing,
169 .win[0] = &smdk6410_fb_win0, 172 .win[0] = &smdk6410_fb_win0,
170 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, 173 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
171 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, 174 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,