aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-s3c64xx
diff options
context:
space:
mode:
authorThomas Abraham <thomas.abraham@linaro.org>2011-08-10 06:21:20 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2011-08-23 13:48:31 -0400
commit2a8d7bddf273477d6aa81405c9b4bae223e11ed9 (patch)
treec344956ef3499870b14158f438494ca5f27d0140 /arch/arm/mach-s3c64xx
parent88bb4ea14c72f89c5265029c1891e5eb6521cc0f (diff)
ARM: SAMSUNG: Remove uart irq handling from plaform code
With uart tx/rx/err interrupt handling moved into the driver for s3c64xx and later SoC's, the uart interrupt handling in plaform code can be removed. The uart device irq resources is reduced to one and the related unused macros are removed. Suggested-by: Grant Likely <grant.likely@secretlab.ca> CC: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'arch/arm/mach-s3c64xx')
-rw-r--r--arch/arm/mach-s3c64xx/dev-uart.c60
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/irqs.h30
-rw-r--r--arch/arm/mach-s3c64xx/irq.c25
3 files changed, 8 insertions, 107 deletions
diff --git a/arch/arm/mach-s3c64xx/dev-uart.c b/arch/arm/mach-s3c64xx/dev-uart.c
index f797f748b999..c681b99eda08 100644
--- a/arch/arm/mach-s3c64xx/dev-uart.c
+++ b/arch/arm/mach-s3c64xx/dev-uart.c
@@ -37,21 +37,10 @@ static struct resource s3c64xx_uart0_resource[] = {
37 .flags = IORESOURCE_MEM, 37 .flags = IORESOURCE_MEM,
38 }, 38 },
39 [1] = { 39 [1] = {
40 .start = IRQ_S3CUART_RX0, 40 .start = IRQ_UART0,
41 .end = IRQ_S3CUART_RX0, 41 .end = IRQ_UART0,
42 .flags = IORESOURCE_IRQ, 42 .flags = IORESOURCE_IRQ,
43 }, 43 },
44 [2] = {
45 .start = IRQ_S3CUART_TX0,
46 .end = IRQ_S3CUART_TX0,
47 .flags = IORESOURCE_IRQ,
48
49 },
50 [3] = {
51 .start = IRQ_S3CUART_ERR0,
52 .end = IRQ_S3CUART_ERR0,
53 .flags = IORESOURCE_IRQ,
54 }
55}; 44};
56 45
57static struct resource s3c64xx_uart1_resource[] = { 46static struct resource s3c64xx_uart1_resource[] = {
@@ -61,19 +50,8 @@ static struct resource s3c64xx_uart1_resource[] = {
61 .flags = IORESOURCE_MEM, 50 .flags = IORESOURCE_MEM,
62 }, 51 },
63 [1] = { 52 [1] = {
64 .start = IRQ_S3CUART_RX1, 53 .start = IRQ_UART1,
65 .end = IRQ_S3CUART_RX1, 54 .end = IRQ_UART1,
66 .flags = IORESOURCE_IRQ,
67 },
68 [2] = {
69 .start = IRQ_S3CUART_TX1,
70 .end = IRQ_S3CUART_TX1,
71 .flags = IORESOURCE_IRQ,
72
73 },
74 [3] = {
75 .start = IRQ_S3CUART_ERR1,
76 .end = IRQ_S3CUART_ERR1,
77 .flags = IORESOURCE_IRQ, 55 .flags = IORESOURCE_IRQ,
78 }, 56 },
79}; 57};
@@ -85,19 +63,8 @@ static struct resource s3c6xx_uart2_resource[] = {
85 .flags = IORESOURCE_MEM, 63 .flags = IORESOURCE_MEM,
86 }, 64 },
87 [1] = { 65 [1] = {
88 .start = IRQ_S3CUART_RX2, 66 .start = IRQ_UART2,
89 .end = IRQ_S3CUART_RX2, 67 .end = IRQ_UART2,
90 .flags = IORESOURCE_IRQ,
91 },
92 [2] = {
93 .start = IRQ_S3CUART_TX2,
94 .end = IRQ_S3CUART_TX2,
95 .flags = IORESOURCE_IRQ,
96
97 },
98 [3] = {
99 .start = IRQ_S3CUART_ERR2,
100 .end = IRQ_S3CUART_ERR2,
101 .flags = IORESOURCE_IRQ, 68 .flags = IORESOURCE_IRQ,
102 }, 69 },
103}; 70};
@@ -109,19 +76,8 @@ static struct resource s3c64xx_uart3_resource[] = {
109 .flags = IORESOURCE_MEM, 76 .flags = IORESOURCE_MEM,
110 }, 77 },
111 [1] = { 78 [1] = {
112 .start = IRQ_S3CUART_RX3, 79 .start = IRQ_UART3,
113 .end = IRQ_S3CUART_RX3, 80 .end = IRQ_UART3,
114 .flags = IORESOURCE_IRQ,
115 },
116 [2] = {
117 .start = IRQ_S3CUART_TX3,
118 .end = IRQ_S3CUART_TX3,
119 .flags = IORESOURCE_IRQ,
120
121 },
122 [3] = {
123 .start = IRQ_S3CUART_ERR3,
124 .end = IRQ_S3CUART_ERR3,
125 .flags = IORESOURCE_IRQ, 81 .flags = IORESOURCE_IRQ,
126 }, 82 },
127}; 83};
diff --git a/arch/arm/mach-s3c64xx/include/mach/irqs.h b/arch/arm/mach-s3c64xx/include/mach/irqs.h
index c026f67a80de..443f85b3c203 100644
--- a/arch/arm/mach-s3c64xx/include/mach/irqs.h
+++ b/arch/arm/mach-s3c64xx/include/mach/irqs.h
@@ -27,36 +27,6 @@
27#define IRQ_VIC0_BASE S3C_IRQ(0) 27#define IRQ_VIC0_BASE S3C_IRQ(0)
28#define IRQ_VIC1_BASE S3C_IRQ(32) 28#define IRQ_VIC1_BASE S3C_IRQ(32)
29 29
30/* UART interrupts, each UART has 4 intterupts per channel so
31 * use the space between the ISA and S3C main interrupts. Note, these
32 * are not in the same order as the S3C24XX series! */
33
34#define IRQ_S3CUART_BASE0 (16)
35#define IRQ_S3CUART_BASE1 (20)
36#define IRQ_S3CUART_BASE2 (24)
37#define IRQ_S3CUART_BASE3 (28)
38
39#define UART_IRQ_RXD (0)
40#define UART_IRQ_ERR (1)
41#define UART_IRQ_TXD (2)
42#define UART_IRQ_MODEM (3)
43
44#define IRQ_S3CUART_RX0 (IRQ_S3CUART_BASE0 + UART_IRQ_RXD)
45#define IRQ_S3CUART_TX0 (IRQ_S3CUART_BASE0 + UART_IRQ_TXD)
46#define IRQ_S3CUART_ERR0 (IRQ_S3CUART_BASE0 + UART_IRQ_ERR)
47
48#define IRQ_S3CUART_RX1 (IRQ_S3CUART_BASE1 + UART_IRQ_RXD)
49#define IRQ_S3CUART_TX1 (IRQ_S3CUART_BASE1 + UART_IRQ_TXD)
50#define IRQ_S3CUART_ERR1 (IRQ_S3CUART_BASE1 + UART_IRQ_ERR)
51
52#define IRQ_S3CUART_RX2 (IRQ_S3CUART_BASE2 + UART_IRQ_RXD)
53#define IRQ_S3CUART_TX2 (IRQ_S3CUART_BASE2 + UART_IRQ_TXD)
54#define IRQ_S3CUART_ERR2 (IRQ_S3CUART_BASE2 + UART_IRQ_ERR)
55
56#define IRQ_S3CUART_RX3 (IRQ_S3CUART_BASE3 + UART_IRQ_RXD)
57#define IRQ_S3CUART_TX3 (IRQ_S3CUART_BASE3 + UART_IRQ_TXD)
58#define IRQ_S3CUART_ERR3 (IRQ_S3CUART_BASE3 + UART_IRQ_ERR)
59
60/* VIC based IRQs */ 30/* VIC based IRQs */
61 31
62#define S3C64XX_IRQ_VIC0(x) (IRQ_VIC0_BASE + (x)) 32#define S3C64XX_IRQ_VIC0(x) (IRQ_VIC0_BASE + (x))
diff --git a/arch/arm/mach-s3c64xx/irq.c b/arch/arm/mach-s3c64xx/irq.c
index 75d9a0e49193..b07357e94958 100644
--- a/arch/arm/mach-s3c64xx/irq.c
+++ b/arch/arm/mach-s3c64xx/irq.c
@@ -25,29 +25,6 @@
25#include <plat/irq-uart.h> 25#include <plat/irq-uart.h>
26#include <plat/cpu.h> 26#include <plat/cpu.h>
27 27
28static struct s3c_uart_irq uart_irqs[] = {
29 [0] = {
30 .regs = S3C_VA_UART0,
31 .base_irq = IRQ_S3CUART_BASE0,
32 .parent_irq = IRQ_UART0,
33 },
34 [1] = {
35 .regs = S3C_VA_UART1,
36 .base_irq = IRQ_S3CUART_BASE1,
37 .parent_irq = IRQ_UART1,
38 },
39 [2] = {
40 .regs = S3C_VA_UART2,
41 .base_irq = IRQ_S3CUART_BASE2,
42 .parent_irq = IRQ_UART2,
43 },
44 [3] = {
45 .regs = S3C_VA_UART3,
46 .base_irq = IRQ_S3CUART_BASE3,
47 .parent_irq = IRQ_UART3,
48 },
49};
50
51/* setup the sources the vic should advertise resume for, even though it 28/* setup the sources the vic should advertise resume for, even though it
52 * is not doing the wake (set_irq_wake needs to be valid) */ 29 * is not doing the wake (set_irq_wake needs to be valid) */
53#define IRQ_VIC0_RESUME (1 << (IRQ_RTC_TIC - IRQ_VIC0_BASE)) 30#define IRQ_VIC0_RESUME (1 << (IRQ_RTC_TIC - IRQ_VIC0_BASE))
@@ -67,6 +44,4 @@ void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
67 44
68 /* add the timer sub-irqs */ 45 /* add the timer sub-irqs */
69 s3c_init_vic_timer_irq(5, IRQ_TIMER0); 46 s3c_init_vic_timer_irq(5, IRQ_TIMER0);
70
71 s3c_init_uart_irqs(uart_irqs, ARRAY_SIZE(uart_irqs));
72} 47}
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-17 22:33:23 -0400