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authorArnd Bergmann <arnd@arndb.de>2011-07-21 10:34:00 -0400
committerArnd Bergmann <arnd@arndb.de>2011-07-21 10:34:00 -0400
commit1e09939bad24df95ddeeeca4fbec64fa94b66def (patch)
tree8a4661ed8c4619db28863353858e0171171b7d8a /arch/arm/mach-s3c64xx/include
parent4d09a938861ef16248334d57ae250e109b0004ae (diff)
parente8de616e39ccea3b8d3cf7e68f16d216f183c4bf (diff)
Merge branch 'next-samsung-devel' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/devel
Diffstat (limited to 'arch/arm/mach-s3c64xx/include')
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/clkdev.h7
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/irqs.h1
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/pm-core.h19
3 files changed, 26 insertions, 1 deletions
diff --git a/arch/arm/mach-s3c64xx/include/mach/clkdev.h b/arch/arm/mach-s3c64xx/include/mach/clkdev.h
new file mode 100644
index 000000000000..7dffa83d23ff
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/include/mach/clkdev.h
@@ -0,0 +1,7 @@
1#ifndef __MACH_CLKDEV_H__
2#define __MACH_CLKDEV_H__
3
4#define __clk_get(clk) ({ 1; })
5#define __clk_put(clk) do {} while (0)
6
7#endif
diff --git a/arch/arm/mach-s3c64xx/include/mach/irqs.h b/arch/arm/mach-s3c64xx/include/mach/irqs.h
index 8e2df26cf14a..bf7cc82ea6d0 100644
--- a/arch/arm/mach-s3c64xx/include/mach/irqs.h
+++ b/arch/arm/mach-s3c64xx/include/mach/irqs.h
@@ -215,6 +215,7 @@
215/* Compatibility */ 215/* Compatibility */
216 216
217#define IRQ_ONENAND IRQ_ONENAND0 217#define IRQ_ONENAND IRQ_ONENAND0
218#define IRQ_I2S0 IRQ_S3C6410_IIS
218 219
219#endif /* __ASM_MACH_S3C64XX_IRQS_H */ 220#endif /* __ASM_MACH_S3C64XX_IRQS_H */
220 221
diff --git a/arch/arm/mach-s3c64xx/include/mach/pm-core.h b/arch/arm/mach-s3c64xx/include/mach/pm-core.h
index 1e9f20f0bb7b..38659bebe4b1 100644
--- a/arch/arm/mach-s3c64xx/include/mach/pm-core.h
+++ b/arch/arm/mach-s3c64xx/include/mach/pm-core.h
@@ -53,7 +53,7 @@ static inline void s3c_pm_arch_show_resume_irqs(void)
53 * the IRQ wake controls depending on the CPU we are running on */ 53 * the IRQ wake controls depending on the CPU we are running on */
54 54
55#define s3c_irqwake_eintallow ((1 << 28) - 1) 55#define s3c_irqwake_eintallow ((1 << 28) - 1)
56#define s3c_irqwake_intallow (0) 56#define s3c_irqwake_intallow (~0)
57 57
58static inline void s3c_pm_arch_update_uart(void __iomem *regs, 58static inline void s3c_pm_arch_update_uart(void __iomem *regs,
59 struct pm_uart_save *save) 59 struct pm_uart_save *save)
@@ -96,3 +96,20 @@ static inline void s3c_pm_arch_update_uart(void __iomem *regs,
96 save->ucon = new_ucon; 96 save->ucon = new_ucon;
97 } 97 }
98} 98}
99
100static inline void s3c_pm_restored_gpios(void)
101{
102 /* ensure sleep mode has been cleared from the system */
103
104 __raw_writel(0, S3C64XX_SLPEN);
105}
106
107static inline void s3c_pm_saved_gpios(void)
108{
109 /* turn on the sleep mode and keep it there, as it seems that during
110 * suspend the xCON registers get re-set and thus you can end up with
111 * problems between going to sleep and resuming.
112 */
113
114 __raw_writel(S3C64XX_SLPEN_USE_xSLP, S3C64XX_SLPEN);
115}