diff options
author | Ben Dooks <ben-linux@fluff.org> | 2009-05-07 06:06:32 -0400 |
---|---|---|
committer | Ben Dooks <ben-linux@fluff.org> | 2009-05-07 06:06:32 -0400 |
commit | a19339f430d8ba5fc2ca840ae95f8aa7c49ea9d7 (patch) | |
tree | 439acb9b48371eafa2bcbd3efb03e483a3654931 /arch/arm/mach-s3c6410/mach-smdk6410.c | |
parent | 19e3f4858d4a2863ad66b2c92d0f9270879eac04 (diff) | |
parent | e3980b6a03e4c81e0e8d2cfcd7ab18082bbe92a5 (diff) |
[ARM] Merge next-s3c-s3c6410 into for-rmk-devel
Merge branch 'next-s3c-s3c6410' into for-rmk-devel
Diffstat (limited to 'arch/arm/mach-s3c6410/mach-smdk6410.c')
-rw-r--r-- | arch/arm/mach-s3c6410/mach-smdk6410.c | 196 |
1 files changed, 196 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c6410/mach-smdk6410.c b/arch/arm/mach-s3c6410/mach-smdk6410.c index 678b728fee12..8fd7632735df 100644 --- a/arch/arm/mach-s3c6410/mach-smdk6410.c +++ b/arch/arm/mach-s3c6410/mach-smdk6410.c | |||
@@ -24,6 +24,12 @@ | |||
24 | #include <linux/fb.h> | 24 | #include <linux/fb.h> |
25 | #include <linux/gpio.h> | 25 | #include <linux/gpio.h> |
26 | #include <linux/delay.h> | 26 | #include <linux/delay.h> |
27 | #include <linux/smsc911x.h> | ||
28 | |||
29 | #ifdef CONFIG_SMDK6410_WM1190_EV1 | ||
30 | #include <linux/mfd/wm8350/core.h> | ||
31 | #include <linux/mfd/wm8350/pmic.h> | ||
32 | #endif | ||
27 | 33 | ||
28 | #include <video/platform_lcd.h> | 34 | #include <video/platform_lcd.h> |
29 | 35 | ||
@@ -39,8 +45,12 @@ | |||
39 | #include <asm/mach-types.h> | 45 | #include <asm/mach-types.h> |
40 | 46 | ||
41 | #include <plat/regs-serial.h> | 47 | #include <plat/regs-serial.h> |
48 | #include <plat/regs-modem.h> | ||
49 | #include <plat/regs-gpio.h> | ||
50 | #include <plat/regs-sys.h> | ||
42 | #include <plat/iic.h> | 51 | #include <plat/iic.h> |
43 | #include <plat/fb.h> | 52 | #include <plat/fb.h> |
53 | #include <plat/gpio-cfg.h> | ||
44 | 54 | ||
45 | #include <plat/s3c6410.h> | 55 | #include <plat/s3c6410.h> |
46 | #include <plat/clock.h> | 56 | #include <plat/clock.h> |
@@ -129,6 +139,37 @@ static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = { | |||
129 | .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, | 139 | .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, |
130 | }; | 140 | }; |
131 | 141 | ||
142 | static struct resource smdk6410_smsc911x_resources[] = { | ||
143 | [0] = { | ||
144 | .start = 0x18000000, | ||
145 | .end = 0x18000000 + SZ_64K - 1, | ||
146 | .flags = IORESOURCE_MEM, | ||
147 | }, | ||
148 | [1] = { | ||
149 | .start = S3C_EINT(10), | ||
150 | .end = S3C_EINT(10), | ||
151 | .flags = IORESOURCE_IRQ | IRQ_TYPE_LEVEL_LOW, | ||
152 | }, | ||
153 | }; | ||
154 | |||
155 | static struct smsc911x_platform_config smdk6410_smsc911x_pdata = { | ||
156 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, | ||
157 | .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, | ||
158 | .flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY, | ||
159 | .phy_interface = PHY_INTERFACE_MODE_MII, | ||
160 | }; | ||
161 | |||
162 | |||
163 | static struct platform_device smdk6410_smsc911x = { | ||
164 | .name = "smsc911x", | ||
165 | .id = -1, | ||
166 | .num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources), | ||
167 | .resource = &smdk6410_smsc911x_resources[0], | ||
168 | .dev = { | ||
169 | .platform_data = &smdk6410_smsc911x_pdata, | ||
170 | }, | ||
171 | }; | ||
172 | |||
132 | static struct map_desc smdk6410_iodesc[] = {}; | 173 | static struct map_desc smdk6410_iodesc[] = {}; |
133 | 174 | ||
134 | static struct platform_device *smdk6410_devices[] __initdata = { | 175 | static struct platform_device *smdk6410_devices[] __initdata = { |
@@ -143,11 +184,152 @@ static struct platform_device *smdk6410_devices[] __initdata = { | |||
143 | &s3c_device_fb, | 184 | &s3c_device_fb, |
144 | &s3c_device_usb, | 185 | &s3c_device_usb, |
145 | &smdk6410_lcd_powerdev, | 186 | &smdk6410_lcd_powerdev, |
187 | |||
188 | &smdk6410_smsc911x, | ||
189 | }; | ||
190 | |||
191 | #ifdef CONFIG_SMDK6410_WM1190_EV1 | ||
192 | /* S3C64xx internal logic & PLL */ | ||
193 | static struct regulator_init_data wm8350_dcdc1_data = { | ||
194 | .constraints = { | ||
195 | .name = "PVDD_INT/PVDD_PLL", | ||
196 | .min_uV = 1200000, | ||
197 | .max_uV = 1200000, | ||
198 | .always_on = 1, | ||
199 | .apply_uV = 1, | ||
200 | }, | ||
201 | }; | ||
202 | |||
203 | /* Memory */ | ||
204 | static struct regulator_init_data wm8350_dcdc3_data = { | ||
205 | .constraints = { | ||
206 | .name = "PVDD_MEM", | ||
207 | .min_uV = 1800000, | ||
208 | .max_uV = 1800000, | ||
209 | .always_on = 1, | ||
210 | .state_mem = { | ||
211 | .uV = 1800000, | ||
212 | .mode = REGULATOR_MODE_NORMAL, | ||
213 | .enabled = 1, | ||
214 | }, | ||
215 | .initial_state = PM_SUSPEND_MEM, | ||
216 | }, | ||
217 | }; | ||
218 | |||
219 | /* USB, EXT, PCM, ADC/DAC, USB, MMC */ | ||
220 | static struct regulator_init_data wm8350_dcdc4_data = { | ||
221 | .constraints = { | ||
222 | .name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV", | ||
223 | .min_uV = 3000000, | ||
224 | .max_uV = 3000000, | ||
225 | .always_on = 1, | ||
226 | }, | ||
227 | }; | ||
228 | |||
229 | /* ARM core */ | ||
230 | static struct regulator_consumer_supply dcdc6_consumers[] = { | ||
231 | { | ||
232 | .supply = "vddarm", | ||
233 | } | ||
234 | }; | ||
235 | |||
236 | static struct regulator_init_data wm8350_dcdc6_data = { | ||
237 | .constraints = { | ||
238 | .name = "PVDD_ARM", | ||
239 | .min_uV = 1000000, | ||
240 | .max_uV = 1300000, | ||
241 | .always_on = 1, | ||
242 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, | ||
243 | }, | ||
244 | .num_consumer_supplies = ARRAY_SIZE(dcdc6_consumers), | ||
245 | .consumer_supplies = dcdc6_consumers, | ||
146 | }; | 246 | }; |
147 | 247 | ||
248 | /* Alive */ | ||
249 | static struct regulator_init_data wm8350_ldo1_data = { | ||
250 | .constraints = { | ||
251 | .name = "PVDD_ALIVE", | ||
252 | .min_uV = 1200000, | ||
253 | .max_uV = 1200000, | ||
254 | .always_on = 1, | ||
255 | .apply_uV = 1, | ||
256 | }, | ||
257 | }; | ||
258 | |||
259 | /* OTG */ | ||
260 | static struct regulator_init_data wm8350_ldo2_data = { | ||
261 | .constraints = { | ||
262 | .name = "PVDD_OTG", | ||
263 | .min_uV = 3300000, | ||
264 | .max_uV = 3300000, | ||
265 | .always_on = 1, | ||
266 | }, | ||
267 | }; | ||
268 | |||
269 | /* LCD */ | ||
270 | static struct regulator_init_data wm8350_ldo3_data = { | ||
271 | .constraints = { | ||
272 | .name = "PVDD_LCD", | ||
273 | .min_uV = 3000000, | ||
274 | .max_uV = 3000000, | ||
275 | .always_on = 1, | ||
276 | }, | ||
277 | }; | ||
278 | |||
279 | /* OTGi/1190-EV1 HPVDD & AVDD */ | ||
280 | static struct regulator_init_data wm8350_ldo4_data = { | ||
281 | .constraints = { | ||
282 | .name = "PVDD_OTGI/HPVDD/AVDD", | ||
283 | .min_uV = 1200000, | ||
284 | .max_uV = 1200000, | ||
285 | .apply_uV = 1, | ||
286 | .always_on = 1, | ||
287 | }, | ||
288 | }; | ||
289 | |||
290 | static struct { | ||
291 | int regulator; | ||
292 | struct regulator_init_data *initdata; | ||
293 | } wm1190_regulators[] = { | ||
294 | { WM8350_DCDC_1, &wm8350_dcdc1_data }, | ||
295 | { WM8350_DCDC_3, &wm8350_dcdc3_data }, | ||
296 | { WM8350_DCDC_4, &wm8350_dcdc4_data }, | ||
297 | { WM8350_DCDC_6, &wm8350_dcdc6_data }, | ||
298 | { WM8350_LDO_1, &wm8350_ldo1_data }, | ||
299 | { WM8350_LDO_2, &wm8350_ldo2_data }, | ||
300 | { WM8350_LDO_3, &wm8350_ldo3_data }, | ||
301 | { WM8350_LDO_4, &wm8350_ldo4_data }, | ||
302 | }; | ||
303 | |||
304 | static int __init smdk6410_wm8350_init(struct wm8350 *wm8350) | ||
305 | { | ||
306 | int i; | ||
307 | |||
308 | /* Instantiate the regulators */ | ||
309 | for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++) | ||
310 | wm8350_register_regulator(wm8350, | ||
311 | wm1190_regulators[i].regulator, | ||
312 | wm1190_regulators[i].initdata); | ||
313 | |||
314 | return 0; | ||
315 | } | ||
316 | |||
317 | static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = { | ||
318 | .init = smdk6410_wm8350_init, | ||
319 | .irq_high = 1, | ||
320 | }; | ||
321 | #endif | ||
322 | |||
148 | static struct i2c_board_info i2c_devs0[] __initdata = { | 323 | static struct i2c_board_info i2c_devs0[] __initdata = { |
149 | { I2C_BOARD_INFO("24c08", 0x50), }, | 324 | { I2C_BOARD_INFO("24c08", 0x50), }, |
150 | { I2C_BOARD_INFO("wm8580", 0x1b), }, | 325 | { I2C_BOARD_INFO("wm8580", 0x1b), }, |
326 | |||
327 | #ifdef CONFIG_SMDK6410_WM1190_EV1 | ||
328 | { I2C_BOARD_INFO("wm8350", 0x1a), | ||
329 | .platform_data = &smdk6410_wm8350_pdata, | ||
330 | .irq = S3C_EINT(12), | ||
331 | }, | ||
332 | #endif | ||
151 | }; | 333 | }; |
152 | 334 | ||
153 | static struct i2c_board_info i2c_devs1[] __initdata = { | 335 | static struct i2c_board_info i2c_devs1[] __initdata = { |
@@ -156,9 +338,23 @@ static struct i2c_board_info i2c_devs1[] __initdata = { | |||
156 | 338 | ||
157 | static void __init smdk6410_map_io(void) | 339 | static void __init smdk6410_map_io(void) |
158 | { | 340 | { |
341 | u32 tmp; | ||
342 | |||
159 | s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc)); | 343 | s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc)); |
160 | s3c24xx_init_clocks(12000000); | 344 | s3c24xx_init_clocks(12000000); |
161 | s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs)); | 345 | s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs)); |
346 | |||
347 | /* set the LCD type */ | ||
348 | |||
349 | tmp = __raw_readl(S3C64XX_SPCON); | ||
350 | tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK; | ||
351 | tmp |= S3C64XX_SPCON_LCD_SEL_RGB; | ||
352 | __raw_writel(tmp, S3C64XX_SPCON); | ||
353 | |||
354 | /* remove the lcd bypass */ | ||
355 | tmp = __raw_readl(S3C64XX_MODEM_MIFPCON); | ||
356 | tmp &= ~MIFPCON_LCD_BYPASS; | ||
357 | __raw_writel(tmp, S3C64XX_MODEM_MIFPCON); | ||
162 | } | 358 | } |
163 | 359 | ||
164 | static void __init smdk6410_machine_init(void) | 360 | static void __init smdk6410_machine_init(void) |