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authorHeiko Stuebner <heiko@sntech.de>2014-05-15 17:59:18 -0400
committerKukjin Kim <kgene.kim@samsung.com>2014-05-25 15:05:00 -0400
commitdaf67dfc5989495c887cfdbe76be72b7db724e60 (patch)
treec78979790b42a27cfbd5dd0f965383d47a9431ed /arch/arm/mach-s3c24xx/include
parent46f34abc750c66fdb4daa9a8bc9d7f955e95eb9c (diff)
ARM: S3C24XX: trim down debug uart handling
Using the lowlevel debug uart is a corner case - even more so in a multiplatform environment. So it seems reasonable to simply let the developer set the appropriate uart type for the debugged SoC. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c24xx/include')
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/debug-macro.S52
1 files changed, 1 insertions, 51 deletions
diff --git a/arch/arm/mach-s3c24xx/include/mach/debug-macro.S b/arch/arm/mach-s3c24xx/include/mach/debug-macro.S
index 2f39737544c0..fbe3e711ebab 100644
--- a/arch/arm/mach-s3c24xx/include/mach/debug-macro.S
+++ b/arch/arm/mach-s3c24xx/include/mach/debug-macro.S
@@ -13,11 +13,9 @@
13*/ 13*/
14 14
15#include <mach/map.h> 15#include <mach/map.h>
16#include <mach/regs-gpio.h>
17#include <linux/serial_s3c.h> 16#include <linux/serial_s3c.h>
18 17
19#define S3C2410_UART1_OFF (0x4000) 18#define S3C2410_UART1_OFF (0x4000)
20#define SHIFT_2440TXF (14-9)
21 19
22 .macro addruart, rp, rv, tmp 20 .macro addruart, rp, rv, tmp
23 ldr \rp, = S3C24XX_PA_UART 21 ldr \rp, = S3C24XX_PA_UART
@@ -28,56 +26,11 @@
28#endif 26#endif
29 .endm 27 .endm
30 28
31 .macro fifo_full_s3c24xx rd, rx
32 @ check for arm920 vs arm926. currently assume all arm926
33 @ devices have an 64 byte FIFO identical to the s3c2440
34 mrc p15, 0, \rd, c0, c0
35 and \rd, \rd, #0xff0
36 teq \rd, #0x260
37 beq 1004f
38 mrc p15, 0, \rd, c1, c0
39 tst \rd, #1
40 addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
41 addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
42 bic \rd, \rd, #0xff000
43 ldr \rd, [\rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0)]
44 and \rd, \rd, #0x00ff0000
45 teq \rd, #0x00440000 @ is it 2440?
461004:
47 ldr \rd, [\rx, # S3C2410_UFSTAT]
48 moveq \rd, \rd, lsr #SHIFT_2440TXF
49 tst \rd, #S3C2410_UFSTAT_TXFULL
50 .endm
51
52 .macro fifo_full_s3c2410 rd, rx 29 .macro fifo_full_s3c2410 rd, rx
53 ldr \rd, [\rx, # S3C2410_UFSTAT] 30 ldr \rd, [\rx, # S3C2410_UFSTAT]
54 tst \rd, #S3C2410_UFSTAT_TXFULL 31 tst \rd, #S3C2410_UFSTAT_TXFULL
55 .endm 32 .endm
56 33
57/* fifo level reading */
58
59 .macro fifo_level_s3c24xx rd, rx
60 @ check for arm920 vs arm926. currently assume all arm926
61 @ devices have an 64 byte FIFO identical to the s3c2440
62 mrc p15, 0, \rd, c0, c0
63 and \rd, \rd, #0xff0
64 teq \rd, #0x260
65 beq 10000f
66 mrc p15, 0, \rd, c1, c0
67 tst \rd, #1
68 addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
69 addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
70 bic \rd, \rd, #0xff000
71 ldr \rd, [\rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0)]
72 and \rd, \rd, #0x00ff0000
73 teq \rd, #0x00440000 @ is it 2440?
74
7510000:
76 ldr \rd, [\rx, # S3C2410_UFSTAT]
77 andne \rd, \rd, #S3C2410_UFSTAT_TXMASK
78 andeq \rd, \rd, #S3C2440_UFSTAT_TXMASK
79 .endm
80
81 .macro fifo_level_s3c2410 rd, rx 34 .macro fifo_level_s3c2410 rd, rx
82 ldr \rd, [\rx, # S3C2410_UFSTAT] 35 ldr \rd, [\rx, # S3C2410_UFSTAT]
83 and \rd, \rd, #S3C2410_UFSTAT_TXMASK 36 and \rd, \rd, #S3C2410_UFSTAT_TXMASK
@@ -88,12 +41,9 @@
88 * used variants of these 41 * used variants of these
89*/ 42*/
90 43
91#if defined(CONFIG_CPU_LLSERIAL_S3C2410_ONLY) 44#if defined(CONFIG_DEBUG_S3C2410_UART)
92#define fifo_full fifo_full_s3c2410 45#define fifo_full fifo_full_s3c2410
93#define fifo_level fifo_level_s3c2410 46#define fifo_level fifo_level_s3c2410
94#elif !defined(CONFIG_CPU_LLSERIAL_S3C2440_ONLY)
95#define fifo_full fifo_full_s3c24xx
96#define fifo_level fifo_level_s3c24xx
97#endif 47#endif
98 48
99/* include the reset of the code which will do the work */ 49/* include the reset of the code which will do the work */