Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Device tree conversions for samsung and tegra

Both platforms had some initial device tree support, but this adds
much more to actually make it usable.

* tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (45 commits)
  ARM: dts: Add intial dts file for EXYNOS4210 SoC, SMDKV310 and ORIGEN
  ARM: EXYNOS: Add Exynos4 device tree enabled board file
  rtc: rtc-s3c: Add device tree support
  input: samsung-keypad: Add device tree support
  ARM: S5PV210: Modify platform data for pl330 driver
  ARM: S5PC100: Modify platform data for pl330 driver
  ARM: S5P64x0: Modify platform data for pl330 driver
  ARM: EXYNOS: Add a alias for pdma clocks
  ARM: EXYNOS: Limit usage of pl330 device instance to non-dt build
  ARM: SAMSUNG: Add device tree support for pl330 dma engine wrappers
  DMA: PL330: Add device tree support
  ARM: EXYNOS: Modify platform data for pl330 driver
  DMA: PL330: Infer transfer direction from transfer request instead of platform data
  DMA: PL330: move filter function into driver
  serial: samsung: Fix build for non-Exynos4210 devices
  serial: samsung: add device tree support
  serial: samsung: merge probe() function from all SoC specific extensions
  serial: samsung: merge all SoC specific port reset functions
  ARM: SAMSUNG: register uart clocks to clock lookup list
  serial: samsung: remove all uses of get_clksrc and set_clksrc
  ...

Fix up fairly trivial conflicts in arch/arm/mach-s3c2440/clock.c and
drivers/tty/serial/Kconfig both due to just adding code close to
changes.

6 files changed, 57 insertions, 92 deletions

diff --git a/arch/arm/mach-s3c2440/clock.c b/arch/arm/mach-s3c2440/clock.c
index d8957592fdc4..bedbc87a3426 100644
--- a/arch/arm/mach-s3c2440/clock.c
+++ b/arch/arm/mach-s3c2440/clock.c
@@ -33,6 +33,7 @@
 #include <linux/mutex.h>
 #include <linux/clk.h>
 #include <linux/io.h>
+#include <linux/serial_core.h>
 
 #include <mach/hardware.h>
 #include <linux/atomic.h>
@@ -42,6 +43,7 @@
 
 #include <plat/clock.h>
 #include <plat/cpu.h>
+#include <plat/regs-serial.h>
 
 /* S3C2440 extended clock support */
 
@@ -107,6 +109,46 @@ static struct clk s3c2440_clk_ac97 = {
         .ctrlbit        = S3C2440_CLKCON_CAMERA,
 };
 
+static unsigned long  s3c2440_fclk_n_getrate(struct clk *clk)
+{
+        unsigned long ucon0, ucon1, ucon2, divisor;
+
+        /* the fun of calculating the uart divisors on the s3c2440 */
+        ucon0 = __raw_readl(S3C24XX_VA_UART0 + S3C2410_UCON);
+        ucon1 = __raw_readl(S3C24XX_VA_UART1 + S3C2410_UCON);
+        ucon2 = __raw_readl(S3C24XX_VA_UART2 + S3C2410_UCON);
+
+        ucon0 &= S3C2440_UCON0_DIVMASK;
+        ucon1 &= S3C2440_UCON1_DIVMASK;
+        ucon2 &= S3C2440_UCON2_DIVMASK;
+
+        if (ucon0 != 0)
+                divisor = (ucon0 >> S3C2440_UCON_DIVSHIFT) + 6;
+        else if (ucon1 != 0)
+                divisor = (ucon1 >> S3C2440_UCON_DIVSHIFT) + 21;
+        else if (ucon2 != 0)
+                divisor = (ucon2 >> S3C2440_UCON_DIVSHIFT) + 36;
+        else
+                /* manual calims 44, seems to be 9 */
+                divisor = 9;
+
+        return clk_get_rate(clk->parent) / divisor;
+}
+
+static struct clk s3c2440_clk_fclk_n = {
+        .name           = "fclk_n",
+        .parent         = &clk_f,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s3c2440_fclk_n_getrate,
+        },
+};
+
+static struct clk_lookup s3c2440_clk_lookup[] = {
+        CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk),
+        CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p),
+        CLKDEV_INIT(NULL, "clk_uart_baud3", &s3c2440_clk_fclk_n),
+};
+
 static int s3c2440_clk_add(struct device *dev)
 {
         struct clk *clock_upll;
@@ -125,10 +167,12 @@ static int s3c2440_clk_add(struct device *dev)
         s3c2440_clk_cam.parent = clock_h;
         s3c2440_clk_ac97.parent = clock_p;
         s3c2440_clk_cam_upll.parent = clock_upll;
+        s3c24xx_register_clock(&s3c2440_clk_fclk_n);
 
         s3c24xx_register_clock(&s3c2440_clk_ac97);
         s3c24xx_register_clock(&s3c2440_clk_cam);
         s3c24xx_register_clock(&s3c2440_clk_cam_upll);
+        clkdev_add_table(s3c2440_clk_lookup, ARRAY_SIZE(s3c2440_clk_lookup));
 
         clk_disable(&s3c2440_clk_ac97);
         clk_disable(&s3c2440_clk_cam);
diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c
index 121ff8d2c887..24569550de1a 100644
--- a/arch/arm/mach-s3c2440/mach-anubis.c
+++ b/arch/arm/mach-s3c2440/mach-anubis.c
@@ -98,22 +98,6 @@ static struct map_desc anubis_iodesc[] __initdata = {
 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
 
-static struct s3c24xx_uart_clksrc anubis_serial_clocks[] = {
-        [0] = {
-                .name           = "uclk",
-                .divisor        = 1,
-                .min_baud       = 0,
-                .max_baud       = 0,
-        },
-        [1] = {
-                .name           = "pclk",
-                .divisor        = 1,
-                .min_baud       = 0,
-                .max_baud       = 0,
-        }
-};
-
-
 static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = {
         [0] = {
                 .hwport      = 0,
@@ -121,8 +105,7 @@ static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = {
                 .ucon        = UCON,
                 .ulcon       = ULCON,
                 .ufcon       = UFCON,
-                .clocks      = anubis_serial_clocks,
-                .clocks_size = ARRAY_SIZE(anubis_serial_clocks),
+                .clk_sel        = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
         },
         [1] = {
                 .hwport      = 2,
@@ -130,8 +113,7 @@ static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = {
                 .ucon        = UCON,
                 .ulcon       = ULCON,
                 .ufcon       = UFCON,
-                .clocks      = anubis_serial_clocks,
-                .clocks_size = ARRAY_SIZE(anubis_serial_clocks),
+                .clk_sel        = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
         },
 };
 
diff --git a/arch/arm/mach-s3c2440/mach-at2440evb.c b/arch/arm/mach-s3c2440/mach-at2440evb.c
index b7e334f07da4..d6a9763110cd 100644
--- a/arch/arm/mach-s3c2440/mach-at2440evb.c
+++ b/arch/arm/mach-s3c2440/mach-at2440evb.c
@@ -59,22 +59,6 @@ static struct map_desc at2440evb_iodesc[] __initdata = {
 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
 #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
 
-static struct s3c24xx_uart_clksrc at2440evb_serial_clocks[] = {
-        [0] = {
-                .name           = "uclk",
-                .divisor        = 1,
-                .min_baud       = 0,
-                .max_baud       = 0,
-        },
-        [1] = {
-                .name           = "pclk",
-                .divisor        = 1,
-                .min_baud       = 0,
-                .max_baud       = 0,
-        }
-};
-
-
 static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
         [0] = {
                 .hwport      = 0,
@@ -82,8 +66,7 @@ static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
                 .ucon        = UCON,
                 .ulcon       = ULCON,
                 .ufcon       = UFCON,
-                .clocks      = at2440evb_serial_clocks,
-                .clocks_size = ARRAY_SIZE(at2440evb_serial_clocks),
+                .clk_sel        = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
         },
         [1] = {
                 .hwport      = 1,
@@ -91,8 +74,7 @@ static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
                 .ucon        = UCON,
                 .ulcon       = ULCON,
                 .ufcon       = UFCON,
-                .clocks      = at2440evb_serial_clocks,
-                .clocks_size = ARRAY_SIZE(at2440evb_serial_clocks),
+                .clk_sel        = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
         },
 };
 
diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c
index e795715fba30..4c480ef734f6 100644
--- a/arch/arm/mach-s3c2440/mach-osiris.c
+++ b/arch/arm/mach-s3c2440/mach-osiris.c
@@ -102,21 +102,6 @@ static struct map_desc osiris_iodesc[] __initdata = {
 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
 
-static struct s3c24xx_uart_clksrc osiris_serial_clocks[] = {
-        [0] = {
-                .name           = "uclk",
-                .divisor        = 1,
-                .min_baud       = 0,
-                .max_baud       = 0,
-        },
-        [1] = {
-                .name           = "pclk",
-                .divisor        = 1,
-                .min_baud       = 0,
-                .max_baud       = 0,
-        }
-};
-
 static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
         [0] = {
                 .hwport      = 0,
@@ -124,8 +109,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
                 .ucon        = UCON,
                 .ulcon       = ULCON,
                 .ufcon       = UFCON,
-                .clocks      = osiris_serial_clocks,
-                .clocks_size = ARRAY_SIZE(osiris_serial_clocks),
+                .clk_sel        = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
         },
         [1] = {
                 .hwport      = 1,
@@ -133,8 +117,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
                 .ucon        = UCON,
                 .ulcon       = ULCON,
                 .ufcon       = UFCON,
-                .clocks      = osiris_serial_clocks,
-                .clocks_size = ARRAY_SIZE(osiris_serial_clocks),
+                .clk_sel        = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
         },
         [2] = {
                 .hwport      = 2,
@@ -142,8 +125,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
                 .ucon        = UCON,
                 .ulcon       = ULCON,
                 .ufcon       = UFCON,
-                .clocks      = osiris_serial_clocks,
-                .clocks_size = ARRAY_SIZE(osiris_serial_clocks),
+                .clk_sel        = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
         }
 };
 
diff --git a/arch/arm/mach-s3c2440/mach-rx1950.c b/arch/arm/mach-s3c2440/mach-rx1950.c
index 332d7533bd96..80077f6472ee 100644
--- a/arch/arm/mach-s3c2440/mach-rx1950.c
+++ b/arch/arm/mach-s3c2440/mach-rx1950.c
@@ -70,15 +70,6 @@
 static struct map_desc rx1950_iodesc[] __initdata = {
 };
 
-static struct s3c24xx_uart_clksrc rx1950_serial_clocks[] = {
-        [0] = {
-               .name = "fclk",
-               .divisor = 0x0a,
-               .min_baud = 0,
-               .max_baud = 0,
-        },
-};
-
 static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = {
         [0] = {
                .hwport = 0,
@@ -86,8 +77,7 @@ static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = {
                .ucon = 0x3c5,
                .ulcon = 0x03,
                .ufcon = 0x51,
-               .clocks = rx1950_serial_clocks,
-               .clocks_size = ARRAY_SIZE(rx1950_serial_clocks),
+                .clk_sel = S3C2410_UCON_CLKSEL3,
         },
         [1] = {
                .hwport = 1,
@@ -95,8 +85,7 @@ static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = {
                .ucon = 0x3c5,
                .ulcon = 0x03,
                .ufcon = 0x51,
-               .clocks = rx1950_serial_clocks,
-               .clocks_size = ARRAY_SIZE(rx1950_serial_clocks),
+                .clk_sel = S3C2410_UCON_CLKSEL3,
         },
         /* IR port */
         [2] = {
@@ -105,8 +94,7 @@ static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = {
                .ucon = 0x3c5,
                .ulcon = 0x43,
                .ufcon = 0xf1,
-               .clocks = rx1950_serial_clocks,
-               .clocks_size = ARRAY_SIZE(rx1950_serial_clocks),
+                .clk_sel = S3C2410_UCON_CLKSEL3,
         },
 };
 
diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c
index 80a0972873c2..20103bafbd4b 100644
--- a/arch/arm/mach-s3c2440/mach-rx3715.c
+++ b/arch/arm/mach-s3c2440/mach-rx3715.c
@@ -69,16 +69,6 @@ static struct map_desc rx3715_iodesc[] __initdata = {
         },
 };
 
-
-static struct s3c24xx_uart_clksrc rx3715_serial_clocks[] = {
-        [0] = {
-                .name           = "fclk",
-                .divisor        = 0,
-                .min_baud       = 0,
-                .max_baud       = 0,
-        }
-};
-
 static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
         [0] = {
                 .hwport      = 0,
@@ -86,8 +76,7 @@ static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
                 .ucon        = 0x3c5,
                 .ulcon       = 0x03,
                 .ufcon       = 0x51,
-                .clocks      = rx3715_serial_clocks,
-                .clocks_size = ARRAY_SIZE(rx3715_serial_clocks),
+                .clk_sel        = S3C2410_UCON_CLKSEL3,
         },
         [1] = {
                 .hwport      = 1,
@@ -95,8 +84,7 @@ static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
                 .ucon        = 0x3c5,
                 .ulcon       = 0x03,
                 .ufcon       = 0x00,
-                .clocks      = rx3715_serial_clocks,
-                .clocks_size = ARRAY_SIZE(rx3715_serial_clocks),
+                .clk_sel        = S3C2410_UCON_CLKSEL3,
         },
         /* IR port */
         [2] = {
@@ -105,8 +93,7 @@ static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
                 .ucon        = 0x3c5,
                 .ulcon       = 0x43,
                 .ufcon       = 0x51,
-                .clocks      = rx3715_serial_clocks,
-                .clocks_size = ARRAY_SIZE(rx3715_serial_clocks),
+                .clk_sel        = S3C2410_UCON_CLKSEL3,
         }
 };