diff options
author | Haojian Zhuang <haojian.zhuang@marvell.com> | 2010-11-17 06:03:35 -0500 |
---|---|---|
committer | Eric Miao <eric.y.miao@gmail.com> | 2010-12-16 01:31:19 -0500 |
commit | d04e67cd1d088762c17e8edf08fbc14e4af1981a (patch) | |
tree | 960c6ed6ec5f6b5057fbed3f39ba6d81ec87a135 /arch/arm/mach-pxa | |
parent | d38bdf48f30f5dc0fac4c1ab656aff74f6804f07 (diff) |
ARM: pxa: redefine the cpu_is_pxa3xx
After introducing pxa930/pxa935 and new silicons, original cpuid rules
of XScale generation 3 can't fit new silicons. Now redefine the rule
of PXA3xx.
Only PXA300/PXA310/PXA320/PXA930/PXA935 are family members of PXA3xx.
PXA930/PXA935 are family members of PXA93x. PXA93x can be considered
as PXA3xx + CP.
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Cc: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Diffstat (limited to 'arch/arm/mach-pxa')
-rw-r--r-- | arch/arm/mach-pxa/include/mach/hardware.h | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h index ca188cd576f9..e480d1e48130 100644 --- a/arch/arm/mach-pxa/include/mach/hardware.h +++ b/arch/arm/mach-pxa/include/mach/hardware.h | |||
@@ -264,7 +264,6 @@ | |||
264 | /* | 264 | /* |
265 | * CPUID Core Generation Bit | 265 | * CPUID Core Generation Bit |
266 | * <= 0x2 for pxa21x/pxa25x/pxa26x/pxa27x | 266 | * <= 0x2 for pxa21x/pxa25x/pxa26x/pxa27x |
267 | * == 0x3 for pxa300/pxa310/pxa320 | ||
268 | */ | 267 | */ |
269 | #if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x) | 268 | #if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x) |
270 | #define __cpu_is_pxa2xx(id) \ | 269 | #define __cpu_is_pxa2xx(id) \ |
@@ -279,8 +278,10 @@ | |||
279 | #ifdef CONFIG_PXA3xx | 278 | #ifdef CONFIG_PXA3xx |
280 | #define __cpu_is_pxa3xx(id) \ | 279 | #define __cpu_is_pxa3xx(id) \ |
281 | ({ \ | 280 | ({ \ |
282 | unsigned int _id = (id) >> 13 & 0x7; \ | 281 | __cpu_is_pxa300(id) \ |
283 | _id == 0x3; \ | 282 | || __cpu_is_pxa310(id) \ |
283 | || __cpu_is_pxa320(id) \ | ||
284 | || __cpu_is_pxa93x(id); \ | ||
284 | }) | 285 | }) |
285 | #else | 286 | #else |
286 | #define __cpu_is_pxa3xx(id) (0) | 287 | #define __cpu_is_pxa3xx(id) (0) |
@@ -289,8 +290,8 @@ | |||
289 | #if defined(CONFIG_CPU_PXA930) || defined(CONFIG_CPU_PXA935) | 290 | #if defined(CONFIG_CPU_PXA930) || defined(CONFIG_CPU_PXA935) |
290 | #define __cpu_is_pxa93x(id) \ | 291 | #define __cpu_is_pxa93x(id) \ |
291 | ({ \ | 292 | ({ \ |
292 | unsigned int _id = (id) >> 4 & 0xfff; \ | 293 | __cpu_is_pxa930(id) \ |
293 | _id == 0x683 || _id == 0x693; \ | 294 | || __cpu_is_pxa935(id); \ |
294 | }) | 295 | }) |
295 | #else | 296 | #else |
296 | #define __cpu_is_pxa93x(id) (0) | 297 | #define __cpu_is_pxa93x(id) (0) |