diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-11-05 18:03:25 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-11-05 18:26:40 -0400 |
commit | 7124cb96cadc5f9990ade39780b672b01bfc6484 (patch) | |
tree | 227082a57a4f4c34b1b2417bb5be171180f71cf7 /arch/arm/mach-pxa | |
parent | 4fc7ae3c849a5a15965c1d41b59b0a606119e71a (diff) |
ARM: PXA: fix gpio-pxa.h build errors
A mismerge in 43872fa (Merge branch 'depends/rmk/gpio' into next/fixes)
causes these build errors:
In file included from arch/arm/mach-pxa/include/mach/gpio.h:30,
from arch/arm/include/asm/gpio.h:6,
from include/linux/gpio.h:31,
from arch/arm/mach-pxa/generic.c:20:
arch/arm/mach-pxa/include/mach/gpio-pxa.h: In function ■__gpio_is_occupied■:
arch/arm/mach-pxa/include/mach/gpio-pxa.h:121: error: invalid operands to binary >> (have ■void *■ and ■unsigned int■)
arch/arm/mach-pxa/include/mach/gpio-pxa.h:122: error: invalid operands to binary & (have ■void *■ and ■int■)
arch/arm/mach-pxa/include/mach/gpio-pxa.h:129: error: invalid operands to binary & (have ■void *■ and ■int■)
So fix them.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-pxa')
-rw-r--r-- | arch/arm/mach-pxa/include/mach/gpio-pxa.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-pxa/include/mach/gpio-pxa.h b/arch/arm/mach-pxa/include/mach/gpio-pxa.h index 576868f8b8c5..41b4c93a96c2 100644 --- a/arch/arm/mach-pxa/include/mach/gpio-pxa.h +++ b/arch/arm/mach-pxa/include/mach/gpio-pxa.h | |||
@@ -25,7 +25,7 @@ | |||
25 | #define GPIO_REGS_VIRT io_p2v(0x40E00000) | 25 | #define GPIO_REGS_VIRT io_p2v(0x40E00000) |
26 | 26 | ||
27 | #define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) | 27 | #define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) |
28 | #define GPIO_REG(x) (GPIO_REGS_VIRT + (x)) | 28 | #define GPIO_REG(x) (*(volatile u32 *)(GPIO_REGS_VIRT + (x))) |
29 | 29 | ||
30 | /* GPIO Pin Level Registers */ | 30 | /* GPIO Pin Level Registers */ |
31 | #define GPLR0 GPIO_REG(BANK_OFF(0) + 0x00) | 31 | #define GPLR0 GPIO_REG(BANK_OFF(0) + 0x00) |