aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-pxa
diff options
context:
space:
mode:
authorGlenn Elliott <gelliott@cs.unc.edu>2012-03-04 19:47:13 -0500
committerGlenn Elliott <gelliott@cs.unc.edu>2012-03-04 19:47:13 -0500
commitc71c03bda1e86c9d5198c5d83f712e695c4f2a1e (patch)
treeecb166cb3e2b7e2adb3b5e292245fefd23381ac8 /arch/arm/mach-pxa
parentea53c912f8a86a8567697115b6a0d8152beee5c8 (diff)
parent6a00f206debf8a5c8899055726ad127dbeeed098 (diff)
Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp
Conflicts: litmus/sched_cedf.c
Diffstat (limited to 'arch/arm/mach-pxa')
-rw-r--r--arch/arm/mach-pxa/Kconfig54
-rw-r--r--arch/arm/mach-pxa/Makefile11
-rw-r--r--arch/arm/mach-pxa/am200epd.c8
-rw-r--r--arch/arm/mach-pxa/am300epd.c13
-rw-r--r--arch/arm/mach-pxa/balloon3.c205
-rw-r--r--arch/arm/mach-pxa/capc7117.c4
-rw-r--r--arch/arm/mach-pxa/clock-pxa2xx.c54
-rw-r--r--arch/arm/mach-pxa/clock-pxa3xx.c208
-rw-r--r--arch/arm/mach-pxa/clock.c29
-rw-r--r--arch/arm/mach-pxa/clock.h50
-rw-r--r--arch/arm/mach-pxa/cm-x255.c2
-rw-r--r--arch/arm/mach-pxa/cm-x270.c3
-rw-r--r--arch/arm/mach-pxa/cm-x2xx-pci.c34
-rw-r--r--arch/arm/mach-pxa/cm-x2xx.c59
-rw-r--r--arch/arm/mach-pxa/cm-x300.c87
-rw-r--r--arch/arm/mach-pxa/colibri-evalboard.c (renamed from arch/arm/mach-pxa/colibri-pxa270-evalboard.c)96
-rw-r--r--arch/arm/mach-pxa/colibri-pxa270-income.c53
-rw-r--r--arch/arm/mach-pxa/colibri-pxa270.c113
-rw-r--r--arch/arm/mach-pxa/colibri-pxa300.c75
-rw-r--r--arch/arm/mach-pxa/colibri-pxa320.c141
-rw-r--r--arch/arm/mach-pxa/colibri-pxa3xx.c51
-rw-r--r--arch/arm/mach-pxa/corgi.c17
-rw-r--r--arch/arm/mach-pxa/cpufreq-pxa2xx.c10
-rw-r--r--arch/arm/mach-pxa/cpufreq-pxa3xx.c5
-rw-r--r--arch/arm/mach-pxa/csb726.c13
-rw-r--r--arch/arm/mach-pxa/devices.c315
-rw-r--r--arch/arm/mach-pxa/devices.h7
-rw-r--r--arch/arm/mach-pxa/em-x270.c17
-rw-r--r--arch/arm/mach-pxa/eseries.c67
-rw-r--r--arch/arm/mach-pxa/ezx.c50
-rw-r--r--arch/arm/mach-pxa/generic.c53
-rw-r--r--arch/arm/mach-pxa/generic.h25
-rw-r--r--arch/arm/mach-pxa/gumstix.c17
-rw-r--r--arch/arm/mach-pxa/h5000.c13
-rw-r--r--arch/arm/mach-pxa/himalaya.c4
-rw-r--r--arch/arm/mach-pxa/hx4700.c13
-rw-r--r--arch/arm/mach-pxa/icontrol.c6
-rw-r--r--arch/arm/mach-pxa/idp.c6
-rw-r--r--arch/arm/mach-pxa/include/mach/addr-map.h48
-rw-r--r--arch/arm/mach-pxa/include/mach/balloon3.h6
-rw-r--r--arch/arm/mach-pxa/include/mach/colibri.h14
-rw-r--r--arch/arm/mach-pxa/include/mach/debug-macro.S10
-rw-r--r--arch/arm/mach-pxa/include/mach/eseries-irq.h1
-rw-r--r--arch/arm/mach-pxa/include/mach/gpio.h17
-rw-r--r--arch/arm/mach-pxa/include/mach/hardware.h47
-rw-r--r--arch/arm/mach-pxa/include/mach/hx4700.h1
-rw-r--r--arch/arm/mach-pxa/include/mach/irqs.h93
-rw-r--r--arch/arm/mach-pxa/include/mach/littleton.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/lpd270.h1
-rw-r--r--arch/arm/mach-pxa/include/mach/lubbock.h3
-rw-r--r--arch/arm/mach-pxa/include/mach/magician.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/mainstone.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/memory.h12
-rw-r--r--arch/arm/mach-pxa/include/mach/mfp-pxa930.h7
-rw-r--r--arch/arm/mach-pxa/include/mach/palmz72.h5
-rw-r--r--arch/arm/mach-pxa/include/mach/pcm027.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/pm.h5
-rw-r--r--arch/arm/mach-pxa/include/mach/poodle.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa27x_keypad.h59
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa2xx-regs.h66
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa2xx_spi.h47
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa3xx-regs.h11
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa3xx-u2d.h35
-rw-r--r--arch/arm/mach-pxa/include/mach/pxafb.h4
-rw-r--r--arch/arm/mach-pxa/include/mach/regs-intc.h4
-rw-r--r--arch/arm/mach-pxa/include/mach/smemc.h74
-rw-r--r--arch/arm/mach-pxa/include/mach/tosa.h1
-rw-r--r--arch/arm/mach-pxa/include/mach/uncompress.h6
-rw-r--r--arch/arm/mach-pxa/include/mach/z2.h3
-rw-r--r--arch/arm/mach-pxa/include/mach/zeus.h4
-rw-r--r--arch/arm/mach-pxa/include/mach/zylonite.h2
-rw-r--r--arch/arm/mach-pxa/irq.c183
-rw-r--r--arch/arm/mach-pxa/littleton.c13
-rw-r--r--arch/arm/mach-pxa/lpd270.c55
-rw-r--r--arch/arm/mach-pxa/lubbock.c60
-rw-r--r--arch/arm/mach-pxa/magician.c13
-rw-r--r--arch/arm/mach-pxa/mainstone.c61
-rw-r--r--arch/arm/mach-pxa/mfp-pxa2xx.c16
-rw-r--r--arch/arm/mach-pxa/mfp-pxa3xx.c21
-rw-r--r--arch/arm/mach-pxa/mioa701.c56
-rw-r--r--arch/arm/mach-pxa/mp900.c4
-rw-r--r--arch/arm/mach-pxa/mxm8x10.c4
-rw-r--r--arch/arm/mach-pxa/palm27x.c10
-rw-r--r--arch/arm/mach-pxa/palmld.c7
-rw-r--r--arch/arm/mach-pxa/palmt5.c6
-rw-r--r--arch/arm/mach-pxa/palmtc.c192
-rw-r--r--arch/arm/mach-pxa/palmte2.c37
-rw-r--r--arch/arm/mach-pxa/palmtreo.c11
-rw-r--r--arch/arm/mach-pxa/palmtx.c9
-rw-r--r--arch/arm/mach-pxa/palmz72.c159
-rw-r--r--arch/arm/mach-pxa/pcm027.c7
-rw-r--r--arch/arm/mach-pxa/pcm990-baseboard.c29
-rw-r--r--arch/arm/mach-pxa/pm.c11
-rw-r--r--arch/arm/mach-pxa/poodle.c12
-rw-r--r--arch/arm/mach-pxa/pxa25x.c117
-rw-r--r--arch/arm/mach-pxa/pxa27x.c139
-rw-r--r--arch/arm/mach-pxa/pxa3xx-ulpi.c400
-rw-r--r--arch/arm/mach-pxa/pxa3xx.c326
-rw-r--r--arch/arm/mach-pxa/pxa930.c2
-rw-r--r--arch/arm/mach-pxa/pxa95x.c296
-rw-r--r--arch/arm/mach-pxa/raumfeld.c56
-rw-r--r--arch/arm/mach-pxa/saar.c10
-rw-r--r--arch/arm/mach-pxa/saarb.c113
-rw-r--r--arch/arm/mach-pxa/sharpsl_pm.c5
-rw-r--r--arch/arm/mach-pxa/sleep.S193
-rw-r--r--arch/arm/mach-pxa/smemc.c80
-rw-r--r--arch/arm/mach-pxa/spitz.c28
-rw-r--r--arch/arm/mach-pxa/spitz_pm.c1
-rw-r--r--arch/arm/mach-pxa/stargate2.c18
-rw-r--r--arch/arm/mach-pxa/tavorevb.c8
-rw-r--r--arch/arm/mach-pxa/tavorevb3.c134
-rw-r--r--arch/arm/mach-pxa/time.c53
-rw-r--r--arch/arm/mach-pxa/tosa-bt.c2
-rw-r--r--arch/arm/mach-pxa/tosa.c35
-rw-r--r--arch/arm/mach-pxa/trizeps4.c17
-rw-r--r--arch/arm/mach-pxa/viper.c50
-rw-r--r--arch/arm/mach-pxa/vpac270.c10
-rw-r--r--arch/arm/mach-pxa/xcep.c12
-rw-r--r--arch/arm/mach-pxa/z2.c88
-rw-r--r--arch/arm/mach-pxa/zeus.c63
-rw-r--r--arch/arm/mach-pxa/zylonite.c22
-rw-r--r--arch/arm/mach-pxa/zylonite_pxa300.c2
122 files changed, 3448 insertions, 2392 deletions
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index 7aefb9074852..cd19309fd3b8 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -8,19 +8,16 @@ config ARCH_LUBBOCK
8 bool "Intel DBPXA250 Development Platform (aka Lubbock)" 8 bool "Intel DBPXA250 Development Platform (aka Lubbock)"
9 select PXA25x 9 select PXA25x
10 select SA1111 10 select SA1111
11 select PXA_HAVE_BOARD_IRQS
12 11
13config MACH_MAINSTONE 12config MACH_MAINSTONE
14 bool "Intel HCDDBBVA0 Development Platform (aka Mainstone)" 13 bool "Intel HCDDBBVA0 Development Platform (aka Mainstone)"
15 select PXA27x 14 select PXA27x
16 select HAVE_PWM 15 select HAVE_PWM
17 select PXA_HAVE_BOARD_IRQS
18 16
19config MACH_ZYLONITE 17config MACH_ZYLONITE
20 bool 18 bool
21 select PXA3xx 19 select PXA3xx
22 select HAVE_PWM 20 select HAVE_PWM
23 select PXA_HAVE_BOARD_IRQS
24 21
25config MACH_ZYLONITE300 22config MACH_ZYLONITE300
26 bool "PXA3xx Development Platform (aka Zylonite) PXA300/310" 23 bool "PXA3xx Development Platform (aka Zylonite) PXA300/310"
@@ -44,11 +41,19 @@ config MACH_TAVOREVB
44 select PXA3xx 41 select PXA3xx
45 select CPU_PXA930 42 select CPU_PXA930
46 43
44config MACH_TAVOREVB3
45 bool "PXA95x Development Platform (aka TavorEVB III)"
46 select CPU_PXA950
47
47config MACH_SAAR 48config MACH_SAAR
48 bool "PXA930 Handheld Platform (aka SAAR)" 49 bool "PXA930 Handheld Platform (aka SAAR)"
49 select PXA3xx 50 select PXA3xx
50 select CPU_PXA930 51 select CPU_PXA930
51 52
53config MACH_SAARB
54 bool "PXA955 Handheld Platform (aka SAARB)"
55 select CPU_PXA955
56
52comment "Third Party Dev Platforms (sorted by vendor name)" 57comment "Third Party Dev Platforms (sorted by vendor name)"
53 58
54config ARCH_PXA_IDP 59config ARCH_PXA_IDP
@@ -61,7 +66,6 @@ config ARCH_VIPER
61 select ISA 66 select ISA
62 select I2C_GPIO 67 select I2C_GPIO
63 select HAVE_PWM 68 select HAVE_PWM
64 select PXA_HAVE_BOARD_IRQS
65 select PXA_HAVE_ISA_IRQS 69 select PXA_HAVE_ISA_IRQS
66 select ARCOM_PCMCIA 70 select ARCOM_PCMCIA
67 71
@@ -69,7 +73,6 @@ config MACH_ARCOM_ZEUS
69 bool "Arcom/Eurotech ZEUS SBC" 73 bool "Arcom/Eurotech ZEUS SBC"
70 select PXA27x 74 select PXA27x
71 select ISA 75 select ISA
72 select PXA_HAVE_BOARD_IRQS
73 select PXA_HAVE_ISA_IRQS 76 select PXA_HAVE_ISA_IRQS
74 select ARCOM_PCMCIA 77 select ARCOM_PCMCIA
75 78
@@ -77,7 +80,6 @@ config MACH_BALLOON3
77 bool "Balloon 3 board" 80 bool "Balloon 3 board"
78 select PXA27x 81 select PXA27x
79 select IWMMXT 82 select IWMMXT
80 select PXA_HAVE_BOARD_IRQS
81 83
82config MACH_CSB726 84config MACH_CSB726
83 bool "Enable Cogent CSB726 System On a Module" 85 bool "Enable Cogent CSB726 System On a Module"
@@ -96,6 +98,7 @@ config MACH_ARMCORE
96 select PXA27x 98 select PXA27x
97 select IWMMXT 99 select IWMMXT
98 select PXA25x 100 select PXA25x
101 select MIGHT_HAVE_PCI
99 102
100config MACH_EM_X270 103config MACH_EM_X270
101 bool "CompuLab EM-x270 platform" 104 bool "CompuLab EM-x270 platform"
@@ -140,19 +143,16 @@ config MACH_INTELMOTE2
140 bool "Intel Mote 2 Platform" 143 bool "Intel Mote 2 Platform"
141 select PXA27x 144 select PXA27x
142 select IWMMXT 145 select IWMMXT
143 select PXA_HAVE_BOARD_IRQS
144 146
145config MACH_STARGATE2 147config MACH_STARGATE2
146 bool "Intel Stargate 2 Platform" 148 bool "Intel Stargate 2 Platform"
147 select PXA27x 149 select PXA27x
148 select IWMMXT 150 select IWMMXT
149 select PXA_HAVE_BOARD_IRQS
150 151
151config MACH_XCEP 152config MACH_XCEP
152 bool "Iskratel Electronics XCEP" 153 bool "Iskratel Electronics XCEP"
153 select PXA25x 154 select PXA25x
154 select MTD 155 select MTD
155 select MTD_PARTITIONS
156 select MTD_PHYSMAP 156 select MTD_PHYSMAP
157 select MTD_CFI_INTELEXT 157 select MTD_CFI_INTELEXT
158 select MTD_CFI 158 select MTD_CFI
@@ -206,13 +206,11 @@ config MACH_LOGICPD_PXA270
206 bool "LogicPD PXA270 Card Engine Development Platform" 206 bool "LogicPD PXA270 Card Engine Development Platform"
207 select PXA27x 207 select PXA27x
208 select HAVE_PWM 208 select HAVE_PWM
209 select PXA_HAVE_BOARD_IRQS
210 209
211config MACH_PCM027 210config MACH_PCM027
212 bool "Phytec phyCORE-PXA270 CPU module (PCM-027)" 211 bool "Phytec phyCORE-PXA270 CPU module (PCM-027)"
213 select PXA27x 212 select PXA27x
214 select IWMMXT 213 select IWMMXT
215 select PXA_HAVE_BOARD_IRQS
216 214
217config MACH_PCM990_BASEBOARD 215config MACH_PCM990_BASEBOARD
218 bool "PHYTEC PCM-990 development board" 216 bool "PHYTEC PCM-990 development board"
@@ -238,16 +236,11 @@ config MACH_COLIBRI
238 bool "Toradex Colibri PXA270" 236 bool "Toradex Colibri PXA270"
239 select PXA27x 237 select PXA27x
240 238
241config MACH_COLIBRI_PXA270_EVALBOARD
242 bool "Toradex Colibri Evaluation Carrier Board support (PXA270)"
243 depends on MACH_COLIBRI
244
245config MACH_COLIBRI_PXA270_INCOME 239config MACH_COLIBRI_PXA270_INCOME
246 bool "Income s.r.o. PXA270 SBC" 240 bool "Income s.r.o. PXA270 SBC"
247 depends on MACH_COLIBRI 241 depends on MACH_COLIBRI
248 select PXA27x 242 select PXA27x
249 select HAVE_PWM 243 select HAVE_PWM
250 select PXA_HAVE_BOARD_IRQS
251 244
252config MACH_COLIBRI300 245config MACH_COLIBRI300
253 bool "Toradex Colibri PXA300/310" 246 bool "Toradex Colibri PXA300/310"
@@ -260,6 +253,10 @@ config MACH_COLIBRI320
260 select PXA3xx 253 select PXA3xx
261 select CPU_PXA320 254 select CPU_PXA320
262 255
256config MACH_COLIBRI_EVALBOARD
257 bool "Toradex Colibri Evaluation Carrier Board support"
258 depends on MACH_COLIBRI || MACH_COLIBRI300 || MACH_COLIBRI320
259
263config MACH_VPAC270 260config MACH_VPAC270
264 bool "Voipac PXA270" 261 bool "Voipac PXA270"
265 select PXA27x 262 select PXA27x
@@ -274,7 +271,6 @@ config MACH_H4700
274 select PXA27x 271 select PXA27x
275 select IWMMXT 272 select IWMMXT
276 select HAVE_PWM 273 select HAVE_PWM
277 select PXA_HAVE_BOARD_IRQS
278 274
279config MACH_H5000 275config MACH_H5000
280 bool "HP iPAQ h5000" 276 bool "HP iPAQ h5000"
@@ -289,7 +285,6 @@ config MACH_MAGICIAN
289 select PXA27x 285 select PXA27x
290 select IWMMXT 286 select IWMMXT
291 select HAVE_PWM 287 select HAVE_PWM
292 select PXA_HAVE_BOARD_IRQS
293 288
294config MACH_MIOA701 289config MACH_MIOA701
295 bool "Mitac Mio A701 Support" 290 bool "Mitac Mio A701 Support"
@@ -307,7 +302,6 @@ config PXA_EZX
307 select PXA27x 302 select PXA27x
308 select IWMMXT 303 select IWMMXT
309 select HAVE_PWM 304 select HAVE_PWM
310 select PXA_HAVE_BOARD_IRQS
311 305
312config MACH_EZX_A780 306config MACH_EZX_A780
313 bool "Motorola EZX A780" 307 bool "Motorola EZX A780"
@@ -478,7 +472,6 @@ config MACH_POODLE
478 depends on PXA_SHARPSL 472 depends on PXA_SHARPSL
479 select PXA25x 473 select PXA25x
480 select SHARP_LOCOMO 474 select SHARP_LOCOMO
481 select PXA_HAVE_BOARD_IRQS
482 475
483config MACH_CORGI 476config MACH_CORGI
484 bool "Enable Sharp SL-C700 (Corgi) Support" 477 bool "Enable Sharp SL-C700 (Corgi) Support"
@@ -523,7 +516,6 @@ config MACH_TOSA
523 bool "Enable Sharp SL-6000x (Tosa) Support" 516 bool "Enable Sharp SL-6000x (Tosa) Support"
524 depends on PXA_SHARPSL 517 depends on PXA_SHARPSL
525 select PXA25x 518 select PXA25x
526 select PXA_HAVE_BOARD_IRQS
527 519
528config TOSA_BT 520config TOSA_BT
529 tristate "Control the state of built-in bluetooth chip on Sharp SL-6000" 521 tristate "Control the state of built-in bluetooth chip on Sharp SL-6000"
@@ -552,7 +544,7 @@ config MACH_ICONTROL
552config ARCH_PXA_ESERIES 544config ARCH_PXA_ESERIES
553 bool "PXA based Toshiba e-series PDAs" 545 bool "PXA based Toshiba e-series PDAs"
554 select PXA25x 546 select PXA25x
555 select PXA_HAVE_BOARD_IRQS 547 select FB_W100
556 548
557config MACH_E330 549config MACH_E330
558 bool "Toshiba e330" 550 bool "Toshiba e330"
@@ -606,7 +598,6 @@ config MACH_ZIPIT2
606 bool "Zipit Z2 Handheld" 598 bool "Zipit Z2 Handheld"
607 select PXA27x 599 select PXA27x
608 select HAVE_PWM 600 select HAVE_PWM
609 select PXA_HAVE_BOARD_IRQS
610 601
611endmenu 602endmenu
612 603
@@ -643,6 +634,7 @@ config CPU_PXA300
643config CPU_PXA310 634config CPU_PXA310
644 bool 635 bool
645 select CPU_PXA300 636 select CPU_PXA300
637 select PXA310_ULPI if USB_ULPI
646 help 638 help
647 PXA310 (codename Monahans-LV) 639 PXA310 (codename Monahans-LV)
648 640
@@ -664,11 +656,17 @@ config CPU_PXA935
664 help 656 help
665 PXA935 (codename Tavor-P65) 657 PXA935 (codename Tavor-P65)
666 658
667config CPU_PXA950 659config PXA95x
668 bool 660 bool
669 select CPU_PXA930 661 select CPU_PJ4
670 help 662 help
671 PXA950 (codename Tavor-PV2) 663 Select code specific to PXA95x variants
664
665config CPU_PXA955
666 bool
667 select PXA95x
668 help
669 PXA950 (codename MG1)
672 670
673config PXA_SHARP_C7xx 671config PXA_SHARP_C7xx
674 bool 672 bool
@@ -692,10 +690,10 @@ config SHARPSL_PM_MAX1111
692 select HWMON 690 select HWMON
693 select SENSORS_MAX1111 691 select SENSORS_MAX1111
694 692
695config PXA_HAVE_BOARD_IRQS 693config PXA_HAVE_ISA_IRQS
696 bool 694 bool
697 695
698config PXA_HAVE_ISA_IRQS 696config PXA310_ULPI
699 bool 697 bool
700 698
701endif 699endif
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index 85c7fb324dbb..cc39d17b2e07 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -16,9 +16,10 @@ endif
16# Generic drivers that other drivers may depend upon 16# Generic drivers that other drivers may depend upon
17 17
18# SoC-specific code 18# SoC-specific code
19obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o pxa2xx.o pxa25x.o 19obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa25x.o
20obj-$(CONFIG_PXA27x) += mfp-pxa2xx.o pxa2xx.o pxa27x.o 20obj-$(CONFIG_PXA27x) += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa27x.o
21obj-$(CONFIG_PXA3xx) += mfp-pxa3xx.o pxa3xx.o smemc.o 21obj-$(CONFIG_PXA3xx) += mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o smemc.o pxa3xx-ulpi.o
22obj-$(CONFIG_PXA95x) += mfp-pxa3xx.o clock-pxa3xx.o pxa95x.o smemc.o
22obj-$(CONFIG_CPU_PXA300) += pxa300.o 23obj-$(CONFIG_CPU_PXA300) += pxa300.o
23obj-$(CONFIG_CPU_PXA320) += pxa320.o 24obj-$(CONFIG_CPU_PXA320) += pxa320.o
24obj-$(CONFIG_CPU_PXA930) += pxa930.o 25obj-$(CONFIG_CPU_PXA930) += pxa930.o
@@ -32,7 +33,9 @@ obj-$(CONFIG_MACH_ZYLONITE300) += zylonite.o zylonite_pxa300.o
32obj-$(CONFIG_MACH_ZYLONITE320) += zylonite.o zylonite_pxa320.o 33obj-$(CONFIG_MACH_ZYLONITE320) += zylonite.o zylonite_pxa320.o
33obj-$(CONFIG_MACH_LITTLETON) += littleton.o 34obj-$(CONFIG_MACH_LITTLETON) += littleton.o
34obj-$(CONFIG_MACH_TAVOREVB) += tavorevb.o 35obj-$(CONFIG_MACH_TAVOREVB) += tavorevb.o
36obj-$(CONFIG_MACH_TAVOREVB3) += tavorevb3.o
35obj-$(CONFIG_MACH_SAAR) += saar.o 37obj-$(CONFIG_MACH_SAAR) += saar.o
38obj-$(CONFIG_MACH_SAARB) += saarb.o
36 39
37# 3rd Party Dev Platforms 40# 3rd Party Dev Platforms
38obj-$(CONFIG_ARCH_PXA_IDP) += idp.o 41obj-$(CONFIG_ARCH_PXA_IDP) += idp.o
@@ -59,7 +62,7 @@ obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o
59obj-$(CONFIG_MACH_PCM027) += pcm027.o 62obj-$(CONFIG_MACH_PCM027) += pcm027.o
60obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o 63obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o
61obj-$(CONFIG_MACH_COLIBRI) += colibri-pxa270.o 64obj-$(CONFIG_MACH_COLIBRI) += colibri-pxa270.o
62obj-$(CONFIG_MACH_COLIBRI_PXA270_EVALBOARD) += colibri-pxa270-evalboard.o 65obj-$(CONFIG_MACH_COLIBRI_EVALBOARD) += colibri-evalboard.o
63obj-$(CONFIG_MACH_COLIBRI_PXA270_INCOME) += colibri-pxa270-income.o 66obj-$(CONFIG_MACH_COLIBRI_PXA270_INCOME) += colibri-pxa270-income.o
64obj-$(CONFIG_MACH_COLIBRI300) += colibri-pxa3xx.o colibri-pxa300.o 67obj-$(CONFIG_MACH_COLIBRI300) += colibri-pxa3xx.o colibri-pxa300.o
65obj-$(CONFIG_MACH_COLIBRI320) += colibri-pxa3xx.o colibri-pxa320.o 68obj-$(CONFIG_MACH_COLIBRI320) += colibri-pxa3xx.o colibri-pxa320.o
diff --git a/arch/arm/mach-pxa/am200epd.c b/arch/arm/mach-pxa/am200epd.c
index 3499fada73ae..4cb069fd9af2 100644
--- a/arch/arm/mach-pxa/am200epd.c
+++ b/arch/arm/mach-pxa/am200epd.c
@@ -128,8 +128,8 @@ static int am200_init_gpio_regs(struct metronomefb_par *par)
128 return 0; 128 return 0;
129 129
130err_req_gpio: 130err_req_gpio:
131 while (i > 0) 131 while (--i >= 0)
132 gpio_free(gpios[i--]); 132 gpio_free(gpios[i]);
133 133
134 return err; 134 return err;
135} 135}
@@ -194,7 +194,7 @@ static struct notifier_block am200_fb_notif = {
194}; 194};
195 195
196/* this gets called as part of our init. these steps must be done now so 196/* this gets called as part of our init. these steps must be done now so
197 * that we can use set_pxa_fb_info */ 197 * that we can use pxa_set_fb_info */
198static void __init am200_presetup_fb(void) 198static void __init am200_presetup_fb(void)
199{ 199{
200 int fw; 200 int fw;
@@ -249,7 +249,7 @@ static void __init am200_presetup_fb(void)
249 /* we divide since we told the LCD controller we're 16bpp */ 249 /* we divide since we told the LCD controller we're 16bpp */
250 am200_fb_info.modes->xres /= 2; 250 am200_fb_info.modes->xres /= 2;
251 251
252 set_pxa_fb_info(&am200_fb_info); 252 pxa_set_fb_info(NULL, &am200_fb_info);
253 253
254} 254}
255 255
diff --git a/arch/arm/mach-pxa/am300epd.c b/arch/arm/mach-pxa/am300epd.c
index 993d75e66390..fa8bad235d9f 100644
--- a/arch/arm/mach-pxa/am300epd.c
+++ b/arch/arm/mach-pxa/am300epd.c
@@ -125,10 +125,7 @@ static int am300_init_gpio_regs(struct broadsheetfb_par *par)
125 if (err) { 125 if (err) {
126 dev_err(&am300_device->dev, "failed requesting " 126 dev_err(&am300_device->dev, "failed requesting "
127 "gpio %d, err=%d\n", i, err); 127 "gpio %d, err=%d\n", i, err);
128 while (i >= DB0_GPIO_PIN) 128 goto err_req_gpio2;
129 gpio_free(i--);
130 i = ARRAY_SIZE(gpios) - 1;
131 goto err_req_gpio;
132 } 129 }
133 } 130 }
134 131
@@ -159,9 +156,13 @@ static int am300_init_gpio_regs(struct broadsheetfb_par *par)
159 156
160 return 0; 157 return 0;
161 158
159err_req_gpio2:
160 while (--i >= DB0_GPIO_PIN)
161 gpio_free(i);
162 i = ARRAY_SIZE(gpios);
162err_req_gpio: 163err_req_gpio:
163 while (i > 0) 164 while (--i >= 0)
164 gpio_free(gpios[i--]); 165 gpio_free(gpios[i]);
165 166
166 return err; 167 return err;
167} 168}
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index 9041340fee1d..810a982a66f8 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -15,7 +15,6 @@
15 15
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/sysdev.h>
19#include <linux/interrupt.h> 18#include <linux/interrupt.h>
20#include <linux/sched.h> 19#include <linux/sched.h>
21#include <linux/bitops.h> 20#include <linux/bitops.h>
@@ -27,6 +26,7 @@
27#include <linux/mtd/partitions.h> 26#include <linux/mtd/partitions.h>
28#include <linux/types.h> 27#include <linux/types.h>
29#include <linux/i2c/pcf857x.h> 28#include <linux/i2c/pcf857x.h>
29#include <linux/i2c/pxa-i2c.h>
30#include <linux/mtd/nand.h> 30#include <linux/mtd/nand.h>
31#include <linux/mtd/physmap.h> 31#include <linux/mtd/physmap.h>
32#include <linux/regulator/max1586.h> 32#include <linux/regulator/max1586.h>
@@ -51,8 +51,6 @@
51#include <mach/irda.h> 51#include <mach/irda.h>
52#include <mach/ohci.h> 52#include <mach/ohci.h>
53 53
54#include <plat/i2c.h>
55
56#include "generic.h" 54#include "generic.h"
57#include "devices.h" 55#include "devices.h"
58 56
@@ -68,42 +66,6 @@ static unsigned long balloon3_pin_config[] __initdata = {
68 66
69 /* Reset, configured as GPIO wakeup source */ 67 /* Reset, configured as GPIO wakeup source */
70 GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH, 68 GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
71
72 /* LEDs */
73 GPIO9_GPIO, /* NAND activity LED */
74 GPIO10_GPIO, /* Heartbeat LED */
75
76 /* AC97 */
77 GPIO28_AC97_BITCLK,
78 GPIO29_AC97_SDATA_IN_0,
79 GPIO30_AC97_SDATA_OUT,
80 GPIO31_AC97_SYNC,
81 GPIO113_AC97_nRESET,
82 GPIO95_GPIO,
83
84 /* MMC */
85 GPIO32_MMC_CLK,
86 GPIO92_MMC_DAT_0,
87 GPIO109_MMC_DAT_1,
88 GPIO110_MMC_DAT_2,
89 GPIO111_MMC_DAT_3,
90 GPIO112_MMC_CMD,
91
92 /* USB Host */
93 GPIO88_USBH1_PWR,
94 GPIO89_USBH1_PEN,
95
96 /* PC Card */
97 GPIO48_nPOE,
98 GPIO49_nPWE,
99 GPIO50_nPIOR,
100 GPIO51_nPIOW,
101 GPIO85_nPCE_1,
102 GPIO54_nPCE_2,
103 GPIO79_PSKTSEL,
104 GPIO55_nPREG,
105 GPIO56_nPWAIT,
106 GPIO57_nIOIS16,
107}; 69};
108 70
109/****************************************************************************** 71/******************************************************************************
@@ -132,6 +94,34 @@ int __init parse_balloon3_features(char *arg)
132early_param("balloon3_features", parse_balloon3_features); 94early_param("balloon3_features", parse_balloon3_features);
133 95
134/****************************************************************************** 96/******************************************************************************
97 * Compact Flash slot
98 ******************************************************************************/
99#if defined(CONFIG_PCMCIA_PXA2XX) || defined(CONFIG_PCMCIA_PXA2XX_MODULE)
100static unsigned long balloon3_cf_pin_config[] __initdata = {
101 GPIO48_nPOE,
102 GPIO49_nPWE,
103 GPIO50_nPIOR,
104 GPIO51_nPIOW,
105 GPIO85_nPCE_1,
106 GPIO54_nPCE_2,
107 GPIO79_PSKTSEL,
108 GPIO55_nPREG,
109 GPIO56_nPWAIT,
110 GPIO57_nIOIS16,
111};
112
113static void __init balloon3_cf_init(void)
114{
115 if (!balloon3_has(BALLOON3_FEATURE_CF))
116 return;
117
118 pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_cf_pin_config));
119}
120#else
121static inline void balloon3_cf_init(void) {}
122#endif
123
124/******************************************************************************
135 * NOR Flash 125 * NOR Flash
136 ******************************************************************************/ 126 ******************************************************************************/
137#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) 127#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
@@ -179,6 +169,15 @@ static inline void balloon3_nor_init(void) {}
179 ******************************************************************************/ 169 ******************************************************************************/
180#if defined(CONFIG_TOUCHSCREEN_UCB1400) || \ 170#if defined(CONFIG_TOUCHSCREEN_UCB1400) || \
181 defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE) 171 defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
172static unsigned long balloon3_ac97_pin_config[] __initdata = {
173 GPIO28_AC97_BITCLK,
174 GPIO29_AC97_SDATA_IN_0,
175 GPIO30_AC97_SDATA_OUT,
176 GPIO31_AC97_SYNC,
177 GPIO113_AC97_nRESET,
178 GPIO95_GPIO,
179};
180
182static struct ucb1400_pdata vpac270_ucb1400_pdata = { 181static struct ucb1400_pdata vpac270_ucb1400_pdata = {
183 .irq = IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ), 182 .irq = IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ),
184}; 183};
@@ -197,6 +196,7 @@ static void __init balloon3_ts_init(void)
197 if (!balloon3_has(BALLOON3_FEATURE_AUDIO)) 196 if (!balloon3_has(BALLOON3_FEATURE_AUDIO))
198 return; 197 return;
199 198
199 pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_ac97_pin_config));
200 pxa_set_ac97_info(NULL); 200 pxa_set_ac97_info(NULL);
201 platform_device_register(&balloon3_ucb1400_device); 201 platform_device_register(&balloon3_ucb1400_device);
202} 202}
@@ -208,6 +208,11 @@ static inline void balloon3_ts_init(void) {}
208 * Framebuffer 208 * Framebuffer
209 ******************************************************************************/ 209 ******************************************************************************/
210#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) 210#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
211static unsigned long balloon3_lcd_pin_config[] __initdata = {
212 GPIOxx_LCD_TFT_16BPP,
213 GPIO99_GPIO,
214};
215
211static struct pxafb_mode_info balloon3_lcd_modes[] = { 216static struct pxafb_mode_info balloon3_lcd_modes[] = {
212 { 217 {
213 .pixclock = 38000, 218 .pixclock = 38000,
@@ -242,6 +247,8 @@ static void __init balloon3_lcd_init(void)
242 if (!balloon3_has(BALLOON3_FEATURE_TOPPOLY)) 247 if (!balloon3_has(BALLOON3_FEATURE_TOPPOLY))
243 return; 248 return;
244 249
250 pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_lcd_pin_config));
251
245 ret = gpio_request(BALLOON3_GPIO_RUN_BACKLIGHT, "BKL-ON"); 252 ret = gpio_request(BALLOON3_GPIO_RUN_BACKLIGHT, "BKL-ON");
246 if (ret) { 253 if (ret) {
247 pr_err("Requesting BKL-ON GPIO failed!\n"); 254 pr_err("Requesting BKL-ON GPIO failed!\n");
@@ -255,7 +262,7 @@ static void __init balloon3_lcd_init(void)
255 } 262 }
256 263
257 balloon3_lcd_screen.pxafb_backlight_power = balloon3_backlight_power; 264 balloon3_lcd_screen.pxafb_backlight_power = balloon3_backlight_power;
258 set_pxa_fb_info(&balloon3_lcd_screen); 265 pxa_set_fb_info(NULL, &balloon3_lcd_screen);
259 return; 266 return;
260 267
261err2: 268err2:
@@ -271,6 +278,15 @@ static inline void balloon3_lcd_init(void) {}
271 * SD/MMC card controller 278 * SD/MMC card controller
272 ******************************************************************************/ 279 ******************************************************************************/
273#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE) 280#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
281static unsigned long balloon3_mmc_pin_config[] __initdata = {
282 GPIO32_MMC_CLK,
283 GPIO92_MMC_DAT_0,
284 GPIO109_MMC_DAT_1,
285 GPIO110_MMC_DAT_2,
286 GPIO111_MMC_DAT_3,
287 GPIO112_MMC_CMD,
288};
289
274static struct pxamci_platform_data balloon3_mci_platform_data = { 290static struct pxamci_platform_data balloon3_mci_platform_data = {
275 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, 291 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
276 .gpio_card_detect = -1, 292 .gpio_card_detect = -1,
@@ -281,6 +297,7 @@ static struct pxamci_platform_data balloon3_mci_platform_data = {
281 297
282static void __init balloon3_mmc_init(void) 298static void __init balloon3_mmc_init(void)
283{ 299{
300 pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_mmc_pin_config));
284 pxa_set_mci_info(&balloon3_mci_platform_data); 301 pxa_set_mci_info(&balloon3_mci_platform_data);
285} 302}
286#else 303#else
@@ -339,6 +356,11 @@ static inline void balloon3_irda_init(void) {}
339 * USB Host 356 * USB Host
340 ******************************************************************************/ 357 ******************************************************************************/
341#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) 358#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
359static unsigned long balloon3_uhc_pin_config[] __initdata = {
360 GPIO88_USBH1_PWR,
361 GPIO89_USBH1_PEN,
362};
363
342static struct pxaohci_platform_data balloon3_ohci_info = { 364static struct pxaohci_platform_data balloon3_ohci_info = {
343 .port_mode = PMM_PERPORT_MODE, 365 .port_mode = PMM_PERPORT_MODE,
344 .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW, 366 .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
@@ -348,6 +370,7 @@ static void __init balloon3_uhc_init(void)
348{ 370{
349 if (!balloon3_has(BALLOON3_FEATURE_OHCI)) 371 if (!balloon3_has(BALLOON3_FEATURE_OHCI))
350 return; 372 return;
373 pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_uhc_pin_config));
351 pxa_set_ohci_info(&balloon3_ohci_info); 374 pxa_set_ohci_info(&balloon3_ohci_info);
352} 375}
353#else 376#else
@@ -358,6 +381,11 @@ static inline void balloon3_uhc_init(void) {}
358 * LEDs 381 * LEDs
359 ******************************************************************************/ 382 ******************************************************************************/
360#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) 383#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
384static unsigned long balloon3_led_pin_config[] __initdata = {
385 GPIO9_GPIO, /* NAND activity LED */
386 GPIO10_GPIO, /* Heartbeat LED */
387};
388
361struct gpio_led balloon3_gpio_leds[] = { 389struct gpio_led balloon3_gpio_leds[] = {
362 { 390 {
363 .name = "balloon3:green:idle", 391 .name = "balloon3:green:idle",
@@ -436,6 +464,7 @@ static struct platform_device balloon3_pcf_leds = {
436 464
437static void __init balloon3_leds_init(void) 465static void __init balloon3_leds_init(void)
438{ 466{
467 pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_led_pin_config));
439 platform_device_register(&balloon3_leds); 468 platform_device_register(&balloon3_leds);
440 platform_device_register(&balloon3_pcf_leds); 469 platform_device_register(&balloon3_pcf_leds);
441} 470}
@@ -446,25 +475,25 @@ static inline void balloon3_leds_init(void) {}
446/****************************************************************************** 475/******************************************************************************
447 * FPGA IRQ 476 * FPGA IRQ
448 ******************************************************************************/ 477 ******************************************************************************/
449static void balloon3_mask_irq(unsigned int irq) 478static void balloon3_mask_irq(struct irq_data *d)
450{ 479{
451 int balloon3_irq = (irq - BALLOON3_IRQ(0)); 480 int balloon3_irq = (d->irq - BALLOON3_IRQ(0));
452 balloon3_irq_enabled &= ~(1 << balloon3_irq); 481 balloon3_irq_enabled &= ~(1 << balloon3_irq);
453 __raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG); 482 __raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG);
454} 483}
455 484
456static void balloon3_unmask_irq(unsigned int irq) 485static void balloon3_unmask_irq(struct irq_data *d)
457{ 486{
458 int balloon3_irq = (irq - BALLOON3_IRQ(0)); 487 int balloon3_irq = (d->irq - BALLOON3_IRQ(0));
459 balloon3_irq_enabled |= (1 << balloon3_irq); 488 balloon3_irq_enabled |= (1 << balloon3_irq);
460 __raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG); 489 __raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG);
461} 490}
462 491
463static struct irq_chip balloon3_irq_chip = { 492static struct irq_chip balloon3_irq_chip = {
464 .name = "FPGA", 493 .name = "FPGA",
465 .ack = balloon3_mask_irq, 494 .irq_ack = balloon3_mask_irq,
466 .mask = balloon3_mask_irq, 495 .irq_mask = balloon3_mask_irq,
467 .unmask = balloon3_unmask_irq, 496 .irq_unmask = balloon3_unmask_irq,
468}; 497};
469 498
470static void balloon3_irq_handler(unsigned int irq, struct irq_desc *desc) 499static void balloon3_irq_handler(unsigned int irq, struct irq_desc *desc)
@@ -473,8 +502,13 @@ static void balloon3_irq_handler(unsigned int irq, struct irq_desc *desc)
473 balloon3_irq_enabled; 502 balloon3_irq_enabled;
474 do { 503 do {
475 /* clear useless edge notification */ 504 /* clear useless edge notification */
476 if (desc->chip->ack) 505 if (desc->irq_data.chip->irq_ack) {
477 desc->chip->ack(BALLOON3_AUX_NIRQ); 506 struct irq_data *d;
507
508 d = irq_get_irq_data(BALLOON3_AUX_NIRQ);
509 desc->irq_data.chip->irq_ack(d);
510 }
511
478 while (pending) { 512 while (pending) {
479 irq = BALLOON3_IRQ(0) + __ffs(pending); 513 irq = BALLOON3_IRQ(0) + __ffs(pending);
480 generic_handle_irq(irq); 514 generic_handle_irq(irq);
@@ -492,13 +526,13 @@ static void __init balloon3_init_irq(void)
492 pxa27x_init_irq(); 526 pxa27x_init_irq();
493 /* setup extra Balloon3 irqs */ 527 /* setup extra Balloon3 irqs */
494 for (irq = BALLOON3_IRQ(0); irq <= BALLOON3_IRQ(7); irq++) { 528 for (irq = BALLOON3_IRQ(0); irq <= BALLOON3_IRQ(7); irq++) {
495 set_irq_chip(irq, &balloon3_irq_chip); 529 irq_set_chip_and_handler(irq, &balloon3_irq_chip,
496 set_irq_handler(irq, handle_level_irq); 530 handle_level_irq);
497 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 531 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
498 } 532 }
499 533
500 set_irq_chained_handler(BALLOON3_AUX_NIRQ, balloon3_irq_handler); 534 irq_set_chained_handler(BALLOON3_AUX_NIRQ, balloon3_irq_handler);
501 set_irq_type(BALLOON3_AUX_NIRQ, IRQ_TYPE_EDGE_FALLING); 535 irq_set_irq_type(BALLOON3_AUX_NIRQ, IRQ_TYPE_EDGE_FALLING);
502 536
503 pr_debug("%s: chained handler installed - irq %d automatically " 537 pr_debug("%s: chained handler installed - irq %d automatically "
504 "enabled\n", __func__, BALLOON3_AUX_NIRQ); 538 "enabled\n", __func__, BALLOON3_AUX_NIRQ);
@@ -536,27 +570,29 @@ static inline void balloon3_i2c_init(void) {}
536 * NAND 570 * NAND
537 ******************************************************************************/ 571 ******************************************************************************/
538#if defined(CONFIG_MTD_NAND_PLATFORM)||defined(CONFIG_MTD_NAND_PLATFORM_MODULE) 572#if defined(CONFIG_MTD_NAND_PLATFORM)||defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
539static uint16_t balloon3_ctl =
540 BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 |
541 BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3 |
542 BALLOON3_NAND_CONTROL_FLWP;
543
544static void balloon3_nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl) 573static void balloon3_nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
545{ 574{
546 struct nand_chip *this = mtd->priv; 575 struct nand_chip *this = mtd->priv;
576 uint8_t balloon3_ctl_set = 0, balloon3_ctl_clr = 0;
547 577
548 if (ctrl & NAND_CTRL_CHANGE) { 578 if (ctrl & NAND_CTRL_CHANGE) {
549 if (ctrl & NAND_CLE) 579 if (ctrl & NAND_CLE)
550 balloon3_ctl |= BALLOON3_NAND_CONTROL_FLCLE; 580 balloon3_ctl_set |= BALLOON3_NAND_CONTROL_FLCLE;
551 else 581 else
552 balloon3_ctl &= ~BALLOON3_NAND_CONTROL_FLCLE; 582 balloon3_ctl_clr |= BALLOON3_NAND_CONTROL_FLCLE;
553 583
554 if (ctrl & NAND_ALE) 584 if (ctrl & NAND_ALE)
555 balloon3_ctl |= BALLOON3_NAND_CONTROL_FLALE; 585 balloon3_ctl_set |= BALLOON3_NAND_CONTROL_FLALE;
556 else 586 else
557 balloon3_ctl &= ~BALLOON3_NAND_CONTROL_FLALE; 587 balloon3_ctl_clr |= BALLOON3_NAND_CONTROL_FLALE;
558 588
559 __raw_writel(balloon3_ctl, BALLOON3_NAND_CONTROL_REG); 589 if (balloon3_ctl_clr)
590 __raw_writel(balloon3_ctl_clr,
591 BALLOON3_NAND_CONTROL_REG);
592 if (balloon3_ctl_set)
593 __raw_writel(balloon3_ctl_set,
594 BALLOON3_NAND_CONTROL_REG |
595 BALLOON3_FPGA_SETnCLR);
560 } 596 }
561 597
562 if (cmd != NAND_CMD_NONE) 598 if (cmd != NAND_CMD_NONE)
@@ -568,28 +604,33 @@ static void balloon3_nand_select_chip(struct mtd_info *mtd, int chip)
568 if (chip < 0 || chip > 3) 604 if (chip < 0 || chip > 3)
569 return; 605 return;
570 606
571 balloon3_ctl |= BALLOON3_NAND_CONTROL_FLCE0 | 607 /* Assert all nCE lines */
572 BALLOON3_NAND_CONTROL_FLCE1 | 608 __raw_writew(
573 BALLOON3_NAND_CONTROL_FLCE2 | 609 BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 |
574 BALLOON3_NAND_CONTROL_FLCE3; 610 BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3,
611 BALLOON3_NAND_CONTROL_REG | BALLOON3_FPGA_SETnCLR);
575 612
576 /* Deassert correct nCE line */ 613 /* Deassert correct nCE line */
577 balloon3_ctl &= ~(BALLOON3_NAND_CONTROL_FLCE0 << chip); 614 __raw_writew(BALLOON3_NAND_CONTROL_FLCE0 << chip,
615 BALLOON3_NAND_CONTROL_REG);
616}
578 617
579 __raw_writew(balloon3_ctl, BALLOON3_NAND_CONTROL_REG); 618static int balloon3_nand_dev_ready(struct mtd_info *mtd)
619{
620 return __raw_readl(BALLOON3_NAND_STAT_REG) & BALLOON3_NAND_STAT_RNB;
580} 621}
581 622
582static int balloon3_nand_probe(struct platform_device *pdev) 623static int balloon3_nand_probe(struct platform_device *pdev)
583{ 624{
584 void __iomem *temp_map;
585 uint16_t ver; 625 uint16_t ver;
586 int ret; 626 int ret;
587 627
588 __raw_writew(BALLOON3_NAND_CONTROL2_16BIT, BALLOON3_NAND_CONTROL2_REG); 628 __raw_writew(BALLOON3_NAND_CONTROL2_16BIT,
629 BALLOON3_NAND_CONTROL2_REG | BALLOON3_FPGA_SETnCLR);
589 630
590 ver = __raw_readw(BALLOON3_FPGA_VER); 631 ver = __raw_readw(BALLOON3_FPGA_VER);
591 if (ver > 0x0201) 632 if (ver < 0x4f08)
592 pr_warn("The FPGA code, version 0x%04x, is newer than rel-0.3. " 633 pr_warn("The FPGA code, version 0x%04x, is too old. "
593 "NAND support might be broken in this version!", ver); 634 "NAND support might be broken in this version!", ver);
594 635
595 /* Power up the NAND chips */ 636 /* Power up the NAND chips */
@@ -604,7 +645,11 @@ static int balloon3_nand_probe(struct platform_device *pdev)
604 gpio_set_value(BALLOON3_GPIO_RUN_NAND, 1); 645 gpio_set_value(BALLOON3_GPIO_RUN_NAND, 1);
605 646
606 /* Deassert all nCE lines and write protect line */ 647 /* Deassert all nCE lines and write protect line */
607 __raw_writel(balloon3_ctl, BALLOON3_NAND_CONTROL_REG); 648 __raw_writel(
649 BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 |
650 BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3 |
651 BALLOON3_NAND_CONTROL_FLWP,
652 BALLOON3_NAND_CONTROL_REG | BALLOON3_FPGA_SETnCLR);
608 return 0; 653 return 0;
609 654
610err2: 655err2:
@@ -646,7 +691,7 @@ struct platform_nand_data balloon3_nand_pdata = {
646 }, 691 },
647 .ctrl = { 692 .ctrl = {
648 .hwcontrol = 0, 693 .hwcontrol = 0,
649 .dev_ready = 0, 694 .dev_ready = balloon3_nand_dev_ready,
650 .select_chip = balloon3_nand_select_chip, 695 .select_chip = balloon3_nand_select_chip,
651 .cmd_ctrl = balloon3_nand_cmd_ctl, 696 .cmd_ctrl = balloon3_nand_cmd_ctl,
652 .probe = balloon3_nand_probe, 697 .probe = balloon3_nand_probe,
@@ -757,6 +802,7 @@ static void __init balloon3_init(void)
757 balloon3_ts_init(); 802 balloon3_ts_init();
758 balloon3_udc_init(); 803 balloon3_udc_init();
759 balloon3_uhc_init(); 804 balloon3_uhc_init();
805 balloon3_cf_init();
760} 806}
761 807
762static struct map_desc balloon3_io_desc[] __initdata = { 808static struct map_desc balloon3_io_desc[] __initdata = {
@@ -770,17 +816,16 @@ static struct map_desc balloon3_io_desc[] __initdata = {
770 816
771static void __init balloon3_map_io(void) 817static void __init balloon3_map_io(void)
772{ 818{
773 pxa_map_io(); 819 pxa27x_map_io();
774 iotable_init(balloon3_io_desc, ARRAY_SIZE(balloon3_io_desc)); 820 iotable_init(balloon3_io_desc, ARRAY_SIZE(balloon3_io_desc));
775} 821}
776 822
777MACHINE_START(BALLOON3, "Balloon3") 823MACHINE_START(BALLOON3, "Balloon3")
778 /* Maintainer: Nick Bane. */ 824 /* Maintainer: Nick Bane. */
779 .phys_io = 0x40000000,
780 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
781 .map_io = balloon3_map_io, 825 .map_io = balloon3_map_io,
826 .nr_irqs = BALLOON3_NR_IRQS,
782 .init_irq = balloon3_init_irq, 827 .init_irq = balloon3_init_irq,
783 .timer = &pxa_timer, 828 .timer = &pxa_timer,
784 .init_machine = balloon3_init, 829 .init_machine = balloon3_init,
785 .boot_params = PHYS_OFFSET + 0x100, 830 .boot_params = PLAT_PHYS_OFFSET + 0x100,
786MACHINE_END 831MACHINE_END
diff --git a/arch/arm/mach-pxa/capc7117.c b/arch/arm/mach-pxa/capc7117.c
index aae544631a8b..4284513f396a 100644
--- a/arch/arm/mach-pxa/capc7117.c
+++ b/arch/arm/mach-pxa/capc7117.c
@@ -148,10 +148,8 @@ static void __init capc7117_init(void)
148 148
149MACHINE_START(CAPC7117, 149MACHINE_START(CAPC7117,
150 "Embedian CAPC-7117 evaluation kit based on the MXM-8x10 CoM") 150 "Embedian CAPC-7117 evaluation kit based on the MXM-8x10 CoM")
151 .phys_io = 0x40000000,
152 .boot_params = 0xa0000100, 151 .boot_params = 0xa0000100,
153 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, 152 .map_io = pxa3xx_map_io,
154 .map_io = pxa_map_io,
155 .init_irq = pxa3xx_init_irq, 153 .init_irq = pxa3xx_init_irq,
156 .timer = &pxa_timer, 154 .timer = &pxa_timer,
157 .init_machine = capc7117_init 155 .init_machine = capc7117_init
diff --git a/arch/arm/mach-pxa/clock-pxa2xx.c b/arch/arm/mach-pxa/clock-pxa2xx.c
new file mode 100644
index 000000000000..1d5859d9a0e3
--- /dev/null
+++ b/arch/arm/mach-pxa/clock-pxa2xx.c
@@ -0,0 +1,54 @@
1/*
2 * linux/arch/arm/mach-pxa/clock-pxa2xx.c
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include <linux/module.h>
10#include <linux/kernel.h>
11#include <linux/init.h>
12#include <linux/syscore_ops.h>
13
14#include <mach/pxa2xx-regs.h>
15
16#include "clock.h"
17
18void clk_pxa2xx_cken_enable(struct clk *clk)
19{
20 CKEN |= 1 << clk->cken;
21}
22
23void clk_pxa2xx_cken_disable(struct clk *clk)
24{
25 CKEN &= ~(1 << clk->cken);
26}
27
28const struct clkops clk_pxa2xx_cken_ops = {
29 .enable = clk_pxa2xx_cken_enable,
30 .disable = clk_pxa2xx_cken_disable,
31};
32
33#ifdef CONFIG_PM
34static uint32_t saved_cken;
35
36static int pxa2xx_clock_suspend(void)
37{
38 saved_cken = CKEN;
39 return 0;
40}
41
42static void pxa2xx_clock_resume(void)
43{
44 CKEN = saved_cken;
45}
46#else
47#define pxa2xx_clock_suspend NULL
48#define pxa2xx_clock_resume NULL
49#endif
50
51struct syscore_ops pxa2xx_clock_syscore_ops = {
52 .suspend = pxa2xx_clock_suspend,
53 .resume = pxa2xx_clock_resume,
54};
diff --git a/arch/arm/mach-pxa/clock-pxa3xx.c b/arch/arm/mach-pxa/clock-pxa3xx.c
new file mode 100644
index 000000000000..2a37a9a8f621
--- /dev/null
+++ b/arch/arm/mach-pxa/clock-pxa3xx.c
@@ -0,0 +1,208 @@
1/*
2 * linux/arch/arm/mach-pxa/clock-pxa3xx.c
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include <linux/module.h>
10#include <linux/kernel.h>
11#include <linux/init.h>
12#include <linux/io.h>
13#include <linux/syscore_ops.h>
14
15#include <mach/smemc.h>
16#include <mach/pxa3xx-regs.h>
17
18#include "clock.h"
19
20/* Crystal clock: 13MHz */
21#define BASE_CLK 13000000
22
23/* Ring Oscillator Clock: 60MHz */
24#define RO_CLK 60000000
25
26#define ACCR_D0CS (1 << 26)
27#define ACCR_PCCE (1 << 11)
28
29/* crystal frequency to HSIO bus frequency multiplier (HSS) */
30static unsigned char hss_mult[4] = { 8, 12, 16, 24 };
31
32/*
33 * Get the clock frequency as reflected by CCSR and the turbo flag.
34 * We assume these values have been applied via a fcs.
35 * If info is not 0 we also display the current settings.
36 */
37unsigned int pxa3xx_get_clk_frequency_khz(int info)
38{
39 unsigned long acsr, xclkcfg;
40 unsigned int t, xl, xn, hss, ro, XL, XN, CLK, HSS;
41
42 /* Read XCLKCFG register turbo bit */
43 __asm__ __volatile__("mrc\tp14, 0, %0, c6, c0, 0" : "=r"(xclkcfg));
44 t = xclkcfg & 0x1;
45
46 acsr = ACSR;
47
48 xl = acsr & 0x1f;
49 xn = (acsr >> 8) & 0x7;
50 hss = (acsr >> 14) & 0x3;
51
52 XL = xl * BASE_CLK;
53 XN = xn * XL;
54
55 ro = acsr & ACCR_D0CS;
56
57 CLK = (ro) ? RO_CLK : ((t) ? XN : XL);
58 HSS = (ro) ? RO_CLK : hss_mult[hss] * BASE_CLK;
59
60 if (info) {
61 pr_info("RO Mode clock: %d.%02dMHz (%sactive)\n",
62 RO_CLK / 1000000, (RO_CLK % 1000000) / 10000,
63 (ro) ? "" : "in");
64 pr_info("Run Mode clock: %d.%02dMHz (*%d)\n",
65 XL / 1000000, (XL % 1000000) / 10000, xl);
66 pr_info("Turbo Mode clock: %d.%02dMHz (*%d, %sactive)\n",
67 XN / 1000000, (XN % 1000000) / 10000, xn,
68 (t) ? "" : "in");
69 pr_info("HSIO bus clock: %d.%02dMHz\n",
70 HSS / 1000000, (HSS % 1000000) / 10000);
71 }
72
73 return CLK / 1000;
74}
75
76/*
77 * Return the current AC97 clock frequency.
78 */
79static unsigned long clk_pxa3xx_ac97_getrate(struct clk *clk)
80{
81 unsigned long rate = 312000000;
82 unsigned long ac97_div;
83
84 ac97_div = AC97_DIV;
85
86 /* This may loose precision for some rates but won't for the
87 * standard 24.576MHz.
88 */
89 rate /= (ac97_div >> 12) & 0x7fff;
90 rate *= (ac97_div & 0xfff);
91
92 return rate;
93}
94
95/*
96 * Return the current HSIO bus clock frequency
97 */
98static unsigned long clk_pxa3xx_hsio_getrate(struct clk *clk)
99{
100 unsigned long acsr;
101 unsigned int hss, hsio_clk;
102
103 acsr = ACSR;
104
105 hss = (acsr >> 14) & 0x3;
106 hsio_clk = (acsr & ACCR_D0CS) ? RO_CLK : hss_mult[hss] * BASE_CLK;
107
108 return hsio_clk;
109}
110
111/* crystal frequency to static memory controller multiplier (SMCFS) */
112static unsigned int smcfs_mult[8] = { 6, 0, 8, 0, 0, 16, };
113static unsigned int df_clkdiv[4] = { 1, 2, 4, 1 };
114
115static unsigned long clk_pxa3xx_smemc_getrate(struct clk *clk)
116{
117 unsigned long acsr = ACSR;
118 unsigned long memclkcfg = __raw_readl(MEMCLKCFG);
119
120 return BASE_CLK * smcfs_mult[(acsr >> 23) & 0x7] /
121 df_clkdiv[(memclkcfg >> 16) & 0x3];
122}
123
124void clk_pxa3xx_cken_enable(struct clk *clk)
125{
126 unsigned long mask = 1ul << (clk->cken & 0x1f);
127
128 if (clk->cken < 32)
129 CKENA |= mask;
130 else
131 CKENB |= mask;
132}
133
134void clk_pxa3xx_cken_disable(struct clk *clk)
135{
136 unsigned long mask = 1ul << (clk->cken & 0x1f);
137
138 if (clk->cken < 32)
139 CKENA &= ~mask;
140 else
141 CKENB &= ~mask;
142}
143
144const struct clkops clk_pxa3xx_cken_ops = {
145 .enable = clk_pxa3xx_cken_enable,
146 .disable = clk_pxa3xx_cken_disable,
147};
148
149const struct clkops clk_pxa3xx_hsio_ops = {
150 .enable = clk_pxa3xx_cken_enable,
151 .disable = clk_pxa3xx_cken_disable,
152 .getrate = clk_pxa3xx_hsio_getrate,
153};
154
155const struct clkops clk_pxa3xx_ac97_ops = {
156 .enable = clk_pxa3xx_cken_enable,
157 .disable = clk_pxa3xx_cken_disable,
158 .getrate = clk_pxa3xx_ac97_getrate,
159};
160
161const struct clkops clk_pxa3xx_smemc_ops = {
162 .enable = clk_pxa3xx_cken_enable,
163 .disable = clk_pxa3xx_cken_disable,
164 .getrate = clk_pxa3xx_smemc_getrate,
165};
166
167static void clk_pout_enable(struct clk *clk)
168{
169 OSCC |= OSCC_PEN;
170}
171
172static void clk_pout_disable(struct clk *clk)
173{
174 OSCC &= ~OSCC_PEN;
175}
176
177const struct clkops clk_pxa3xx_pout_ops = {
178 .enable = clk_pout_enable,
179 .disable = clk_pout_disable,
180};
181
182#ifdef CONFIG_PM
183static uint32_t cken[2];
184static uint32_t accr;
185
186static int pxa3xx_clock_suspend(void)
187{
188 cken[0] = CKENA;
189 cken[1] = CKENB;
190 accr = ACCR;
191 return 0;
192}
193
194static void pxa3xx_clock_resume(void)
195{
196 ACCR = accr;
197 CKENA = cken[0];
198 CKENB = cken[1];
199}
200#else
201#define pxa3xx_clock_suspend NULL
202#define pxa3xx_clock_resume NULL
203#endif
204
205struct syscore_ops pxa3xx_clock_syscore_ops = {
206 .suspend = pxa3xx_clock_suspend,
207 .resume = pxa3xx_clock_resume,
208};
diff --git a/arch/arm/mach-pxa/clock.c b/arch/arm/mach-pxa/clock.c
index abba0089a2ae..d5152220ce94 100644
--- a/arch/arm/mach-pxa/clock.c
+++ b/arch/arm/mach-pxa/clock.c
@@ -3,21 +3,11 @@
3 */ 3 */
4#include <linux/module.h> 4#include <linux/module.h>
5#include <linux/kernel.h> 5#include <linux/kernel.h>
6#include <linux/list.h>
7#include <linux/errno.h>
8#include <linux/err.h>
9#include <linux/string.h>
10#include <linux/clk.h> 6#include <linux/clk.h>
11#include <linux/spinlock.h> 7#include <linux/spinlock.h>
12#include <linux/platform_device.h>
13#include <linux/delay.h> 8#include <linux/delay.h>
9#include <linux/clkdev.h>
14 10
15#include <asm/clkdev.h>
16#include <mach/pxa2xx-regs.h>
17#include <mach/hardware.h>
18
19#include "devices.h"
20#include "generic.h"
21#include "clock.h" 11#include "clock.h"
22 12
23static DEFINE_SPINLOCK(clocks_lock); 13static DEFINE_SPINLOCK(clocks_lock);
@@ -63,18 +53,19 @@ unsigned long clk_get_rate(struct clk *clk)
63} 53}
64EXPORT_SYMBOL(clk_get_rate); 54EXPORT_SYMBOL(clk_get_rate);
65 55
66 56void clk_dummy_enable(struct clk *clk)
67void clk_cken_enable(struct clk *clk)
68{ 57{
69 CKEN |= 1 << clk->cken;
70} 58}
71 59
72void clk_cken_disable(struct clk *clk) 60void clk_dummy_disable(struct clk *clk)
73{ 61{
74 CKEN &= ~(1 << clk->cken);
75} 62}
76 63
77const struct clkops clk_cken_ops = { 64const struct clkops clk_dummy_ops = {
78 .enable = clk_cken_enable, 65 .enable = clk_dummy_enable,
79 .disable = clk_cken_disable, 66 .disable = clk_dummy_disable,
67};
68
69struct clk clk_dummy = {
70 .ops = &clk_dummy_ops,
80}; 71};
diff --git a/arch/arm/mach-pxa/clock.h b/arch/arm/mach-pxa/clock.h
index d8488742b807..1f2fb9c43f06 100644
--- a/arch/arm/mach-pxa/clock.h
+++ b/arch/arm/mach-pxa/clock.h
@@ -1,4 +1,5 @@
1#include <asm/clkdev.h> 1#include <linux/clkdev.h>
2#include <linux/syscore_ops.h>
2 3
3struct clkops { 4struct clkops {
4 void (*enable)(struct clk *); 5 void (*enable)(struct clk *);
@@ -14,6 +15,12 @@ struct clk {
14 unsigned int enabled; 15 unsigned int enabled;
15}; 16};
16 17
18void clk_dummy_enable(struct clk *);
19void clk_dummy_disable(struct clk *);
20
21extern const struct clkops clk_dummy_ops;
22extern struct clk clk_dummy;
23
17#define INIT_CLKREG(_clk,_devname,_conname) \ 24#define INIT_CLKREG(_clk,_devname,_conname) \
18 { \ 25 { \
19 .clk = _clk, \ 26 .clk = _clk, \
@@ -21,14 +28,6 @@ struct clk {
21 .con_id = _conname, \ 28 .con_id = _conname, \
22 } 29 }
23 30
24#define DEFINE_CKEN(_name, _cken, _rate, _delay) \
25struct clk clk_##_name = { \
26 .ops = &clk_cken_ops, \
27 .rate = _rate, \
28 .cken = CKEN_##_cken, \
29 .delay = _delay, \
30 }
31
32#define DEFINE_CK(_name, _cken, _ops) \ 31#define DEFINE_CK(_name, _cken, _ops) \
33struct clk clk_##_name = { \ 32struct clk clk_##_name = { \
34 .ops = _ops, \ 33 .ops = _ops, \
@@ -42,28 +41,39 @@ struct clk clk_##_name = { \
42 .delay = _delay, \ 41 .delay = _delay, \
43 } 42 }
44 43
45extern const struct clkops clk_cken_ops; 44#define DEFINE_PXA2_CKEN(_name, _cken, _rate, _delay) \
46
47void clk_cken_enable(struct clk *clk);
48void clk_cken_disable(struct clk *clk);
49
50#ifdef CONFIG_PXA3xx
51#define DEFINE_PXA3_CKEN(_name, _cken, _rate, _delay) \
52struct clk clk_##_name = { \ 45struct clk clk_##_name = { \
53 .ops = &clk_pxa3xx_cken_ops, \ 46 .ops = &clk_pxa2xx_cken_ops, \
54 .rate = _rate, \ 47 .rate = _rate, \
55 .cken = CKEN_##_cken, \ 48 .cken = CKEN_##_cken, \
56 .delay = _delay, \ 49 .delay = _delay, \
57 } 50 }
58 51
59#define DEFINE_PXA3_CK(_name, _cken, _ops) \ 52extern const struct clkops clk_pxa2xx_cken_ops;
53
54void clk_pxa2xx_cken_enable(struct clk *clk);
55void clk_pxa2xx_cken_disable(struct clk *clk);
56
57extern struct syscore_ops pxa2xx_clock_syscore_ops;
58
59#if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x)
60#define DEFINE_PXA3_CKEN(_name, _cken, _rate, _delay) \
60struct clk clk_##_name = { \ 61struct clk clk_##_name = { \
61 .ops = _ops, \ 62 .ops = &clk_pxa3xx_cken_ops, \
63 .rate = _rate, \
62 .cken = CKEN_##_cken, \ 64 .cken = CKEN_##_cken, \
65 .delay = _delay, \
63 } 66 }
64 67
65extern const struct clkops clk_pxa3xx_cken_ops; 68extern const struct clkops clk_pxa3xx_cken_ops;
69extern const struct clkops clk_pxa3xx_hsio_ops;
70extern const struct clkops clk_pxa3xx_ac97_ops;
71extern const struct clkops clk_pxa3xx_pout_ops;
72extern const struct clkops clk_pxa3xx_smemc_ops;
73
66extern void clk_pxa3xx_cken_enable(struct clk *); 74extern void clk_pxa3xx_cken_enable(struct clk *);
67extern void clk_pxa3xx_cken_disable(struct clk *); 75extern void clk_pxa3xx_cken_disable(struct clk *);
68#endif
69 76
77extern struct syscore_ops pxa3xx_clock_syscore_ops;
78
79#endif
diff --git a/arch/arm/mach-pxa/cm-x255.c b/arch/arm/mach-pxa/cm-x255.c
index f1a7703d771b..93f59f877fc6 100644
--- a/arch/arm/mach-pxa/cm-x255.c
+++ b/arch/arm/mach-pxa/cm-x255.c
@@ -17,13 +17,13 @@
17#include <linux/mtd/nand-gpio.h> 17#include <linux/mtd/nand-gpio.h>
18 18
19#include <linux/spi/spi.h> 19#include <linux/spi/spi.h>
20#include <linux/spi/pxa2xx_spi.h>
20 21
21#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
22#include <asm/mach-types.h> 23#include <asm/mach-types.h>
23#include <asm/mach/map.h> 24#include <asm/mach/map.h>
24 25
25#include <mach/pxa25x.h> 26#include <mach/pxa25x.h>
26#include <mach/pxa2xx_spi.h>
27 27
28#include "generic.h" 28#include "generic.h"
29 29
diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c
index a9926bb75922..13518a705399 100644
--- a/arch/arm/mach-pxa/cm-x270.c
+++ b/arch/arm/mach-pxa/cm-x270.c
@@ -10,7 +10,6 @@
10 */ 10 */
11 11
12#include <linux/platform_device.h> 12#include <linux/platform_device.h>
13#include <linux/sysdev.h>
14#include <linux/irq.h> 13#include <linux/irq.h>
15#include <linux/gpio.h> 14#include <linux/gpio.h>
16#include <linux/delay.h> 15#include <linux/delay.h>
@@ -19,12 +18,12 @@
19#include <video/mbxfb.h> 18#include <video/mbxfb.h>
20 19
21#include <linux/spi/spi.h> 20#include <linux/spi/spi.h>
21#include <linux/spi/pxa2xx_spi.h>
22#include <linux/spi/libertas_spi.h> 22#include <linux/spi/libertas_spi.h>
23 23
24#include <mach/pxa27x.h> 24#include <mach/pxa27x.h>
25#include <mach/ohci.h> 25#include <mach/ohci.h>
26#include <mach/mmc.h> 26#include <mach/mmc.h>
27#include <mach/pxa2xx_spi.h>
28 27
29#include "generic.h" 28#include "generic.h"
30 29
diff --git a/arch/arm/mach-pxa/cm-x2xx-pci.c b/arch/arm/mach-pxa/cm-x2xx-pci.c
index 0f3130599770..1afc0fb7d6d5 100644
--- a/arch/arm/mach-pxa/cm-x2xx-pci.c
+++ b/arch/arm/mach-pxa/cm-x2xx-pci.c
@@ -29,37 +29,10 @@
29unsigned long it8152_base_address; 29unsigned long it8152_base_address;
30static int cmx2xx_it8152_irq_gpio; 30static int cmx2xx_it8152_irq_gpio;
31 31
32/*
33 * Only first 64MB of memory can be accessed via PCI.
34 * We use GFP_DMA to allocate safe buffers to do map/unmap.
35 * This is really ugly and we need a better way of specifying
36 * DMA-capable regions of memory.
37 */
38void __init cmx2xx_pci_adjust_zones(unsigned long *zone_size,
39 unsigned long *zhole_size)
40{
41 unsigned int sz = SZ_64M >> PAGE_SHIFT;
42
43 if (machine_is_armcore()) {
44 pr_info("Adjusting zones for CM-X2XX\n");
45
46 /*
47 * Only adjust if > 64M on current system
48 */
49 if (zone_size[0] <= sz)
50 return;
51
52 zone_size[1] = zone_size[0] - sz;
53 zone_size[0] = sz;
54 zhole_size[1] = zhole_size[0];
55 zhole_size[0] = 0;
56 }
57}
58
59static void cmx2xx_it8152_irq_demux(unsigned int irq, struct irq_desc *desc) 32static void cmx2xx_it8152_irq_demux(unsigned int irq, struct irq_desc *desc)
60{ 33{
61 /* clear our parent irq */ 34 /* clear our parent irq */
62 desc->chip->ack(irq); 35 desc->irq_data.chip->irq_ack(&desc->irq_data);
63 36
64 it8152_irq_demux(irq, desc); 37 it8152_irq_demux(irq, desc);
65} 38}
@@ -70,9 +43,10 @@ void __cmx2xx_pci_init_irq(int irq_gpio)
70 43
71 cmx2xx_it8152_irq_gpio = irq_gpio; 44 cmx2xx_it8152_irq_gpio = irq_gpio;
72 45
73 set_irq_type(gpio_to_irq(irq_gpio), IRQ_TYPE_EDGE_RISING); 46 irq_set_irq_type(gpio_to_irq(irq_gpio), IRQ_TYPE_EDGE_RISING);
74 47
75 set_irq_chained_handler(gpio_to_irq(irq_gpio), cmx2xx_it8152_irq_demux); 48 irq_set_chained_handler(gpio_to_irq(irq_gpio),
49 cmx2xx_it8152_irq_demux);
76} 50}
77 51
78#ifdef CONFIG_PM 52#ifdef CONFIG_PM
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c
index bff6e78f033d..a10996782476 100644
--- a/arch/arm/mach-pxa/cm-x2xx.c
+++ b/arch/arm/mach-pxa/cm-x2xx.c
@@ -10,7 +10,7 @@
10 */ 10 */
11 11
12#include <linux/platform_device.h> 12#include <linux/platform_device.h>
13#include <linux/sysdev.h> 13#include <linux/syscore_ops.h>
14#include <linux/irq.h> 14#include <linux/irq.h>
15#include <linux/gpio.h> 15#include <linux/gpio.h>
16 16
@@ -24,6 +24,7 @@
24#include <mach/pxa2xx-regs.h> 24#include <mach/pxa2xx-regs.h>
25#include <mach/audio.h> 25#include <mach/audio.h>
26#include <mach/pxafb.h> 26#include <mach/pxafb.h>
27#include <mach/smemc.h>
27 28
28#include <asm/hardware/it8152.h> 29#include <asm/hardware/it8152.h>
29 30
@@ -33,6 +34,9 @@
33extern void cmx255_init(void); 34extern void cmx255_init(void);
34extern void cmx270_init(void); 35extern void cmx270_init(void);
35 36
37/* reserve IRQs for IT8152 */
38#define CMX2XX_NR_IRQS (IRQ_BOARD_START + 40)
39
36/* virtual addresses for statically mapped regions */ 40/* virtual addresses for statically mapped regions */
37#define CMX2XX_VIRT_BASE (0xe8000000) 41#define CMX2XX_VIRT_BASE (0xe8000000)
38#define CMX2XX_IT8152_VIRT (CMX2XX_VIRT_BASE) 42#define CMX2XX_IT8152_VIRT (CMX2XX_VIRT_BASE)
@@ -375,7 +379,7 @@ __setup("monitor=", cmx2xx_set_display);
375 379
376static void __init cmx2xx_init_display(void) 380static void __init cmx2xx_init_display(void)
377{ 381{
378 set_pxa_fb_info(cmx2xx_display); 382 pxa_set_fb_info(NULL, cmx2xx_display);
379} 383}
380#else 384#else
381static inline void cmx2xx_init_display(void) {} 385static inline void cmx2xx_init_display(void) {}
@@ -384,14 +388,14 @@ static inline void cmx2xx_init_display(void) {}
384#ifdef CONFIG_PM 388#ifdef CONFIG_PM
385static unsigned long sleep_save_msc[10]; 389static unsigned long sleep_save_msc[10];
386 390
387static int cmx2xx_suspend(struct sys_device *dev, pm_message_t state) 391static int cmx2xx_suspend(void)
388{ 392{
389 cmx2xx_pci_suspend(); 393 cmx2xx_pci_suspend();
390 394
391 /* save MSC registers */ 395 /* save MSC registers */
392 sleep_save_msc[0] = MSC0; 396 sleep_save_msc[0] = __raw_readl(MSC0);
393 sleep_save_msc[1] = MSC1; 397 sleep_save_msc[1] = __raw_readl(MSC1);
394 sleep_save_msc[2] = MSC2; 398 sleep_save_msc[2] = __raw_readl(MSC2);
395 399
396 /* setup power saving mode registers */ 400 /* setup power saving mode registers */
397 PCFR = 0x0; 401 PCFR = 0x0;
@@ -408,35 +412,26 @@ static int cmx2xx_suspend(struct sys_device *dev, pm_message_t state)
408 return 0; 412 return 0;
409} 413}
410 414
411static int cmx2xx_resume(struct sys_device *dev) 415static void cmx2xx_resume(void)
412{ 416{
413 cmx2xx_pci_resume(); 417 cmx2xx_pci_resume();
414 418
415 /* restore MSC registers */ 419 /* restore MSC registers */
416 MSC0 = sleep_save_msc[0]; 420 __raw_writel(sleep_save_msc[0], MSC0);
417 MSC1 = sleep_save_msc[1]; 421 __raw_writel(sleep_save_msc[1], MSC1);
418 MSC2 = sleep_save_msc[2]; 422 __raw_writel(sleep_save_msc[2], MSC2);
419
420 return 0;
421} 423}
422 424
423static struct sysdev_class cmx2xx_pm_sysclass = { 425static struct syscore_ops cmx2xx_pm_syscore_ops = {
424 .name = "pm",
425 .resume = cmx2xx_resume, 426 .resume = cmx2xx_resume,
426 .suspend = cmx2xx_suspend, 427 .suspend = cmx2xx_suspend,
427}; 428};
428 429
429static struct sys_device cmx2xx_pm_device = {
430 .cls = &cmx2xx_pm_sysclass,
431};
432
433static int __init cmx2xx_pm_init(void) 430static int __init cmx2xx_pm_init(void)
434{ 431{
435 int error; 432 register_syscore_ops(&cmx2xx_pm_syscore_ops);
436 error = sysdev_class_register(&cmx2xx_pm_sysclass); 433
437 if (error == 0) 434 return 0;
438 error = sysdev_register(&cmx2xx_pm_device);
439 return error;
440} 435}
441#else 436#else
442static int __init cmx2xx_pm_init(void) { return 0; } 437static int __init cmx2xx_pm_init(void) { return 0; }
@@ -473,8 +468,6 @@ static void __init cmx2xx_init(void)
473 468
474static void __init cmx2xx_init_irq(void) 469static void __init cmx2xx_init_irq(void)
475{ 470{
476 pxa27x_init_irq();
477
478 if (cpu_is_pxa25x()) { 471 if (cpu_is_pxa25x()) {
479 pxa25x_init_irq(); 472 pxa25x_init_irq();
480 cmx2xx_pci_init_irq(CMX255_GPIO_IT8152_IRQ); 473 cmx2xx_pci_init_irq(CMX255_GPIO_IT8152_IRQ);
@@ -497,7 +490,12 @@ static struct map_desc cmx2xx_io_desc[] __initdata = {
497 490
498static void __init cmx2xx_map_io(void) 491static void __init cmx2xx_map_io(void)
499{ 492{
500 pxa_map_io(); 493 if (cpu_is_pxa25x())
494 pxa25x_map_io();
495
496 if (cpu_is_pxa27x())
497 pxa27x_map_io();
498
501 iotable_init(cmx2xx_io_desc, ARRAY_SIZE(cmx2xx_io_desc)); 499 iotable_init(cmx2xx_io_desc, ARRAY_SIZE(cmx2xx_io_desc));
502 500
503 it8152_base_address = CMX2XX_IT8152_VIRT; 501 it8152_base_address = CMX2XX_IT8152_VIRT;
@@ -505,15 +503,18 @@ static void __init cmx2xx_map_io(void)
505#else 503#else
506static void __init cmx2xx_map_io(void) 504static void __init cmx2xx_map_io(void)
507{ 505{
508 pxa_map_io(); 506 if (cpu_is_pxa25x())
507 pxa25x_map_io();
508
509 if (cpu_is_pxa27x())
510 pxa27x_map_io();
509} 511}
510#endif 512#endif
511 513
512MACHINE_START(ARMCORE, "Compulab CM-X2XX") 514MACHINE_START(ARMCORE, "Compulab CM-X2XX")
513 .boot_params = 0xa0000100, 515 .boot_params = 0xa0000100,
514 .phys_io = 0x40000000,
515 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
516 .map_io = cmx2xx_map_io, 516 .map_io = cmx2xx_map_io,
517 .nr_irqs = CMX2XX_NR_IRQS,
517 .init_irq = cmx2xx_init_irq, 518 .init_irq = cmx2xx_init_irq,
518 .timer = &pxa_timer, 519 .timer = &pxa_timer,
519 .init_machine = cmx2xx_init, 520 .init_machine = cmx2xx_init,
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index c70e6c2f4e7c..b2248e76ec8b 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -19,6 +19,7 @@
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/delay.h> 20#include <linux/delay.h>
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22#include <linux/clk.h>
22 23
23#include <linux/gpio.h> 24#include <linux/gpio.h>
24#include <linux/dm9000.h> 25#include <linux/dm9000.h>
@@ -28,6 +29,7 @@
28 29
29#include <linux/i2c.h> 30#include <linux/i2c.h>
30#include <linux/i2c/pca953x.h> 31#include <linux/i2c/pca953x.h>
32#include <linux/i2c/pxa-i2c.h>
31 33
32#include <linux/mfd/da903x.h> 34#include <linux/mfd/da903x.h>
33#include <linux/regulator/machine.h> 35#include <linux/regulator/machine.h>
@@ -47,9 +49,9 @@
47#include <mach/pxafb.h> 49#include <mach/pxafb.h>
48#include <mach/mmc.h> 50#include <mach/mmc.h>
49#include <mach/ohci.h> 51#include <mach/ohci.h>
50#include <plat/i2c.h>
51#include <plat/pxa3xx_nand.h> 52#include <plat/pxa3xx_nand.h>
52#include <mach/audio.h> 53#include <mach/audio.h>
54#include <mach/pxa3xx-u2d.h>
53 55
54#include <asm/mach/map.h> 56#include <asm/mach/map.h>
55 57
@@ -68,6 +70,8 @@
68#define GPIO97_RTC_RD (97) 70#define GPIO97_RTC_RD (97)
69#define GPIO98_RTC_IO (98) 71#define GPIO98_RTC_IO (98)
70 72
73#define GPIO_ULPI_PHY_RST (127)
74
71static mfp_cfg_t cm_x3xx_mfp_cfg[] __initdata = { 75static mfp_cfg_t cm_x3xx_mfp_cfg[] __initdata = {
72 /* LCD */ 76 /* LCD */
73 GPIO54_LCD_LDD_0, 77 GPIO54_LCD_LDD_0,
@@ -292,7 +296,7 @@ static struct pxafb_mach_info cm_x300_lcd = {
292 296
293static void __init cm_x300_init_lcd(void) 297static void __init cm_x300_init_lcd(void)
294{ 298{
295 set_pxa_fb_info(&cm_x300_lcd); 299 pxa_set_fb_info(NULL, &cm_x300_lcd);
296} 300}
297#else 301#else
298static inline void cm_x300_init_lcd(void) {} 302static inline void cm_x300_init_lcd(void) {}
@@ -472,6 +476,78 @@ static void __init cm_x300_init_mmc(void)
472static inline void cm_x300_init_mmc(void) {} 476static inline void cm_x300_init_mmc(void) {}
473#endif 477#endif
474 478
479#if defined(CONFIG_PXA310_ULPI)
480static struct clk *pout_clk;
481
482static int cm_x300_ulpi_phy_reset(void)
483{
484 int err;
485
486 /* reset the PHY */
487 err = gpio_request(GPIO_ULPI_PHY_RST, "ulpi reset");
488 if (err) {
489 pr_err("%s: failed to request ULPI reset GPIO: %d\n",
490 __func__, err);
491 return err;
492 }
493
494 gpio_direction_output(GPIO_ULPI_PHY_RST, 0);
495 msleep(10);
496 gpio_set_value(GPIO_ULPI_PHY_RST, 1);
497 msleep(10);
498
499 gpio_free(GPIO_ULPI_PHY_RST);
500
501 return 0;
502}
503
504static inline int cm_x300_u2d_init(struct device *dev)
505{
506 int err = 0;
507
508 if (cpu_is_pxa310()) {
509 /* CLK_POUT is connected to the ULPI PHY */
510 pout_clk = clk_get(NULL, "CLK_POUT");
511 if (IS_ERR(pout_clk)) {
512 err = PTR_ERR(pout_clk);
513 pr_err("%s: failed to get CLK_POUT: %d\n",
514 __func__, err);
515 return err;
516 }
517 clk_enable(pout_clk);
518
519 err = cm_x300_ulpi_phy_reset();
520 if (err) {
521 clk_disable(pout_clk);
522 clk_put(pout_clk);
523 }
524 }
525
526 return err;
527}
528
529static void cm_x300_u2d_exit(struct device *dev)
530{
531 if (cpu_is_pxa310()) {
532 clk_disable(pout_clk);
533 clk_put(pout_clk);
534 }
535}
536
537static struct pxa3xx_u2d_platform_data cm_x300_u2d_platform_data = {
538 .ulpi_mode = ULPI_SER_6PIN,
539 .init = cm_x300_u2d_init,
540 .exit = cm_x300_u2d_exit,
541};
542
543static void cm_x300_init_u2d(void)
544{
545 pxa3xx_set_u2d_info(&cm_x300_u2d_platform_data);
546}
547#else
548static inline void cm_x300_init_u2d(void) {}
549#endif
550
475#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) 551#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
476static int cm_x300_ohci_init(struct device *dev) 552static int cm_x300_ohci_init(struct device *dev)
477{ 553{
@@ -689,7 +765,7 @@ static void __init cm_x300_init_da9030(void)
689{ 765{
690 pxa3xx_set_i2c_power_info(&cm_x300_pwr_i2c_info); 766 pxa3xx_set_i2c_power_info(&cm_x300_pwr_i2c_info);
691 i2c_register_board_info(1, &cm_x300_pmic_info, 1); 767 i2c_register_board_info(1, &cm_x300_pmic_info, 1);
692 set_irq_wake(IRQ_WAKEUP0, 1); 768 irq_set_irq_wake(IRQ_WAKEUP0, 1);
693} 769}
694 770
695static void __init cm_x300_init_wi2wi(void) 771static void __init cm_x300_init_wi2wi(void)
@@ -754,6 +830,7 @@ static void __init cm_x300_init(void)
754 cm_x300_init_da9030(); 830 cm_x300_init_da9030();
755 cm_x300_init_dm9000(); 831 cm_x300_init_dm9000();
756 cm_x300_init_lcd(); 832 cm_x300_init_lcd();
833 cm_x300_init_u2d();
757 cm_x300_init_ohci(); 834 cm_x300_init_ohci();
758 cm_x300_init_mmc(); 835 cm_x300_init_mmc();
759 cm_x300_init_nand(); 836 cm_x300_init_nand();
@@ -779,10 +856,8 @@ static void __init cm_x300_fixup(struct machine_desc *mdesc, struct tag *tags,
779} 856}
780 857
781MACHINE_START(CM_X300, "CM-X300 module") 858MACHINE_START(CM_X300, "CM-X300 module")
782 .phys_io = 0x40000000,
783 .boot_params = 0xa0000100, 859 .boot_params = 0xa0000100,
784 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, 860 .map_io = pxa3xx_map_io,
785 .map_io = pxa_map_io,
786 .init_irq = pxa3xx_init_irq, 861 .init_irq = pxa3xx_init_irq,
787 .timer = &pxa_timer, 862 .timer = &pxa_timer,
788 .init_machine = cm_x300_init, 863 .init_machine = cm_x300_init,
diff --git a/arch/arm/mach-pxa/colibri-pxa270-evalboard.c b/arch/arm/mach-pxa/colibri-evalboard.c
index 0f3b632c3b14..d28e802e2448 100644
--- a/arch/arm/mach-pxa/colibri-pxa270-evalboard.c
+++ b/arch/arm/mach-pxa/colibri-evalboard.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * linux/arch/arm/mach-pxa/colibri-pxa270-evalboard.c 2 * linux/arch/arm/mach-pxa/colibri-evalboard.c
3 * 3 *
4 * Support for Toradex PXA270 based Colibri Evaluation Carrier Board 4 * Support for Toradex Colibri Evaluation Carrier Board
5 * Daniel Mack <daniel@caiaq.de> 5 * Daniel Mack <daniel@caiaq.de>
6 * Marek Vasut <marek.vasut@gmail.com> 6 * Marek Vasut <marek.vasut@gmail.com>
7 * 7 *
@@ -13,12 +13,13 @@
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/platform_device.h> 15#include <linux/platform_device.h>
16#include <linux/sysdev.h>
17#include <linux/interrupt.h> 16#include <linux/interrupt.h>
18#include <linux/gpio.h> 17#include <linux/gpio.h>
19#include <asm/mach-types.h> 18#include <asm/mach-types.h>
20#include <mach/hardware.h> 19#include <mach/hardware.h>
21#include <asm/mach/arch.h> 20#include <asm/mach/arch.h>
21#include <linux/i2c.h>
22#include <linux/i2c/pxa-i2c.h>
22 23
23#include <mach/pxa27x.h> 24#include <mach/pxa27x.h>
24#include <mach/colibri.h> 25#include <mach/colibri.h>
@@ -30,82 +31,89 @@
30#include "devices.h" 31#include "devices.h"
31 32
32/****************************************************************************** 33/******************************************************************************
33 * Pin configuration
34 ******************************************************************************/
35static mfp_cfg_t colibri_pxa270_evalboard_pin_config[] __initdata = {
36 /* MMC */
37 GPIO32_MMC_CLK,
38 GPIO92_MMC_DAT_0,
39 GPIO109_MMC_DAT_1,
40 GPIO110_MMC_DAT_2,
41 GPIO111_MMC_DAT_3,
42 GPIO112_MMC_CMD,
43 GPIO0_GPIO, /* SD detect */
44
45 /* FFUART */
46 GPIO39_FFUART_TXD,
47 GPIO34_FFUART_RXD,
48
49 /* UHC */
50 GPIO88_USBH1_PWR,
51 GPIO89_USBH1_PEN,
52 GPIO119_USBH2_PWR,
53 GPIO120_USBH2_PEN,
54};
55
56/******************************************************************************
57 * SD/MMC card controller 34 * SD/MMC card controller
58 ******************************************************************************/ 35 ******************************************************************************/
59#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE) 36#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
60static struct pxamci_platform_data colibri_pxa270_mci_platform_data = { 37static struct pxamci_platform_data colibri_mci_platform_data = {
61 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, 38 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
62 .gpio_power = -1, 39 .gpio_power = -1,
63 .gpio_card_detect = GPIO0_COLIBRI_PXA270_SD_DETECT,
64 .gpio_card_ro = -1, 40 .gpio_card_ro = -1,
65 .detect_delay_ms = 200, 41 .detect_delay_ms = 200,
66}; 42};
67 43
68static void __init colibri_pxa270_mmc_init(void) 44static void __init colibri_mmc_init(void)
69{ 45{
70 pxa_set_mci_info(&colibri_pxa270_mci_platform_data); 46 if (machine_is_colibri()) /* PXA270 Colibri */
47 colibri_mci_platform_data.gpio_card_detect =
48 GPIO0_COLIBRI_PXA270_SD_DETECT;
49 if (machine_is_colibri300()) /* PXA300 Colibri */
50 colibri_mci_platform_data.gpio_card_detect =
51 GPIO13_COLIBRI_PXA300_SD_DETECT;
52 else /* PXA320 Colibri */
53 colibri_mci_platform_data.gpio_card_detect =
54 GPIO28_COLIBRI_PXA320_SD_DETECT;
55
56 pxa_set_mci_info(&colibri_mci_platform_data);
71} 57}
72#else 58#else
73static inline void colibri_pxa270_mmc_init(void) {} 59static inline void colibri_mmc_init(void) {}
74#endif 60#endif
75 61
76/****************************************************************************** 62/******************************************************************************
77 * USB Host 63 * USB Host
78 ******************************************************************************/ 64 ******************************************************************************/
79#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) 65#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
80static int colibri_pxa270_ohci_init(struct device *dev) 66static int colibri_ohci_init(struct device *dev)
81{ 67{
82 UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE; 68 UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE;
83 return 0; 69 return 0;
84} 70}
85 71
86static struct pxaohci_platform_data colibri_pxa270_ohci_info = { 72static struct pxaohci_platform_data colibri_ohci_info = {
87 .port_mode = PMM_PERPORT_MODE, 73 .port_mode = PMM_PERPORT_MODE,
88 .flags = ENABLE_PORT1 | ENABLE_PORT2 | 74 .flags = ENABLE_PORT1 |
89 POWER_CONTROL_LOW | POWER_SENSE_LOW, 75 POWER_CONTROL_LOW | POWER_SENSE_LOW,
90 .init = colibri_pxa270_ohci_init, 76 .init = colibri_ohci_init,
77};
78
79static void __init colibri_uhc_init(void)
80{
81 /* Colibri PXA270 has two usb ports, TBA for 320 */
82 if (machine_is_colibri())
83 colibri_ohci_info.flags |= ENABLE_PORT2;
84
85 pxa_set_ohci_info(&colibri_ohci_info);
86}
87#else
88static inline void colibri_uhc_init(void) {}
89#endif
90
91/******************************************************************************
92 * I2C RTC
93 ******************************************************************************/
94#if defined(CONFIG_RTC_DRV_DS1307) || defined(CONFIG_RTC_DRV_DS1307_MODULE)
95static struct i2c_board_info __initdata colibri_i2c_devs[] = {
96 {
97 I2C_BOARD_INFO("m41t00", 0x68),
98 },
91}; 99};
92 100
93static void __init colibri_pxa270_uhc_init(void) 101static void __init colibri_rtc_init(void)
94{ 102{
95 pxa_set_ohci_info(&colibri_pxa270_ohci_info); 103 pxa_set_i2c_info(NULL);
104 i2c_register_board_info(0, ARRAY_AND_SIZE(colibri_i2c_devs));
96} 105}
97#else 106#else
98static inline void colibri_pxa270_uhc_init(void) {} 107static inline void colibri_rtc_init(void) {}
99#endif 108#endif
100 109
101void __init colibri_pxa270_evalboard_init(void) 110void __init colibri_evalboard_init(void)
102{ 111{
103 pxa2xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa270_evalboard_pin_config));
104 pxa_set_ffuart_info(NULL); 112 pxa_set_ffuart_info(NULL);
105 pxa_set_btuart_info(NULL); 113 pxa_set_btuart_info(NULL);
106 pxa_set_stuart_info(NULL); 114 pxa_set_stuart_info(NULL);
107 115
108 colibri_pxa270_mmc_init(); 116 colibri_mmc_init();
109 colibri_pxa270_uhc_init(); 117 colibri_uhc_init();
118 colibri_rtc_init();
110} 119}
111
diff --git a/arch/arm/mach-pxa/colibri-pxa270-income.c b/arch/arm/mach-pxa/colibri-pxa270-income.c
index 37f0f3ed7c61..80538b8806ed 100644
--- a/arch/arm/mach-pxa/colibri-pxa270-income.c
+++ b/arch/arm/mach-pxa/colibri-pxa270-income.c
@@ -21,7 +21,7 @@
21#include <linux/kernel.h> 21#include <linux/kernel.h>
22#include <linux/platform_device.h> 22#include <linux/platform_device.h>
23#include <linux/pwm_backlight.h> 23#include <linux/pwm_backlight.h>
24#include <linux/sysdev.h> 24#include <linux/i2c/pxa-i2c.h>
25 25
26#include <asm/irq.h> 26#include <asm/irq.h>
27#include <asm/mach-types.h> 27#include <asm/mach-types.h>
@@ -33,8 +33,6 @@
33#include <mach/pxa27x-udc.h> 33#include <mach/pxa27x-udc.h>
34#include <mach/pxafb.h> 34#include <mach/pxafb.h>
35 35
36#include <plat/i2c.h>
37
38#include "devices.h" 36#include "devices.h"
39#include "generic.h" 37#include "generic.h"
40 38
@@ -46,52 +44,6 @@
46#define GPIO113_INCOME_TS_IRQ (113) 44#define GPIO113_INCOME_TS_IRQ (113)
47 45
48/****************************************************************************** 46/******************************************************************************
49 * Pin configuration
50 ******************************************************************************/
51static mfp_cfg_t income_pin_config[] __initdata = {
52 /* MMC */
53 GPIO32_MMC_CLK,
54 GPIO92_MMC_DAT_0,
55 GPIO109_MMC_DAT_1,
56 GPIO110_MMC_DAT_2,
57 GPIO111_MMC_DAT_3,
58 GPIO112_MMC_CMD,
59 GPIO0_GPIO, /* SD detect */
60 GPIO1_GPIO, /* SD read-only */
61
62 /* FFUART */
63 GPIO39_FFUART_TXD,
64 GPIO34_FFUART_RXD,
65
66 /* BFUART */
67 GPIO42_BTUART_RXD,
68 GPIO43_BTUART_TXD,
69 GPIO45_BTUART_RTS,
70
71 /* STUART */
72 GPIO46_STUART_RXD,
73 GPIO47_STUART_TXD,
74
75 /* UHC */
76 GPIO88_USBH1_PWR,
77 GPIO89_USBH1_PEN,
78
79 /* LCD */
80 GPIOxx_LCD_TFT_16BPP,
81
82 /* PWM */
83 GPIO16_PWM0_OUT,
84
85 /* I2C */
86 GPIO117_I2C_SCL,
87 GPIO118_I2C_SDA,
88
89 /* LED */
90 GPIO54_GPIO, /* LED A */
91 GPIO55_GPIO, /* LED B */
92};
93
94/******************************************************************************
95 * SD/MMC card controller 47 * SD/MMC card controller
96 ******************************************************************************/ 48 ******************************************************************************/
97#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE) 49#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
@@ -222,7 +174,7 @@ static struct pxafb_mach_info income_lcd_screen = {
222 174
223static void __init income_lcd_init(void) 175static void __init income_lcd_init(void)
224{ 176{
225 set_pxa_fb_info(&income_lcd_screen); 177 pxa_set_fb_info(NULL, &income_lcd_screen);
226} 178}
227#else 179#else
228static inline void income_lcd_init(void) {} 180static inline void income_lcd_init(void) {}
@@ -257,7 +209,6 @@ static inline void income_pwm_init(void) {}
257 209
258void __init colibri_pxa270_income_boardinit(void) 210void __init colibri_pxa270_income_boardinit(void)
259{ 211{
260 pxa2xx_mfp_config(ARRAY_AND_SIZE(income_pin_config));
261 pxa_set_ffuart_info(NULL); 212 pxa_set_ffuart_info(NULL);
262 pxa_set_btuart_info(NULL); 213 pxa_set_btuart_info(NULL);
263 pxa_set_stuart_info(NULL); 214 pxa_set_stuart_info(NULL);
diff --git a/arch/arm/mach-pxa/colibri-pxa270.c b/arch/arm/mach-pxa/colibri-pxa270.c
index 98673ac6efd0..7545a48ed88b 100644
--- a/arch/arm/mach-pxa/colibri-pxa270.c
+++ b/arch/arm/mach-pxa/colibri-pxa270.c
@@ -17,7 +17,6 @@
17#include <linux/mtd/partitions.h> 17#include <linux/mtd/partitions.h>
18#include <linux/mtd/physmap.h> 18#include <linux/mtd/physmap.h>
19#include <linux/platform_device.h> 19#include <linux/platform_device.h>
20#include <linux/sysdev.h>
21#include <linux/ucb1400.h> 20#include <linux/ucb1400.h>
22 21
23#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
@@ -33,6 +32,103 @@
33#include "generic.h" 32#include "generic.h"
34 33
35/****************************************************************************** 34/******************************************************************************
35 * Evaluation board MFP
36 ******************************************************************************/
37#ifdef CONFIG_MACH_COLIBRI_EVALBOARD
38static mfp_cfg_t colibri_pxa270_evalboard_pin_config[] __initdata = {
39 /* MMC */
40 GPIO32_MMC_CLK,
41 GPIO92_MMC_DAT_0,
42 GPIO109_MMC_DAT_1,
43 GPIO110_MMC_DAT_2,
44 GPIO111_MMC_DAT_3,
45 GPIO112_MMC_CMD,
46 GPIO0_GPIO, /* SD detect */
47
48 /* FFUART */
49 GPIO39_FFUART_TXD,
50 GPIO34_FFUART_RXD,
51
52 /* UHC */
53 GPIO88_USBH1_PWR,
54 GPIO89_USBH1_PEN,
55 GPIO119_USBH2_PWR,
56 GPIO120_USBH2_PEN,
57
58 /* PCMCIA */
59 GPIO85_nPCE_1,
60 GPIO54_nPCE_2,
61 GPIO55_nPREG,
62 GPIO50_nPIOR,
63 GPIO51_nPIOW,
64 GPIO49_nPWE,
65 GPIO48_nPOE,
66 GPIO57_nIOIS16,
67 GPIO56_nPWAIT,
68 GPIO104_PSKTSEL,
69 GPIO53_GPIO, /* RESET */
70 GPIO83_GPIO, /* BVD1 */
71 GPIO82_GPIO, /* BVD2 */
72 GPIO1_GPIO, /* READY */
73 GPIO84_GPIO, /* DETECT */
74 GPIO107_GPIO, /* PPEN */
75
76 /* I2C */
77 GPIO117_I2C_SCL,
78 GPIO118_I2C_SDA,
79};
80#else
81static mfp_cfg_t colibri_pxa270_evalboard_pin_config[] __initdata = {};
82#endif
83
84#ifdef CONFIG_MACH_COLIBRI_PXA270_INCOME
85static mfp_cfg_t income_pin_config[] __initdata = {
86 /* MMC */
87 GPIO32_MMC_CLK,
88 GPIO92_MMC_DAT_0,
89 GPIO109_MMC_DAT_1,
90 GPIO110_MMC_DAT_2,
91 GPIO111_MMC_DAT_3,
92 GPIO112_MMC_CMD,
93 GPIO0_GPIO, /* SD detect */
94 GPIO1_GPIO, /* SD read-only */
95
96 /* FFUART */
97 GPIO39_FFUART_TXD,
98 GPIO34_FFUART_RXD,
99
100 /* BFUART */
101 GPIO42_BTUART_RXD,
102 GPIO43_BTUART_TXD,
103 GPIO45_BTUART_RTS,
104
105 /* STUART */
106 GPIO46_STUART_RXD,
107 GPIO47_STUART_TXD,
108
109 /* UHC */
110 GPIO88_USBH1_PWR,
111 GPIO89_USBH1_PEN,
112
113 /* LCD */
114 GPIOxx_LCD_TFT_16BPP,
115
116 /* PWM */
117 GPIO16_PWM0_OUT,
118
119 /* I2C */
120 GPIO117_I2C_SCL,
121 GPIO118_I2C_SDA,
122
123 /* LED */
124 GPIO54_GPIO, /* LED A */
125 GPIO55_GPIO, /* LED B */
126};
127#else
128static mfp_cfg_t income_pin_config[] __initdata = {};
129#endif
130
131/******************************************************************************
36 * Pin configuration 132 * Pin configuration
37 ******************************************************************************/ 133 ******************************************************************************/
38static mfp_cfg_t colibri_pxa270_pin_config[] __initdata = { 134static mfp_cfg_t colibri_pxa270_pin_config[] __initdata = {
@@ -184,10 +280,13 @@ static void __init colibri_pxa270_init(void)
184 colibri_pxa270_tsc_init(); 280 colibri_pxa270_tsc_init();
185 281
186 switch (colibri_pxa270_baseboard) { 282 switch (colibri_pxa270_baseboard) {
187 case COLIBRI_PXA270_EVALBOARD: 283 case COLIBRI_EVALBOARD:
188 colibri_pxa270_evalboard_init(); 284 pxa2xx_mfp_config(ARRAY_AND_SIZE(
285 colibri_pxa270_evalboard_pin_config));
286 colibri_evalboard_init();
189 break; 287 break;
190 case COLIBRI_PXA270_INCOME: 288 case COLIBRI_PXA270_INCOME:
289 pxa2xx_mfp_config(ARRAY_AND_SIZE(income_pin_config));
191 colibri_pxa270_income_boardinit(); 290 colibri_pxa270_income_boardinit();
192 break; 291 break;
193 default: 292 default:
@@ -207,21 +306,17 @@ static void __init colibri_pxa270_income_init(void)
207} 306}
208 307
209MACHINE_START(COLIBRI, "Toradex Colibri PXA270") 308MACHINE_START(COLIBRI, "Toradex Colibri PXA270")
210 .phys_io = 0x40000000,
211 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
212 .boot_params = COLIBRI_SDRAM_BASE + 0x100, 309 .boot_params = COLIBRI_SDRAM_BASE + 0x100,
213 .init_machine = colibri_pxa270_init, 310 .init_machine = colibri_pxa270_init,
214 .map_io = pxa_map_io, 311 .map_io = pxa27x_map_io,
215 .init_irq = pxa27x_init_irq, 312 .init_irq = pxa27x_init_irq,
216 .timer = &pxa_timer, 313 .timer = &pxa_timer,
217MACHINE_END 314MACHINE_END
218 315
219MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC") 316MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC")
220 .phys_io = 0x40000000,
221 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
222 .boot_params = 0xa0000100, 317 .boot_params = 0xa0000100,
223 .init_machine = colibri_pxa270_income_init, 318 .init_machine = colibri_pxa270_income_init,
224 .map_io = pxa_map_io, 319 .map_io = pxa27x_map_io,
225 .init_irq = pxa27x_init_irq, 320 .init_irq = pxa27x_init_irq,
226 .timer = &pxa_timer, 321 .timer = &pxa_timer,
227MACHINE_END 322MACHINE_END
diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c
index 40b6ac2de876..66dd81cbc8a0 100644
--- a/arch/arm/mach-pxa/colibri-pxa300.c
+++ b/arch/arm/mach-pxa/colibri-pxa300.c
@@ -31,9 +31,38 @@
31#include "generic.h" 31#include "generic.h"
32#include "devices.h" 32#include "devices.h"
33 33
34
35#ifdef CONFIG_MACH_COLIBRI_EVALBOARD
36static mfp_cfg_t colibri_pxa300_evalboard_pin_config[] __initdata = {
37 /* MMC */
38 GPIO7_MMC1_CLK,
39 GPIO14_MMC1_CMD,
40 GPIO3_MMC1_DAT0,
41 GPIO4_MMC1_DAT1,
42 GPIO5_MMC1_DAT2,
43 GPIO6_MMC1_DAT3,
44 GPIO13_GPIO, /* GPIO13_COLIBRI_PXA300_SD_DETECT */
45
46 /* UHC */
47 GPIO0_2_USBH_PEN,
48 GPIO1_2_USBH_PWR,
49 GPIO77_USB_P3_1,
50 GPIO78_USB_P3_2,
51 GPIO79_USB_P3_3,
52 GPIO80_USB_P3_4,
53 GPIO81_USB_P3_5,
54 GPIO82_USB_P3_6,
55
56 /* I2C */
57 GPIO21_I2C_SCL,
58 GPIO22_I2C_SDA,
59};
60#else
61static mfp_cfg_t colibri_pxa300_evalboard_pin_config[] __initdata = {};
62#endif
63
34#if defined(CONFIG_AX88796) 64#if defined(CONFIG_AX88796)
35#define COLIBRI_ETH_IRQ_GPIO mfp_to_gpio(GPIO26_GPIO) 65#define COLIBRI_ETH_IRQ_GPIO mfp_to_gpio(GPIO26_GPIO)
36
37/* 66/*
38 * Asix AX88796 Ethernet 67 * Asix AX88796 Ethernet
39 */ 68 */
@@ -80,35 +109,6 @@ static void __init colibri_pxa300_init_eth(void)
80static inline void __init colibri_pxa300_init_eth(void) {} 109static inline void __init colibri_pxa300_init_eth(void) {}
81#endif /* CONFIG_AX88796 */ 110#endif /* CONFIG_AX88796 */
82 111
83#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
84static mfp_cfg_t colibri_pxa300_usb_pin_config[] __initdata = {
85 GPIO0_2_USBH_PEN,
86 GPIO1_2_USBH_PWR,
87};
88
89static struct pxaohci_platform_data colibri_pxa300_ohci_info = {
90 .port_mode = PMM_GLOBAL_MODE,
91 .flags = ENABLE_PORT1 | POWER_CONTROL_LOW | POWER_SENSE_LOW,
92};
93
94void __init colibri_pxa300_init_ohci(void)
95{
96 pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa300_usb_pin_config));
97 pxa_set_ohci_info(&colibri_pxa300_ohci_info);
98}
99#else
100static inline void colibri_pxa300_init_ohci(void) {}
101#endif /* CONFIG_USB_OHCI_HCD || CONFIG_USB_OHCI_HCD_MODULE */
102
103static mfp_cfg_t colibri_pxa300_mmc_pin_config[] __initdata = {
104 GPIO7_MMC1_CLK,
105 GPIO14_MMC1_CMD,
106 GPIO3_MMC1_DAT0,
107 GPIO4_MMC1_DAT1,
108 GPIO5_MMC1_DAT2,
109 GPIO6_MMC1_DAT3,
110};
111
112#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) 112#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
113static mfp_cfg_t colibri_pxa300_lcd_pin_config[] __initdata = { 113static mfp_cfg_t colibri_pxa300_lcd_pin_config[] __initdata = {
114 GPIO54_LCD_LDD_0, 114 GPIO54_LCD_LDD_0,
@@ -171,26 +171,21 @@ static inline void colibri_pxa310_init_ac97(void) {}
171 171
172void __init colibri_pxa300_init(void) 172void __init colibri_pxa300_init(void)
173{ 173{
174 pxa_set_ffuart_info(NULL);
175 pxa_set_btuart_info(NULL);
176 pxa_set_stuart_info(NULL);
177
178 colibri_pxa300_init_eth(); 174 colibri_pxa300_init_eth();
179 colibri_pxa300_init_ohci();
180 colibri_pxa3xx_init_nand(); 175 colibri_pxa3xx_init_nand();
181 colibri_pxa300_init_lcd(); 176 colibri_pxa300_init_lcd();
182 colibri_pxa3xx_init_lcd(mfp_to_gpio(GPIO39_GPIO)); 177 colibri_pxa3xx_init_lcd(mfp_to_gpio(GPIO39_GPIO));
183 colibri_pxa310_init_ac97(); 178 colibri_pxa310_init_ac97();
184 colibri_pxa3xx_init_mmc(ARRAY_AND_SIZE(colibri_pxa300_mmc_pin_config), 179
185 mfp_to_gpio(MFP_PIN_GPIO13)); 180 /* Evalboard init */
181 pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa300_evalboard_pin_config));
182 colibri_evalboard_init();
186} 183}
187 184
188MACHINE_START(COLIBRI300, "Toradex Colibri PXA300") 185MACHINE_START(COLIBRI300, "Toradex Colibri PXA300")
189 .phys_io = 0x40000000,
190 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
191 .boot_params = COLIBRI_SDRAM_BASE + 0x100, 186 .boot_params = COLIBRI_SDRAM_BASE + 0x100,
192 .init_machine = colibri_pxa300_init, 187 .init_machine = colibri_pxa300_init,
193 .map_io = pxa_map_io, 188 .map_io = pxa3xx_map_io,
194 .init_irq = pxa3xx_init_irq, 189 .init_irq = pxa3xx_init_irq,
195 .timer = &pxa_timer, 190 .timer = &pxa_timer,
196MACHINE_END 191MACHINE_END
diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c
index 99e850d84710..ff9ff5f4fc47 100644
--- a/arch/arm/mach-pxa/colibri-pxa320.c
+++ b/arch/arm/mach-pxa/colibri-pxa320.c
@@ -35,9 +35,72 @@
35#include "generic.h" 35#include "generic.h"
36#include "devices.h" 36#include "devices.h"
37 37
38#ifdef CONFIG_MACH_COLIBRI_EVALBOARD
39static mfp_cfg_t colibri_pxa320_evalboard_pin_config[] __initdata = {
40 /* MMC */
41 GPIO22_MMC1_CLK,
42 GPIO23_MMC1_CMD,
43 GPIO18_MMC1_DAT0,
44 GPIO19_MMC1_DAT1,
45 GPIO20_MMC1_DAT2,
46 GPIO21_MMC1_DAT3,
47 GPIO28_GPIO, /* SD detect */
48
49 /* UART 1 configuration (may be set by bootloader) */
50 GPIO99_UART1_CTS,
51 GPIO104_UART1_RTS,
52 GPIO97_UART1_RXD,
53 GPIO98_UART1_TXD,
54 GPIO101_UART1_DTR,
55 GPIO103_UART1_DSR,
56 GPIO100_UART1_DCD,
57 GPIO102_UART1_RI,
58
59 /* UART 2 configuration */
60 GPIO109_UART2_CTS,
61 GPIO112_UART2_RTS,
62 GPIO110_UART2_RXD,
63 GPIO111_UART2_TXD,
64
65 /* UART 3 configuration */
66 GPIO30_UART3_RXD,
67 GPIO31_UART3_TXD,
68
69 /* UHC */
70 GPIO2_2_USBH_PEN,
71 GPIO3_2_USBH_PWR,
72
73 /* I2C */
74 GPIO32_I2C_SCL,
75 GPIO33_I2C_SDA,
76
77 /* PCMCIA */
78 MFP_CFG(GPIO59, AF7), /* PRST ; AF7 to tristate */
79 MFP_CFG(GPIO61, AF7), /* PCE1 ; AF7 to tristate */
80 MFP_CFG(GPIO60, AF7), /* PCE2 ; AF7 to tristate */
81 MFP_CFG(GPIO62, AF7), /* PCD ; AF7 to tristate */
82 MFP_CFG(GPIO56, AF7), /* PSKTSEL ; AF7 to tristate */
83 GPIO27_GPIO, /* RDnWR ; input/tristate */
84 GPIO50_GPIO, /* PREG ; input/tristate */
85 GPIO2_RDY,
86 GPIO5_NPIOR,
87 GPIO6_NPIOW,
88 GPIO7_NPIOS16,
89 GPIO8_NPWAIT,
90 GPIO29_GPIO, /* PRDY (READY GPIO) */
91 GPIO57_GPIO, /* PPEN (POWER GPIO) */
92 GPIO81_GPIO, /* PCD (DETECT GPIO) */
93 GPIO77_GPIO, /* PRST (RESET GPIO) */
94 GPIO53_GPIO, /* PBVD1 */
95 GPIO79_GPIO, /* PBVD2 */
96 GPIO54_GPIO, /* POE */
97};
98#else
99static mfp_cfg_t colibri_pxa320_evalboard_pin_config[] __initdata = {};
100#endif
101
38#if defined(CONFIG_AX88796) 102#if defined(CONFIG_AX88796)
39#define COLIBRI_ETH_IRQ_GPIO mfp_to_gpio(GPIO36_GPIO) 103#define COLIBRI_ETH_IRQ_GPIO mfp_to_gpio(GPIO36_GPIO)
40
41/* 104/*
42 * Asix AX88796 Ethernet 105 * Asix AX88796 Ethernet
43 */ 106 */
@@ -84,26 +147,6 @@ static void __init colibri_pxa320_init_eth(void)
84static inline void __init colibri_pxa320_init_eth(void) {} 147static inline void __init colibri_pxa320_init_eth(void) {}
85#endif /* CONFIG_AX88796 */ 148#endif /* CONFIG_AX88796 */
86 149
87#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
88static mfp_cfg_t colibri_pxa320_usb_pin_config[] __initdata = {
89 GPIO2_2_USBH_PEN,
90 GPIO3_2_USBH_PWR,
91};
92
93static struct pxaohci_platform_data colibri_pxa320_ohci_info = {
94 .port_mode = PMM_GLOBAL_MODE,
95 .flags = ENABLE_PORT1 | POWER_CONTROL_LOW | POWER_SENSE_LOW,
96};
97
98void __init colibri_pxa320_init_ohci(void)
99{
100 pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa320_usb_pin_config));
101 pxa_set_ohci_info(&colibri_pxa320_ohci_info);
102}
103#else
104static inline void colibri_pxa320_init_ohci(void) {}
105#endif /* CONFIG_USB_OHCI_HCD || CONFIG_USB_OHCI_HCD_MODULE */
106
107#if defined(CONFIG_USB_GADGET_PXA27X)||defined(CONFIG_USB_GADGET_PXA27X_MODULE) 150#if defined(CONFIG_USB_GADGET_PXA27X)||defined(CONFIG_USB_GADGET_PXA27X_MODULE)
108static struct gpio_vbus_mach_info colibri_pxa320_gpio_vbus_info = { 151static struct gpio_vbus_mach_info colibri_pxa320_gpio_vbus_info = {
109 .gpio_vbus = mfp_to_gpio(MFP_PIN_GPIO96), 152 .gpio_vbus = mfp_to_gpio(MFP_PIN_GPIO96),
@@ -140,15 +183,6 @@ static void __init colibri_pxa320_init_udc(void)
140static inline void colibri_pxa320_init_udc(void) {} 183static inline void colibri_pxa320_init_udc(void) {}
141#endif 184#endif
142 185
143static mfp_cfg_t colibri_pxa320_mmc_pin_config[] __initdata = {
144 GPIO22_MMC1_CLK,
145 GPIO23_MMC1_CMD,
146 GPIO18_MMC1_DAT0,
147 GPIO19_MMC1_DAT1,
148 GPIO20_MMC1_DAT2,
149 GPIO21_MMC1_DAT3
150};
151
152#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) 186#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
153static mfp_cfg_t colibri_pxa320_lcd_pin_config[] __initdata = { 187static mfp_cfg_t colibri_pxa320_lcd_pin_config[] __initdata = {
154 GPIO6_2_LCD_LDD_0, 188 GPIO6_2_LCD_LDD_0,
@@ -205,61 +239,24 @@ static inline void __init colibri_pxa320_init_ac97(void)
205static inline void colibri_pxa320_init_ac97(void) {} 239static inline void colibri_pxa320_init_ac97(void) {}
206#endif 240#endif
207 241
208/*
209 * The following configuration is verified to work with the Toradex Orchid
210 * carrier board
211 */
212static mfp_cfg_t colibri_pxa320_uart_pin_config[] __initdata = {
213 /* UART 1 configuration (may be set by bootloader) */
214 GPIO99_UART1_CTS,
215 GPIO104_UART1_RTS,
216 GPIO97_UART1_RXD,
217 GPIO98_UART1_TXD,
218 GPIO101_UART1_DTR,
219 GPIO103_UART1_DSR,
220 GPIO100_UART1_DCD,
221 GPIO102_UART1_RI,
222
223 /* UART 2 configuration */
224 GPIO109_UART2_CTS,
225 GPIO112_UART2_RTS,
226 GPIO110_UART2_RXD,
227 GPIO111_UART2_TXD,
228
229 /* UART 3 configuration */
230 GPIO30_UART3_RXD,
231 GPIO31_UART3_TXD,
232};
233
234static void __init colibri_pxa320_init_uart(void)
235{
236 pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa320_uart_pin_config));
237}
238
239void __init colibri_pxa320_init(void) 242void __init colibri_pxa320_init(void)
240{ 243{
241 pxa_set_ffuart_info(NULL);
242 pxa_set_btuart_info(NULL);
243 pxa_set_stuart_info(NULL);
244
245 colibri_pxa320_init_eth(); 244 colibri_pxa320_init_eth();
246 colibri_pxa320_init_ohci();
247 colibri_pxa3xx_init_nand(); 245 colibri_pxa3xx_init_nand();
248 colibri_pxa320_init_lcd(); 246 colibri_pxa320_init_lcd();
249 colibri_pxa3xx_init_lcd(mfp_to_gpio(GPIO49_GPIO)); 247 colibri_pxa3xx_init_lcd(mfp_to_gpio(GPIO49_GPIO));
250 colibri_pxa320_init_ac97(); 248 colibri_pxa320_init_ac97();
251 colibri_pxa3xx_init_mmc(ARRAY_AND_SIZE(colibri_pxa320_mmc_pin_config),
252 mfp_to_gpio(MFP_PIN_GPIO28));
253 colibri_pxa320_init_uart();
254 colibri_pxa320_init_udc(); 249 colibri_pxa320_init_udc();
250
251 /* Evalboard init */
252 pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa320_evalboard_pin_config));
253 colibri_evalboard_init();
255} 254}
256 255
257MACHINE_START(COLIBRI320, "Toradex Colibri PXA320") 256MACHINE_START(COLIBRI320, "Toradex Colibri PXA320")
258 .phys_io = 0x40000000,
259 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
260 .boot_params = COLIBRI_SDRAM_BASE + 0x100, 257 .boot_params = COLIBRI_SDRAM_BASE + 0x100,
261 .init_machine = colibri_pxa320_init, 258 .init_machine = colibri_pxa320_init,
262 .map_io = pxa_map_io, 259 .map_io = pxa3xx_map_io,
263 .init_irq = pxa3xx_init_irq, 260 .init_irq = pxa3xx_init_irq,
264 .timer = &pxa_timer, 261 .timer = &pxa_timer,
265MACHINE_END 262MACHINE_END
diff --git a/arch/arm/mach-pxa/colibri-pxa3xx.c b/arch/arm/mach-pxa/colibri-pxa3xx.c
index 199afa2ae303..3f9be419959d 100644
--- a/arch/arm/mach-pxa/colibri-pxa3xx.c
+++ b/arch/arm/mach-pxa/colibri-pxa3xx.c
@@ -64,55 +64,6 @@ void __init colibri_pxa3xx_init_eth(struct ax_plat_data *plat_data)
64} 64}
65#endif 65#endif
66 66
67#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
68static int mmc_detect_pin;
69
70static int colibri_pxa3xx_mci_init(struct device *dev,
71 irq_handler_t colibri_mmc_detect_int,
72 void *data)
73{
74 int ret;
75
76 ret = gpio_request(mmc_detect_pin, "mmc card detect");
77 if (ret)
78 return ret;
79
80 gpio_direction_input(mmc_detect_pin);
81 ret = request_irq(gpio_to_irq(mmc_detect_pin), colibri_mmc_detect_int,
82 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
83 "MMC card detect", data);
84 if (ret) {
85 gpio_free(mmc_detect_pin);
86 return ret;
87 }
88
89 return 0;
90}
91
92static void colibri_pxa3xx_mci_exit(struct device *dev, void *data)
93{
94 free_irq(mmc_detect_pin, data);
95 gpio_free(gpio_to_irq(mmc_detect_pin));
96}
97
98static struct pxamci_platform_data colibri_pxa3xx_mci_platform_data = {
99 .detect_delay_ms = 200,
100 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
101 .init = colibri_pxa3xx_mci_init,
102 .exit = colibri_pxa3xx_mci_exit,
103 .gpio_card_detect = -1,
104 .gpio_card_ro = -1,
105 .gpio_power = -1,
106};
107
108void __init colibri_pxa3xx_init_mmc(mfp_cfg_t *pins, int len, int detect_pin)
109{
110 pxa3xx_mfp_config(pins, len);
111 mmc_detect_pin = detect_pin;
112 pxa_set_mci_info(&colibri_pxa3xx_mci_platform_data);
113}
114#endif /* CONFIG_MMC_PXA || CONFIG_MMC_PXA_MODULE */
115
116#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) 67#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
117static int lcd_bl_pin; 68static int lcd_bl_pin;
118 69
@@ -154,7 +105,7 @@ void __init colibri_pxa3xx_init_lcd(int bl_pin)
154 lcd_bl_pin = bl_pin; 105 lcd_bl_pin = bl_pin;
155 gpio_request(bl_pin, "lcd backlight"); 106 gpio_request(bl_pin, "lcd backlight");
156 gpio_direction_output(bl_pin, 0); 107 gpio_direction_output(bl_pin, 0);
157 set_pxa_fb_info(&sharp_lq43_info); 108 pxa_set_fb_info(NULL, &sharp_lq43_info);
158} 109}
159#endif 110#endif
160 111
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 3fb0fc099080..3a5507e31919 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -24,10 +24,12 @@
24#include <linux/gpio.h> 24#include <linux/gpio.h>
25#include <linux/backlight.h> 25#include <linux/backlight.h>
26#include <linux/i2c.h> 26#include <linux/i2c.h>
27#include <linux/i2c/pxa-i2c.h>
27#include <linux/io.h> 28#include <linux/io.h>
28#include <linux/spi/spi.h> 29#include <linux/spi/spi.h>
29#include <linux/spi/ads7846.h> 30#include <linux/spi/ads7846.h>
30#include <linux/spi/corgi_lcd.h> 31#include <linux/spi/corgi_lcd.h>
32#include <linux/spi/pxa2xx_spi.h>
31#include <linux/mtd/sharpsl.h> 33#include <linux/mtd/sharpsl.h>
32#include <linux/input/matrix_keypad.h> 34#include <linux/input/matrix_keypad.h>
33#include <video/w100fb.h> 35#include <video/w100fb.h>
@@ -44,11 +46,9 @@
44#include <asm/mach/irq.h> 46#include <asm/mach/irq.h>
45 47
46#include <mach/pxa25x.h> 48#include <mach/pxa25x.h>
47#include <plat/i2c.h>
48#include <mach/irda.h> 49#include <mach/irda.h>
49#include <mach/mmc.h> 50#include <mach/mmc.h>
50#include <mach/udc.h> 51#include <mach/udc.h>
51#include <mach/pxa2xx_spi.h>
52#include <mach/corgi.h> 52#include <mach/corgi.h>
53#include <mach/sharpsl_pm.h> 53#include <mach/sharpsl_pm.h>
54 54
@@ -462,7 +462,6 @@ static struct pxaficp_platform_data corgi_ficp_platform_data = {
462 * USB Device Controller 462 * USB Device Controller
463 */ 463 */
464static struct pxa2xx_udc_mach_info udc_info __initdata = { 464static struct pxa2xx_udc_mach_info udc_info __initdata = {
465 .gpio_vbus = -1,
466 /* no connect GPIO; corgi can't tell connection status */ 465 /* no connect GPIO; corgi can't tell connection status */
467 .gpio_pullup = CORGI_GPIO_USB_PULLUP, 466 .gpio_pullup = CORGI_GPIO_USB_PULLUP,
468}; 467};
@@ -720,10 +719,8 @@ static void __init fixup_corgi(struct machine_desc *desc,
720 719
721#ifdef CONFIG_MACH_CORGI 720#ifdef CONFIG_MACH_CORGI
722MACHINE_START(CORGI, "SHARP Corgi") 721MACHINE_START(CORGI, "SHARP Corgi")
723 .phys_io = 0x40000000,
724 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
725 .fixup = fixup_corgi, 722 .fixup = fixup_corgi,
726 .map_io = pxa_map_io, 723 .map_io = pxa25x_map_io,
727 .init_irq = pxa25x_init_irq, 724 .init_irq = pxa25x_init_irq,
728 .init_machine = corgi_init, 725 .init_machine = corgi_init,
729 .timer = &pxa_timer, 726 .timer = &pxa_timer,
@@ -732,10 +729,8 @@ MACHINE_END
732 729
733#ifdef CONFIG_MACH_SHEPHERD 730#ifdef CONFIG_MACH_SHEPHERD
734MACHINE_START(SHEPHERD, "SHARP Shepherd") 731MACHINE_START(SHEPHERD, "SHARP Shepherd")
735 .phys_io = 0x40000000,
736 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
737 .fixup = fixup_corgi, 732 .fixup = fixup_corgi,
738 .map_io = pxa_map_io, 733 .map_io = pxa25x_map_io,
739 .init_irq = pxa25x_init_irq, 734 .init_irq = pxa25x_init_irq,
740 .init_machine = corgi_init, 735 .init_machine = corgi_init,
741 .timer = &pxa_timer, 736 .timer = &pxa_timer,
@@ -744,10 +739,8 @@ MACHINE_END
744 739
745#ifdef CONFIG_MACH_HUSKY 740#ifdef CONFIG_MACH_HUSKY
746MACHINE_START(HUSKY, "SHARP Husky") 741MACHINE_START(HUSKY, "SHARP Husky")
747 .phys_io = 0x40000000,
748 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
749 .fixup = fixup_corgi, 742 .fixup = fixup_corgi,
750 .map_io = pxa_map_io, 743 .map_io = pxa25x_map_io,
751 .init_irq = pxa25x_init_irq, 744 .init_irq = pxa25x_init_irq,
752 .init_machine = corgi_init, 745 .init_machine = corgi_init,
753 .timer = &pxa_timer, 746 .timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/cpufreq-pxa2xx.c b/arch/arm/mach-pxa/cpufreq-pxa2xx.c
index 58093d9e07be..6a7aeab42f6c 100644
--- a/arch/arm/mach-pxa/cpufreq-pxa2xx.c
+++ b/arch/arm/mach-pxa/cpufreq-pxa2xx.c
@@ -38,8 +38,10 @@
38#include <linux/cpufreq.h> 38#include <linux/cpufreq.h>
39#include <linux/err.h> 39#include <linux/err.h>
40#include <linux/regulator/consumer.h> 40#include <linux/regulator/consumer.h>
41#include <linux/io.h>
41 42
42#include <mach/pxa2xx-regs.h> 43#include <mach/pxa2xx-regs.h>
44#include <mach/smemc.h>
43 45
44#ifdef DEBUG 46#ifdef DEBUG
45static unsigned int freq_debug; 47static unsigned int freq_debug;
@@ -242,7 +244,7 @@ static void pxa27x_guess_max_freq(void)
242 244
243static void init_sdram_rows(void) 245static void init_sdram_rows(void)
244{ 246{
245 uint32_t mdcnfg = MDCNFG; 247 uint32_t mdcnfg = __raw_readl(MDCNFG);
246 unsigned int drac2 = 0, drac0 = 0; 248 unsigned int drac2 = 0, drac0 = 0;
247 249
248 if (mdcnfg & (MDCNFG_DE2 | MDCNFG_DE3)) 250 if (mdcnfg & (MDCNFG_DE2 | MDCNFG_DE3))
@@ -331,8 +333,8 @@ static int pxa_set_target(struct cpufreq_policy *policy,
331 * we need to preset the smaller DRI before the change. If we're 333 * we need to preset the smaller DRI before the change. If we're
332 * speeding up we need to set the larger DRI value after the change. 334 * speeding up we need to set the larger DRI value after the change.
333 */ 335 */
334 preset_mdrefr = postset_mdrefr = MDREFR; 336 preset_mdrefr = postset_mdrefr = __raw_readl(MDREFR);
335 if ((MDREFR & MDREFR_DRI_MASK) > mdrefr_dri(new_freq_mem)) { 337 if ((preset_mdrefr & MDREFR_DRI_MASK) > mdrefr_dri(new_freq_mem)) {
336 preset_mdrefr = (preset_mdrefr & ~MDREFR_DRI_MASK); 338 preset_mdrefr = (preset_mdrefr & ~MDREFR_DRI_MASK);
337 preset_mdrefr |= mdrefr_dri(new_freq_mem); 339 preset_mdrefr |= mdrefr_dri(new_freq_mem);
338 } 340 }
@@ -370,7 +372,7 @@ static int pxa_set_target(struct cpufreq_policy *policy,
3703: nop \n\ 3723: nop \n\
371 " 373 "
372 : "=&r" (unused) 374 : "=&r" (unused)
373 : "r" (&MDREFR), "r" (cclkcfg), 375 : "r" (MDREFR), "r" (cclkcfg),
374 "r" (preset_mdrefr), "r" (postset_mdrefr) 376 "r" (preset_mdrefr), "r" (postset_mdrefr)
375 : "r4", "r5"); 377 : "r4", "r5");
376 local_irq_restore(flags); 378 local_irq_restore(flags);
diff --git a/arch/arm/mach-pxa/cpufreq-pxa3xx.c b/arch/arm/mach-pxa/cpufreq-pxa3xx.c
index 0a0d0fe99220..88fbec05ec50 100644
--- a/arch/arm/mach-pxa/cpufreq-pxa3xx.c
+++ b/arch/arm/mach-pxa/cpufreq-pxa3xx.c
@@ -159,7 +159,7 @@ static int pxa3xx_cpufreq_verify(struct cpufreq_policy *policy)
159 159
160static unsigned int pxa3xx_cpufreq_get(unsigned int cpu) 160static unsigned int pxa3xx_cpufreq_get(unsigned int cpu)
161{ 161{
162 return get_clk_frequency_khz(0); 162 return pxa3xx_get_clk_frequency_khz(0);
163} 163}
164 164
165static int pxa3xx_cpufreq_set(struct cpufreq_policy *policy, 165static int pxa3xx_cpufreq_set(struct cpufreq_policy *policy,
@@ -212,7 +212,8 @@ static int pxa3xx_cpufreq_init(struct cpufreq_policy *policy)
212 policy->cpuinfo.min_freq = 104000; 212 policy->cpuinfo.min_freq = 104000;
213 policy->cpuinfo.max_freq = (cpu_is_pxa320()) ? 806000 : 624000; 213 policy->cpuinfo.max_freq = (cpu_is_pxa320()) ? 806000 : 624000;
214 policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */ 214 policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */
215 policy->cur = policy->min = policy->max = get_clk_frequency_khz(0); 215 policy->max = pxa3xx_get_clk_frequency_khz(0);
216 policy->cur = policy->min = policy->max;
216 217
217 if (cpu_is_pxa300() || cpu_is_pxa310()) 218 if (cpu_is_pxa300() || cpu_is_pxa310())
218 ret = setup_freqs_table(policy, ARRAY_AND_SIZE(pxa300_freqs)); 219 ret = setup_freqs_table(policy, ARRAY_AND_SIZE(pxa300_freqs));
diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb726.c
index 91fd4fea6a54..0481c29a70e8 100644
--- a/arch/arm/mach-pxa/csb726.c
+++ b/arch/arm/mach-pxa/csb726.c
@@ -17,16 +17,17 @@
17#include <linux/mtd/partitions.h> 17#include <linux/mtd/partitions.h>
18#include <linux/sm501.h> 18#include <linux/sm501.h>
19#include <linux/smsc911x.h> 19#include <linux/smsc911x.h>
20#include <linux/i2c/pxa-i2c.h>
20 21
21#include <asm/mach-types.h> 22#include <asm/mach-types.h>
22#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
23#include <mach/csb726.h> 24#include <mach/csb726.h>
24#include <mach/mfp-pxa27x.h> 25#include <mach/mfp-pxa27x.h>
25#include <plat/i2c.h>
26#include <mach/mmc.h> 26#include <mach/mmc.h>
27#include <mach/ohci.h> 27#include <mach/ohci.h>
28#include <mach/pxa2xx-regs.h> 28#include <mach/pxa2xx-regs.h>
29#include <mach/audio.h> 29#include <mach/audio.h>
30#include <mach/smemc.h>
30 31
31#include "generic.h" 32#include "generic.h"
32#include "devices.h" 33#include "devices.h"
@@ -255,9 +256,9 @@ static struct platform_device *devices[] __initdata = {
255static void __init csb726_init(void) 256static void __init csb726_init(void)
256{ 257{
257 pxa2xx_mfp_config(ARRAY_AND_SIZE(csb726_pin_config)); 258 pxa2xx_mfp_config(ARRAY_AND_SIZE(csb726_pin_config));
258/* MSC1 = 0x7ffc3ffc; *//* LAN9215/EXP_CS */ 259/* __raw_writel(0x7ffc3ffc, MSC1); *//* LAN9215/EXP_CS */
259/* MSC2 = 0x06697ff4; *//* none/SM501 */ 260/* __raw_writel(0x06697ff4, MSC2); *//* none/SM501 */
260 MSC2 = (MSC2 & ~0xffff) | 0x7ff4; /* SM501 */ 261 __raw_writel((__raw_readl(MSC2) & ~0xffff) | 0x7ff4, MSC2); /* SM501 */
261 262
262 pxa_set_ffuart_info(NULL); 263 pxa_set_ffuart_info(NULL);
263 pxa_set_btuart_info(NULL); 264 pxa_set_btuart_info(NULL);
@@ -272,10 +273,8 @@ static void __init csb726_init(void)
272} 273}
273 274
274MACHINE_START(CSB726, "Cogent CSB726") 275MACHINE_START(CSB726, "Cogent CSB726")
275 .phys_io = 0x40000000,
276 .boot_params = 0xa0000100, 276 .boot_params = 0xa0000100,
277 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, 277 .map_io = pxa27x_map_io,
278 .map_io = pxa_map_io,
279 .init_irq = pxa27x_init_irq, 278 .init_irq = pxa27x_init_irq,
280 .init_machine = csb726_init, 279 .init_machine = csb726_init,
281 .timer = &pxa_timer, 280 .timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c
index 65447dc736c2..2e0425404de5 100644
--- a/arch/arm/mach-pxa/devices.c
+++ b/arch/arm/mach-pxa/devices.c
@@ -3,19 +3,20 @@
3#include <linux/init.h> 3#include <linux/init.h>
4#include <linux/platform_device.h> 4#include <linux/platform_device.h>
5#include <linux/dma-mapping.h> 5#include <linux/dma-mapping.h>
6#include <linux/spi/pxa2xx_spi.h>
7#include <linux/i2c/pxa-i2c.h>
6 8
7#include <asm/pmu.h> 9#include <asm/pmu.h>
8#include <mach/udc.h> 10#include <mach/udc.h>
11#include <mach/pxa3xx-u2d.h>
9#include <mach/pxafb.h> 12#include <mach/pxafb.h>
10#include <mach/mmc.h> 13#include <mach/mmc.h>
11#include <mach/irda.h> 14#include <mach/irda.h>
12#include <mach/ohci.h> 15#include <mach/ohci.h>
13#include <mach/pxa27x_keypad.h> 16#include <plat/pxa27x_keypad.h>
14#include <mach/pxa2xx_spi.h>
15#include <mach/camera.h> 17#include <mach/camera.h>
16#include <mach/audio.h> 18#include <mach/audio.h>
17#include <mach/hardware.h> 19#include <mach/hardware.h>
18#include <plat/i2c.h>
19#include <plat/pxa3xx_nand.h> 20#include <plat/pxa3xx_nand.h>
20 21
21#include "devices.h" 22#include "devices.h"
@@ -89,7 +90,6 @@ void __init pxa_set_mci_info(struct pxamci_platform_data *info)
89 90
90static struct pxa2xx_udc_mach_info pxa_udc_info = { 91static struct pxa2xx_udc_mach_info pxa_udc_info = {
91 .gpio_pullup = -1, 92 .gpio_pullup = -1,
92 .gpio_vbus = -1,
93}; 93};
94 94
95void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info) 95void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
@@ -134,6 +134,33 @@ struct platform_device pxa27x_device_udc = {
134 } 134 }
135}; 135};
136 136
137#ifdef CONFIG_PXA3xx
138static struct resource pxa3xx_u2d_resources[] = {
139 [0] = {
140 .start = 0x54100000,
141 .end = 0x54100fff,
142 .flags = IORESOURCE_MEM,
143 },
144 [1] = {
145 .start = IRQ_USB2,
146 .end = IRQ_USB2,
147 .flags = IORESOURCE_IRQ,
148 },
149};
150
151struct platform_device pxa3xx_device_u2d = {
152 .name = "pxa3xx-u2d",
153 .id = -1,
154 .resource = pxa3xx_u2d_resources,
155 .num_resources = ARRAY_SIZE(pxa3xx_u2d_resources),
156};
157
158void __init pxa3xx_set_u2d_info(struct pxa3xx_u2d_platform_data *info)
159{
160 pxa_register_device(&pxa3xx_device_u2d, info);
161}
162#endif /* CONFIG_PXA3xx */
163
137static struct resource pxafb_resources[] = { 164static struct resource pxafb_resources[] = {
138 [0] = { 165 [0] = {
139 .start = 0x44000000, 166 .start = 0x44000000,
@@ -160,16 +187,12 @@ struct platform_device pxa_device_fb = {
160 .resource = pxafb_resources, 187 .resource = pxafb_resources,
161}; 188};
162 189
163void __init set_pxa_fb_info(struct pxafb_mach_info *info) 190void __init pxa_set_fb_info(struct device *parent, struct pxafb_mach_info *info)
164{ 191{
192 pxa_device_fb.dev.parent = parent;
165 pxa_register_device(&pxa_device_fb, info); 193 pxa_register_device(&pxa_device_fb, info);
166} 194}
167 195
168void __init set_pxa_fb_parent(struct device *parent_dev)
169{
170 pxa_device_fb.dev.parent = parent_dev;
171}
172
173static struct resource pxa_resource_ffuart[] = { 196static struct resource pxa_resource_ffuart[] = {
174 { 197 {
175 .start = 0x40100000, 198 .start = 0x40100000,
@@ -314,27 +337,6 @@ struct platform_device pxa27x_device_i2c_power = {
314}; 337};
315#endif 338#endif
316 339
317#ifdef CONFIG_PXA3xx
318static struct resource pxa3xx_resources_i2c_power[] = {
319 {
320 .start = 0x40f500c0,
321 .end = 0x40f500d3,
322 .flags = IORESOURCE_MEM,
323 }, {
324 .start = IRQ_PWRI2C,
325 .end = IRQ_PWRI2C,
326 .flags = IORESOURCE_IRQ,
327 },
328};
329
330struct platform_device pxa3xx_device_i2c_power = {
331 .name = "pxa3xx-pwri2c",
332 .id = 1,
333 .resource = pxa3xx_resources_i2c_power,
334 .num_resources = ARRAY_SIZE(pxa3xx_resources_i2c_power),
335};
336#endif
337
338static struct resource pxai2s_resources[] = { 340static struct resource pxai2s_resources[] = {
339 { 341 {
340 .start = 0x40400000, 342 .start = 0x40400000,
@@ -354,6 +356,31 @@ struct platform_device pxa_device_i2s = {
354 .num_resources = ARRAY_SIZE(pxai2s_resources), 356 .num_resources = ARRAY_SIZE(pxai2s_resources),
355}; 357};
356 358
359struct platform_device pxa_device_asoc_ssp1 = {
360 .name = "pxa-ssp-dai",
361 .id = 0,
362};
363
364struct platform_device pxa_device_asoc_ssp2= {
365 .name = "pxa-ssp-dai",
366 .id = 1,
367};
368
369struct platform_device pxa_device_asoc_ssp3 = {
370 .name = "pxa-ssp-dai",
371 .id = 2,
372};
373
374struct platform_device pxa_device_asoc_ssp4 = {
375 .name = "pxa-ssp-dai",
376 .id = 3,
377};
378
379struct platform_device pxa_device_asoc_platform = {
380 .name = "pxa-pcm-audio",
381 .id = -1,
382};
383
357static u64 pxaficp_dmamask = ~(u32)0; 384static u64 pxaficp_dmamask = ~(u32)0;
358 385
359struct platform_device pxa_device_ficp = { 386struct platform_device pxa_device_ficp = {
@@ -580,30 +607,35 @@ struct platform_device pxa25x_device_assp = {
580#endif /* CONFIG_PXA25x */ 607#endif /* CONFIG_PXA25x */
581 608
582#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) 609#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
583 610static struct resource pxa27x_resource_camera[] = {
584static struct resource pxa27x_resource_keypad[] = {
585 [0] = { 611 [0] = {
586 .start = 0x41500000, 612 .start = 0x50000000,
587 .end = 0x4150004c, 613 .end = 0x50000fff,
588 .flags = IORESOURCE_MEM, 614 .flags = IORESOURCE_MEM,
589 }, 615 },
590 [1] = { 616 [1] = {
591 .start = IRQ_KEYPAD, 617 .start = IRQ_CAMERA,
592 .end = IRQ_KEYPAD, 618 .end = IRQ_CAMERA,
593 .flags = IORESOURCE_IRQ, 619 .flags = IORESOURCE_IRQ,
594 }, 620 },
595}; 621};
596 622
597struct platform_device pxa27x_device_keypad = { 623static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
598 .name = "pxa27x-keypad", 624
599 .id = -1, 625static struct platform_device pxa27x_device_camera = {
600 .resource = pxa27x_resource_keypad, 626 .name = "pxa27x-camera",
601 .num_resources = ARRAY_SIZE(pxa27x_resource_keypad), 627 .id = 0, /* This is used to put cameras on this interface */
628 .dev = {
629 .dma_mask = &pxa27x_dma_mask_camera,
630 .coherent_dma_mask = 0xffffffff,
631 },
632 .num_resources = ARRAY_SIZE(pxa27x_resource_camera),
633 .resource = pxa27x_resource_camera,
602}; 634};
603 635
604void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info) 636void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
605{ 637{
606 pxa_register_device(&pxa27x_device_keypad, info); 638 pxa_register_device(&pxa27x_device_camera, info);
607} 639}
608 640
609static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32); 641static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
@@ -636,6 +668,33 @@ void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
636{ 668{
637 pxa_register_device(&pxa27x_device_ohci, info); 669 pxa_register_device(&pxa27x_device_ohci, info);
638} 670}
671#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
672
673#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x)
674static struct resource pxa27x_resource_keypad[] = {
675 [0] = {
676 .start = 0x41500000,
677 .end = 0x4150004c,
678 .flags = IORESOURCE_MEM,
679 },
680 [1] = {
681 .start = IRQ_KEYPAD,
682 .end = IRQ_KEYPAD,
683 .flags = IORESOURCE_IRQ,
684 },
685};
686
687struct platform_device pxa27x_device_keypad = {
688 .name = "pxa27x-keypad",
689 .id = -1,
690 .resource = pxa27x_resource_keypad,
691 .num_resources = ARRAY_SIZE(pxa27x_resource_keypad),
692};
693
694void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
695{
696 pxa_register_device(&pxa27x_device_keypad, info);
697}
639 698
640static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32); 699static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
641 700
@@ -780,79 +839,9 @@ struct platform_device pxa27x_device_pwm1 = {
780 .resource = pxa27x_resource_pwm1, 839 .resource = pxa27x_resource_pwm1,
781 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm1), 840 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm1),
782}; 841};
783 842#endif /* CONFIG_PXA27x || CONFIG_PXA3xx || CONFIG_PXA95x*/
784static struct resource pxa27x_resource_camera[] = {
785 [0] = {
786 .start = 0x50000000,
787 .end = 0x50000fff,
788 .flags = IORESOURCE_MEM,
789 },
790 [1] = {
791 .start = IRQ_CAMERA,
792 .end = IRQ_CAMERA,
793 .flags = IORESOURCE_IRQ,
794 },
795};
796
797static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
798
799static struct platform_device pxa27x_device_camera = {
800 .name = "pxa27x-camera",
801 .id = 0, /* This is used to put cameras on this interface */
802 .dev = {
803 .dma_mask = &pxa27x_dma_mask_camera,
804 .coherent_dma_mask = 0xffffffff,
805 },
806 .num_resources = ARRAY_SIZE(pxa27x_resource_camera),
807 .resource = pxa27x_resource_camera,
808};
809
810void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
811{
812 pxa_register_device(&pxa27x_device_camera, info);
813}
814#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
815 843
816#ifdef CONFIG_PXA3xx 844#ifdef CONFIG_PXA3xx
817static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
818
819static struct resource pxa3xx_resource_ssp4[] = {
820 [0] = {
821 .start = 0x41a00000,
822 .end = 0x41a0003f,
823 .flags = IORESOURCE_MEM,
824 },
825 [1] = {
826 .start = IRQ_SSP4,
827 .end = IRQ_SSP4,
828 .flags = IORESOURCE_IRQ,
829 },
830 [2] = {
831 /* DRCMR for RX */
832 .start = 2,
833 .end = 2,
834 .flags = IORESOURCE_DMA,
835 },
836 [3] = {
837 /* DRCMR for TX */
838 .start = 3,
839 .end = 3,
840 .flags = IORESOURCE_DMA,
841 },
842};
843
844struct platform_device pxa3xx_device_ssp4 = {
845 /* PXA3xx SSP is basically equivalent to PXA27x */
846 .name = "pxa27x-ssp",
847 .id = 3,
848 .dev = {
849 .dma_mask = &pxa3xx_ssp4_dma_mask,
850 .coherent_dma_mask = DMA_BIT_MASK(32),
851 },
852 .resource = pxa3xx_resource_ssp4,
853 .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4),
854};
855
856static struct resource pxa3xx_resources_mci2[] = { 845static struct resource pxa3xx_resources_mci2[] = {
857 [0] = { 846 [0] = {
858 .start = 0x42000000, 847 .start = 0x42000000,
@@ -931,6 +920,54 @@ void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
931 pxa_register_device(&pxa3xx_device_mci3, info); 920 pxa_register_device(&pxa3xx_device_mci3, info);
932} 921}
933 922
923static struct resource pxa3xx_resources_gcu[] = {
924 {
925 .start = 0x54000000,
926 .end = 0x54000fff,
927 .flags = IORESOURCE_MEM,
928 },
929 {
930 .start = IRQ_GCU,
931 .end = IRQ_GCU,
932 .flags = IORESOURCE_IRQ,
933 },
934};
935
936static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32);
937
938struct platform_device pxa3xx_device_gcu = {
939 .name = "pxa3xx-gcu",
940 .id = -1,
941 .num_resources = ARRAY_SIZE(pxa3xx_resources_gcu),
942 .resource = pxa3xx_resources_gcu,
943 .dev = {
944 .dma_mask = &pxa3xx_gcu_dmamask,
945 .coherent_dma_mask = 0xffffffff,
946 },
947};
948
949#endif /* CONFIG_PXA3xx */
950
951#if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x)
952static struct resource pxa3xx_resources_i2c_power[] = {
953 {
954 .start = 0x40f500c0,
955 .end = 0x40f500d3,
956 .flags = IORESOURCE_MEM,
957 }, {
958 .start = IRQ_PWRI2C,
959 .end = IRQ_PWRI2C,
960 .flags = IORESOURCE_IRQ,
961 },
962};
963
964struct platform_device pxa3xx_device_i2c_power = {
965 .name = "pxa3xx-pwri2c",
966 .id = 1,
967 .resource = pxa3xx_resources_i2c_power,
968 .num_resources = ARRAY_SIZE(pxa3xx_resources_i2c_power),
969};
970
934static struct resource pxa3xx_resources_nand[] = { 971static struct resource pxa3xx_resources_nand[] = {
935 [0] = { 972 [0] = {
936 .start = 0x43100000, 973 .start = 0x43100000,
@@ -974,33 +1011,45 @@ void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
974 pxa_register_device(&pxa3xx_device_nand, info); 1011 pxa_register_device(&pxa3xx_device_nand, info);
975} 1012}
976 1013
977static struct resource pxa3xx_resources_gcu[] = { 1014static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
978 { 1015
979 .start = 0x54000000, 1016static struct resource pxa3xx_resource_ssp4[] = {
980 .end = 0x54000fff, 1017 [0] = {
1018 .start = 0x41a00000,
1019 .end = 0x41a0003f,
981 .flags = IORESOURCE_MEM, 1020 .flags = IORESOURCE_MEM,
982 }, 1021 },
983 { 1022 [1] = {
984 .start = IRQ_GCU, 1023 .start = IRQ_SSP4,
985 .end = IRQ_GCU, 1024 .end = IRQ_SSP4,
986 .flags = IORESOURCE_IRQ, 1025 .flags = IORESOURCE_IRQ,
987 }, 1026 },
1027 [2] = {
1028 /* DRCMR for RX */
1029 .start = 2,
1030 .end = 2,
1031 .flags = IORESOURCE_DMA,
1032 },
1033 [3] = {
1034 /* DRCMR for TX */
1035 .start = 3,
1036 .end = 3,
1037 .flags = IORESOURCE_DMA,
1038 },
988}; 1039};
989 1040
990static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32); 1041struct platform_device pxa3xx_device_ssp4 = {
991 1042 /* PXA3xx SSP is basically equivalent to PXA27x */
992struct platform_device pxa3xx_device_gcu = { 1043 .name = "pxa27x-ssp",
993 .name = "pxa3xx-gcu", 1044 .id = 3,
994 .id = -1,
995 .num_resources = ARRAY_SIZE(pxa3xx_resources_gcu),
996 .resource = pxa3xx_resources_gcu,
997 .dev = { 1045 .dev = {
998 .dma_mask = &pxa3xx_gcu_dmamask, 1046 .dma_mask = &pxa3xx_ssp4_dma_mask,
999 .coherent_dma_mask = 0xffffffff, 1047 .coherent_dma_mask = DMA_BIT_MASK(32),
1000 }, 1048 },
1049 .resource = pxa3xx_resource_ssp4,
1050 .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4),
1001}; 1051};
1002 1052#endif /* CONFIG_PXA3xx || CONFIG_PXA95x */
1003#endif /* CONFIG_PXA3xx */
1004 1053
1005/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1. 1054/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
1006 * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */ 1055 * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
diff --git a/arch/arm/mach-pxa/devices.h b/arch/arm/mach-pxa/devices.h
index 50353ea49ba4..2fd5a8b35757 100644
--- a/arch/arm/mach-pxa/devices.h
+++ b/arch/arm/mach-pxa/devices.h
@@ -4,6 +4,7 @@ extern struct platform_device pxa3xx_device_mci2;
4extern struct platform_device pxa3xx_device_mci3; 4extern struct platform_device pxa3xx_device_mci3;
5extern struct platform_device pxa25x_device_udc; 5extern struct platform_device pxa25x_device_udc;
6extern struct platform_device pxa27x_device_udc; 6extern struct platform_device pxa27x_device_udc;
7extern struct platform_device pxa3xx_device_u2d;
7extern struct platform_device pxa_device_fb; 8extern struct platform_device pxa_device_fb;
8extern struct platform_device pxa_device_ffuart; 9extern struct platform_device pxa_device_ffuart;
9extern struct platform_device pxa_device_btuart; 10extern struct platform_device pxa_device_btuart;
@@ -38,4 +39,10 @@ extern struct platform_device pxa3xx_device_i2c_power;
38 39
39extern struct platform_device pxa3xx_device_gcu; 40extern struct platform_device pxa3xx_device_gcu;
40 41
42extern struct platform_device pxa_device_asoc_platform;
43extern struct platform_device pxa_device_asoc_ssp1;
44extern struct platform_device pxa_device_asoc_ssp2;
45extern struct platform_device pxa_device_asoc_ssp3;
46extern struct platform_device pxa_device_asoc_ssp4;
47
41void __init pxa_register_device(struct platform_device *dev, void *data); 48void __init pxa_register_device(struct platform_device *dev, void *data);
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index 0517c17978f3..f8a6e9d79a3a 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -26,10 +26,12 @@
26#include <linux/spi/spi.h> 26#include <linux/spi/spi.h>
27#include <linux/spi/tdo24m.h> 27#include <linux/spi/tdo24m.h>
28#include <linux/spi/libertas_spi.h> 28#include <linux/spi/libertas_spi.h>
29#include <linux/spi/pxa2xx_spi.h>
29#include <linux/power_supply.h> 30#include <linux/power_supply.h>
30#include <linux/apm-emulation.h> 31#include <linux/apm-emulation.h>
31#include <linux/i2c.h> 32#include <linux/i2c.h>
32#include <linux/i2c/pca953x.h> 33#include <linux/i2c/pca953x.h>
34#include <linux/i2c/pxa-i2c.h>
33#include <linux/regulator/userspace-consumer.h> 35#include <linux/regulator/userspace-consumer.h>
34 36
35#include <media/soc_camera.h> 37#include <media/soc_camera.h>
@@ -43,10 +45,8 @@
43#include <mach/pxafb.h> 45#include <mach/pxafb.h>
44#include <mach/ohci.h> 46#include <mach/ohci.h>
45#include <mach/mmc.h> 47#include <mach/mmc.h>
46#include <mach/pxa27x_keypad.h> 48#include <plat/pxa27x_keypad.h>
47#include <plat/i2c.h>
48#include <mach/camera.h> 49#include <mach/camera.h>
49#include <mach/pxa2xx_spi.h>
50 50
51#include "generic.h" 51#include "generic.h"
52#include "devices.h" 52#include "devices.h"
@@ -689,7 +689,7 @@ static struct pxafb_mach_info em_x270_lcd = {
689 689
690static void __init em_x270_init_lcd(void) 690static void __init em_x270_init_lcd(void)
691{ 691{
692 set_pxa_fb_info(&em_x270_lcd); 692 pxa_set_fb_info(NULL, &em_x270_lcd);
693} 693}
694#else 694#else
695static inline void em_x270_init_lcd(void) {} 695static inline void em_x270_init_lcd(void) {}
@@ -1015,7 +1015,6 @@ static struct soc_camera_link iclink = {
1015 .power = em_x270_sensor_power, 1015 .power = em_x270_sensor_power,
1016 .board_info = &em_x270_i2c_cam_info[0], 1016 .board_info = &em_x270_i2c_cam_info[0],
1017 .i2c_adapter_id = 0, 1017 .i2c_adapter_id = 0,
1018 .module_name = "mt9m111",
1019}; 1018};
1020 1019
1021static struct platform_device em_x270_camera = { 1020static struct platform_device em_x270_camera = {
@@ -1301,9 +1300,7 @@ static void __init em_x270_init(void)
1301 1300
1302MACHINE_START(EM_X270, "Compulab EM-X270") 1301MACHINE_START(EM_X270, "Compulab EM-X270")
1303 .boot_params = 0xa0000100, 1302 .boot_params = 0xa0000100,
1304 .phys_io = 0x40000000, 1303 .map_io = pxa27x_map_io,
1305 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
1306 .map_io = pxa_map_io,
1307 .init_irq = pxa27x_init_irq, 1304 .init_irq = pxa27x_init_irq,
1308 .timer = &pxa_timer, 1305 .timer = &pxa_timer,
1309 .init_machine = em_x270_init, 1306 .init_machine = em_x270_init,
@@ -1311,9 +1308,7 @@ MACHINE_END
1311 1308
1312MACHINE_START(EXEDA, "Compulab eXeda") 1309MACHINE_START(EXEDA, "Compulab eXeda")
1313 .boot_params = 0xa0000100, 1310 .boot_params = 0xa0000100,
1314 .phys_io = 0x40000000, 1311 .map_io = pxa27x_map_io,
1315 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
1316 .map_io = pxa_map_io,
1317 .init_irq = pxa27x_init_irq, 1312 .init_irq = pxa27x_init_irq,
1318 .timer = &pxa_timer, 1313 .timer = &pxa_timer,
1319 .init_machine = em_x270_init, 1314 .init_machine = em_x270_init,
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c
index 349212a1cbd3..2e3970fdde0b 100644
--- a/arch/arm/mach-pxa/eseries.c
+++ b/arch/arm/mach-pxa/eseries.c
@@ -20,6 +20,7 @@
20#include <linux/mfd/t7l66xb.h> 20#include <linux/mfd/t7l66xb.h>
21#include <linux/mtd/nand.h> 21#include <linux/mtd/nand.h>
22#include <linux/mtd/partitions.h> 22#include <linux/mtd/partitions.h>
23#include <linux/usb/gpio_vbus.h>
23 24
24#include <video/w100fb.h> 25#include <video/w100fb.h>
25 26
@@ -29,6 +30,7 @@
29 30
30#include <mach/pxa25x.h> 31#include <mach/pxa25x.h>
31#include <mach/eseries-gpio.h> 32#include <mach/eseries-gpio.h>
33#include <mach/eseries-irq.h>
32#include <mach/audio.h> 34#include <mach/audio.h>
33#include <mach/pxafb.h> 35#include <mach/pxafb.h>
34#include <mach/udc.h> 36#include <mach/udc.h>
@@ -50,12 +52,20 @@ void __init eseries_fixup(struct machine_desc *desc,
50 mi->bank[0].size = (64*1024*1024); 52 mi->bank[0].size = (64*1024*1024);
51} 53}
52 54
53struct pxa2xx_udc_mach_info e7xx_udc_mach_info = { 55struct gpio_vbus_mach_info e7xx_udc_info = {
54 .gpio_vbus = GPIO_E7XX_USB_DISC, 56 .gpio_vbus = GPIO_E7XX_USB_DISC,
55 .gpio_pullup = GPIO_E7XX_USB_PULLUP, 57 .gpio_pullup = GPIO_E7XX_USB_PULLUP,
56 .gpio_pullup_inverted = 1 58 .gpio_pullup_inverted = 1
57}; 59};
58 60
61static struct platform_device e7xx_gpio_vbus = {
62 .name = "gpio-vbus",
63 .id = -1,
64 .dev = {
65 .platform_data = &e7xx_udc_info,
66 },
67};
68
59struct pxaficp_platform_data e7xx_ficp_platform_data = { 69struct pxaficp_platform_data e7xx_ficp_platform_data = {
60 .gpio_pwdown = GPIO_E7XX_IR_OFF, 70 .gpio_pwdown = GPIO_E7XX_IR_OFF,
61 .transceiver_cap = IR_SIRMODE | IR_OFF, 71 .transceiver_cap = IR_SIRMODE | IR_OFF,
@@ -164,6 +174,7 @@ static struct platform_device e330_tc6387xb_device = {
164 174
165static struct platform_device *e330_devices[] __initdata = { 175static struct platform_device *e330_devices[] __initdata = {
166 &e330_tc6387xb_device, 176 &e330_tc6387xb_device,
177 &e7xx_gpio_vbus,
167}; 178};
168 179
169static void __init e330_init(void) 180static void __init e330_init(void)
@@ -174,15 +185,13 @@ static void __init e330_init(void)
174 eseries_register_clks(); 185 eseries_register_clks();
175 eseries_get_tmio_gpios(); 186 eseries_get_tmio_gpios();
176 platform_add_devices(ARRAY_AND_SIZE(e330_devices)); 187 platform_add_devices(ARRAY_AND_SIZE(e330_devices));
177 pxa_set_udc_info(&e7xx_udc_mach_info);
178} 188}
179 189
180MACHINE_START(E330, "Toshiba e330") 190MACHINE_START(E330, "Toshiba e330")
181 /* Maintainer: Ian Molton (spyro@f2s.com) */ 191 /* Maintainer: Ian Molton (spyro@f2s.com) */
182 .phys_io = 0x40000000,
183 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
184 .boot_params = 0xa0000100, 192 .boot_params = 0xa0000100,
185 .map_io = pxa_map_io, 193 .map_io = pxa25x_map_io,
194 .nr_irqs = ESERIES_NR_IRQS,
186 .init_irq = pxa25x_init_irq, 195 .init_irq = pxa25x_init_irq,
187 .fixup = eseries_fixup, 196 .fixup = eseries_fixup,
188 .init_machine = e330_init, 197 .init_machine = e330_init,
@@ -214,6 +223,7 @@ static struct platform_device e350_t7l66xb_device = {
214 223
215static struct platform_device *e350_devices[] __initdata = { 224static struct platform_device *e350_devices[] __initdata = {
216 &e350_t7l66xb_device, 225 &e350_t7l66xb_device,
226 &e7xx_gpio_vbus,
217}; 227};
218 228
219static void __init e350_init(void) 229static void __init e350_init(void)
@@ -224,15 +234,13 @@ static void __init e350_init(void)
224 eseries_register_clks(); 234 eseries_register_clks();
225 eseries_get_tmio_gpios(); 235 eseries_get_tmio_gpios();
226 platform_add_devices(ARRAY_AND_SIZE(e350_devices)); 236 platform_add_devices(ARRAY_AND_SIZE(e350_devices));
227 pxa_set_udc_info(&e7xx_udc_mach_info);
228} 237}
229 238
230MACHINE_START(E350, "Toshiba e350") 239MACHINE_START(E350, "Toshiba e350")
231 /* Maintainer: Ian Molton (spyro@f2s.com) */ 240 /* Maintainer: Ian Molton (spyro@f2s.com) */
232 .phys_io = 0x40000000,
233 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
234 .boot_params = 0xa0000100, 241 .boot_params = 0xa0000100,
235 .map_io = pxa_map_io, 242 .map_io = pxa25x_map_io,
243 .nr_irqs = ESERIES_NR_IRQS,
236 .init_irq = pxa25x_init_irq, 244 .init_irq = pxa25x_init_irq,
237 .fixup = eseries_fixup, 245 .fixup = eseries_fixup,
238 .init_machine = e350_init, 246 .init_machine = e350_init,
@@ -334,6 +342,7 @@ static struct platform_device e400_t7l66xb_device = {
334 342
335static struct platform_device *e400_devices[] __initdata = { 343static struct platform_device *e400_devices[] __initdata = {
336 &e400_t7l66xb_device, 344 &e400_t7l66xb_device,
345 &e7xx_gpio_vbus,
337}; 346};
338 347
339static void __init e400_init(void) 348static void __init e400_init(void)
@@ -345,17 +354,15 @@ static void __init e400_init(void)
345 /* Fixme - e400 may have a switched clock */ 354 /* Fixme - e400 may have a switched clock */
346 eseries_register_clks(); 355 eseries_register_clks();
347 eseries_get_tmio_gpios(); 356 eseries_get_tmio_gpios();
348 set_pxa_fb_info(&e400_pxafb_mach_info); 357 pxa_set_fb_info(NULL, &e400_pxafb_mach_info);
349 platform_add_devices(ARRAY_AND_SIZE(e400_devices)); 358 platform_add_devices(ARRAY_AND_SIZE(e400_devices));
350 pxa_set_udc_info(&e7xx_udc_mach_info);
351} 359}
352 360
353MACHINE_START(E400, "Toshiba e400") 361MACHINE_START(E400, "Toshiba e400")
354 /* Maintainer: Ian Molton (spyro@f2s.com) */ 362 /* Maintainer: Ian Molton (spyro@f2s.com) */
355 .phys_io = 0x40000000,
356 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
357 .boot_params = 0xa0000100, 363 .boot_params = 0xa0000100,
358 .map_io = pxa_map_io, 364 .map_io = pxa25x_map_io,
365 .nr_irqs = ESERIES_NR_IRQS,
359 .init_irq = pxa25x_init_irq, 366 .init_irq = pxa25x_init_irq,
360 .fixup = eseries_fixup, 367 .fixup = eseries_fixup,
361 .init_machine = e400_init, 368 .init_machine = e400_init,
@@ -521,6 +528,7 @@ static struct platform_device e740_t7l66xb_device = {
521static struct platform_device *e740_devices[] __initdata = { 528static struct platform_device *e740_devices[] __initdata = {
522 &e740_fb_device, 529 &e740_fb_device,
523 &e740_t7l66xb_device, 530 &e740_t7l66xb_device,
531 &e7xx_gpio_vbus,
524}; 532};
525 533
526static void __init e740_init(void) 534static void __init e740_init(void)
@@ -534,17 +542,15 @@ static void __init e740_init(void)
534 "UDCCLK", &pxa25x_device_udc.dev), 542 "UDCCLK", &pxa25x_device_udc.dev),
535 eseries_get_tmio_gpios(); 543 eseries_get_tmio_gpios();
536 platform_add_devices(ARRAY_AND_SIZE(e740_devices)); 544 platform_add_devices(ARRAY_AND_SIZE(e740_devices));
537 pxa_set_udc_info(&e7xx_udc_mach_info);
538 pxa_set_ac97_info(NULL); 545 pxa_set_ac97_info(NULL);
539 pxa_set_ficp_info(&e7xx_ficp_platform_data); 546 pxa_set_ficp_info(&e7xx_ficp_platform_data);
540} 547}
541 548
542MACHINE_START(E740, "Toshiba e740") 549MACHINE_START(E740, "Toshiba e740")
543 /* Maintainer: Ian Molton (spyro@f2s.com) */ 550 /* Maintainer: Ian Molton (spyro@f2s.com) */
544 .phys_io = 0x40000000,
545 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
546 .boot_params = 0xa0000100, 551 .boot_params = 0xa0000100,
547 .map_io = pxa_map_io, 552 .map_io = pxa25x_map_io,
553 .nr_irqs = ESERIES_NR_IRQS,
548 .init_irq = pxa25x_init_irq, 554 .init_irq = pxa25x_init_irq,
549 .fixup = eseries_fixup, 555 .fixup = eseries_fixup,
550 .init_machine = e740_init, 556 .init_machine = e740_init,
@@ -714,6 +720,7 @@ static struct platform_device e750_tc6393xb_device = {
714static struct platform_device *e750_devices[] __initdata = { 720static struct platform_device *e750_devices[] __initdata = {
715 &e750_fb_device, 721 &e750_fb_device,
716 &e750_tc6393xb_device, 722 &e750_tc6393xb_device,
723 &e7xx_gpio_vbus,
717}; 724};
718 725
719static void __init e750_init(void) 726static void __init e750_init(void)
@@ -726,17 +733,15 @@ static void __init e750_init(void)
726 "GPIO11_CLK", NULL), 733 "GPIO11_CLK", NULL),
727 eseries_get_tmio_gpios(); 734 eseries_get_tmio_gpios();
728 platform_add_devices(ARRAY_AND_SIZE(e750_devices)); 735 platform_add_devices(ARRAY_AND_SIZE(e750_devices));
729 pxa_set_udc_info(&e7xx_udc_mach_info);
730 pxa_set_ac97_info(NULL); 736 pxa_set_ac97_info(NULL);
731 pxa_set_ficp_info(&e7xx_ficp_platform_data); 737 pxa_set_ficp_info(&e7xx_ficp_platform_data);
732} 738}
733 739
734MACHINE_START(E750, "Toshiba e750") 740MACHINE_START(E750, "Toshiba e750")
735 /* Maintainer: Ian Molton (spyro@f2s.com) */ 741 /* Maintainer: Ian Molton (spyro@f2s.com) */
736 .phys_io = 0x40000000,
737 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
738 .boot_params = 0xa0000100, 742 .boot_params = 0xa0000100,
739 .map_io = pxa_map_io, 743 .map_io = pxa25x_map_io,
744 .nr_irqs = ESERIES_NR_IRQS,
740 .init_irq = pxa25x_init_irq, 745 .init_irq = pxa25x_init_irq,
741 .fixup = eseries_fixup, 746 .fixup = eseries_fixup,
742 .init_machine = e750_init, 747 .init_machine = e750_init,
@@ -877,12 +882,21 @@ static struct platform_device e800_fb_device = {
877 882
878/* --------------------------- UDC definitions --------------------------- */ 883/* --------------------------- UDC definitions --------------------------- */
879 884
880static struct pxa2xx_udc_mach_info e800_udc_mach_info = { 885static struct gpio_vbus_mach_info e800_udc_info = {
881 .gpio_vbus = GPIO_E800_USB_DISC, 886 .gpio_vbus = GPIO_E800_USB_DISC,
882 .gpio_pullup = GPIO_E800_USB_PULLUP, 887 .gpio_pullup = GPIO_E800_USB_PULLUP,
883 .gpio_pullup_inverted = 1 888 .gpio_pullup_inverted = 1
884}; 889};
885 890
891static struct platform_device e800_gpio_vbus = {
892 .name = "gpio-vbus",
893 .id = -1,
894 .dev = {
895 .platform_data = &e800_udc_info,
896 },
897};
898
899
886/* ----------------- e800 tc6393xb parameters ------------------ */ 900/* ----------------- e800 tc6393xb parameters ------------------ */
887 901
888static struct tc6393xb_platform_data e800_tc6393xb_info = { 902static struct tc6393xb_platform_data e800_tc6393xb_info = {
@@ -911,6 +925,7 @@ static struct platform_device e800_tc6393xb_device = {
911static struct platform_device *e800_devices[] __initdata = { 925static struct platform_device *e800_devices[] __initdata = {
912 &e800_fb_device, 926 &e800_fb_device,
913 &e800_tc6393xb_device, 927 &e800_tc6393xb_device,
928 &e800_gpio_vbus,
914}; 929};
915 930
916static void __init e800_init(void) 931static void __init e800_init(void)
@@ -923,16 +938,14 @@ static void __init e800_init(void)
923 "GPIO11_CLK", NULL), 938 "GPIO11_CLK", NULL),
924 eseries_get_tmio_gpios(); 939 eseries_get_tmio_gpios();
925 platform_add_devices(ARRAY_AND_SIZE(e800_devices)); 940 platform_add_devices(ARRAY_AND_SIZE(e800_devices));
926 pxa_set_udc_info(&e800_udc_mach_info);
927 pxa_set_ac97_info(NULL); 941 pxa_set_ac97_info(NULL);
928} 942}
929 943
930MACHINE_START(E800, "Toshiba e800") 944MACHINE_START(E800, "Toshiba e800")
931 /* Maintainer: Ian Molton (spyro@f2s.com) */ 945 /* Maintainer: Ian Molton (spyro@f2s.com) */
932 .phys_io = 0x40000000,
933 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
934 .boot_params = 0xa0000100, 946 .boot_params = 0xa0000100,
935 .map_io = pxa_map_io, 947 .map_io = pxa25x_map_io,
948 .nr_irqs = ESERIES_NR_IRQS,
936 .init_irq = pxa25x_init_irq, 949 .init_irq = pxa25x_init_irq,
937 .fixup = eseries_fixup, 950 .fixup = eseries_fixup,
938 .init_machine = e800_init, 951 .init_machine = e800_init,
diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c
index 626c82b13970..d88aed8fbe15 100644
--- a/arch/arm/mach-pxa/ezx.c
+++ b/arch/arm/mach-pxa/ezx.c
@@ -20,6 +20,7 @@
20#include <linux/gpio.h> 20#include <linux/gpio.h>
21#include <linux/gpio_keys.h> 21#include <linux/gpio_keys.h>
22#include <linux/leds-lp3944.h> 22#include <linux/leds-lp3944.h>
23#include <linux/i2c/pxa-i2c.h>
23 24
24#include <media/soc_camera.h> 25#include <media/soc_camera.h>
25 26
@@ -30,14 +31,15 @@
30#include <mach/pxa27x.h> 31#include <mach/pxa27x.h>
31#include <mach/pxafb.h> 32#include <mach/pxafb.h>
32#include <mach/ohci.h> 33#include <mach/ohci.h>
33#include <plat/i2c.h>
34#include <mach/hardware.h> 34#include <mach/hardware.h>
35#include <mach/pxa27x_keypad.h> 35#include <plat/pxa27x_keypad.h>
36#include <mach/camera.h> 36#include <mach/camera.h>
37 37
38#include "devices.h" 38#include "devices.h"
39#include "generic.h" 39#include "generic.h"
40 40
41#define EZX_NR_IRQS (IRQ_BOARD_START + 24)
42
41#define GPIO12_A780_FLIP_LID 12 43#define GPIO12_A780_FLIP_LID 12
42#define GPIO15_A1200_FLIP_LID 15 44#define GPIO15_A1200_FLIP_LID 15
43#define GPIO15_A910_FLIP_LID 15 45#define GPIO15_A910_FLIP_LID 15
@@ -753,7 +755,6 @@ static struct soc_camera_link a780_iclink = {
753 .flags = SOCAM_SENSOR_INVERT_PCLK, 755 .flags = SOCAM_SENSOR_INVERT_PCLK,
754 .i2c_adapter_id = 0, 756 .i2c_adapter_id = 0,
755 .board_info = &a780_camera_i2c_board_info, 757 .board_info = &a780_camera_i2c_board_info,
756 .module_name = "mt9m111",
757 .power = a780_camera_power, 758 .power = a780_camera_power,
758 .reset = a780_camera_reset, 759 .reset = a780_camera_reset,
759}; 760};
@@ -782,7 +783,7 @@ static void __init a780_init(void)
782 783
783 pxa_set_i2c_info(NULL); 784 pxa_set_i2c_info(NULL);
784 785
785 set_pxa_fb_info(&ezx_fb_info_1); 786 pxa_set_fb_info(NULL, &ezx_fb_info_1);
786 787
787 pxa_set_keypad_info(&a780_keypad_platform_data); 788 pxa_set_keypad_info(&a780_keypad_platform_data);
788 789
@@ -796,10 +797,9 @@ static void __init a780_init(void)
796} 797}
797 798
798MACHINE_START(EZX_A780, "Motorola EZX A780") 799MACHINE_START(EZX_A780, "Motorola EZX A780")
799 .phys_io = 0x40000000,
800 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
801 .boot_params = 0xa0000100, 800 .boot_params = 0xa0000100,
802 .map_io = pxa_map_io, 801 .map_io = pxa27x_map_io,
802 .nr_irqs = EZX_NR_IRQS,
803 .init_irq = pxa27x_init_irq, 803 .init_irq = pxa27x_init_irq,
804 .timer = &pxa_timer, 804 .timer = &pxa_timer,
805 .init_machine = a780_init, 805 .init_machine = a780_init,
@@ -853,7 +853,7 @@ static void __init e680_init(void)
853 pxa_set_i2c_info(NULL); 853 pxa_set_i2c_info(NULL);
854 i2c_register_board_info(0, ARRAY_AND_SIZE(e680_i2c_board_info)); 854 i2c_register_board_info(0, ARRAY_AND_SIZE(e680_i2c_board_info));
855 855
856 set_pxa_fb_info(&ezx_fb_info_1); 856 pxa_set_fb_info(NULL, &ezx_fb_info_1);
857 857
858 pxa_set_keypad_info(&e680_keypad_platform_data); 858 pxa_set_keypad_info(&e680_keypad_platform_data);
859 859
@@ -862,10 +862,9 @@ static void __init e680_init(void)
862} 862}
863 863
864MACHINE_START(EZX_E680, "Motorola EZX E680") 864MACHINE_START(EZX_E680, "Motorola EZX E680")
865 .phys_io = 0x40000000,
866 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
867 .boot_params = 0xa0000100, 865 .boot_params = 0xa0000100,
868 .map_io = pxa_map_io, 866 .map_io = pxa27x_map_io,
867 .nr_irqs = EZX_NR_IRQS,
869 .init_irq = pxa27x_init_irq, 868 .init_irq = pxa27x_init_irq,
870 .timer = &pxa_timer, 869 .timer = &pxa_timer,
871 .init_machine = e680_init, 870 .init_machine = e680_init,
@@ -919,7 +918,7 @@ static void __init a1200_init(void)
919 pxa_set_i2c_info(NULL); 918 pxa_set_i2c_info(NULL);
920 i2c_register_board_info(0, ARRAY_AND_SIZE(a1200_i2c_board_info)); 919 i2c_register_board_info(0, ARRAY_AND_SIZE(a1200_i2c_board_info));
921 920
922 set_pxa_fb_info(&ezx_fb_info_2); 921 pxa_set_fb_info(NULL, &ezx_fb_info_2);
923 922
924 pxa_set_keypad_info(&a1200_keypad_platform_data); 923 pxa_set_keypad_info(&a1200_keypad_platform_data);
925 924
@@ -928,10 +927,9 @@ static void __init a1200_init(void)
928} 927}
929 928
930MACHINE_START(EZX_A1200, "Motorola EZX A1200") 929MACHINE_START(EZX_A1200, "Motorola EZX A1200")
931 .phys_io = 0x40000000,
932 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
933 .boot_params = 0xa0000100, 930 .boot_params = 0xa0000100,
934 .map_io = pxa_map_io, 931 .map_io = pxa27x_map_io,
932 .nr_irqs = EZX_NR_IRQS,
935 .init_irq = pxa27x_init_irq, 933 .init_irq = pxa27x_init_irq,
936 .timer = &pxa_timer, 934 .timer = &pxa_timer,
937 .init_machine = a1200_init, 935 .init_machine = a1200_init,
@@ -1025,7 +1023,6 @@ static struct soc_camera_link a910_iclink = {
1025 .bus_id = 0, 1023 .bus_id = 0,
1026 .i2c_adapter_id = 0, 1024 .i2c_adapter_id = 0,
1027 .board_info = &a910_camera_i2c_board_info, 1025 .board_info = &a910_camera_i2c_board_info,
1028 .module_name = "mt9m111",
1029 .power = a910_camera_power, 1026 .power = a910_camera_power,
1030 .reset = a910_camera_reset, 1027 .reset = a910_camera_reset,
1031}; 1028};
@@ -1106,7 +1103,7 @@ static void __init a910_init(void)
1106 pxa_set_i2c_info(NULL); 1103 pxa_set_i2c_info(NULL);
1107 i2c_register_board_info(0, ARRAY_AND_SIZE(a910_i2c_board_info)); 1104 i2c_register_board_info(0, ARRAY_AND_SIZE(a910_i2c_board_info));
1108 1105
1109 set_pxa_fb_info(&ezx_fb_info_2); 1106 pxa_set_fb_info(NULL, &ezx_fb_info_2);
1110 1107
1111 pxa_set_keypad_info(&a910_keypad_platform_data); 1108 pxa_set_keypad_info(&a910_keypad_platform_data);
1112 1109
@@ -1120,10 +1117,9 @@ static void __init a910_init(void)
1120} 1117}
1121 1118
1122MACHINE_START(EZX_A910, "Motorola EZX A910") 1119MACHINE_START(EZX_A910, "Motorola EZX A910")
1123 .phys_io = 0x40000000,
1124 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
1125 .boot_params = 0xa0000100, 1120 .boot_params = 0xa0000100,
1126 .map_io = pxa_map_io, 1121 .map_io = pxa27x_map_io,
1122 .nr_irqs = EZX_NR_IRQS,
1127 .init_irq = pxa27x_init_irq, 1123 .init_irq = pxa27x_init_irq,
1128 .timer = &pxa_timer, 1124 .timer = &pxa_timer,
1129 .init_machine = a910_init, 1125 .init_machine = a910_init,
@@ -1177,7 +1173,7 @@ static void __init e6_init(void)
1177 pxa_set_i2c_info(NULL); 1173 pxa_set_i2c_info(NULL);
1178 i2c_register_board_info(0, ARRAY_AND_SIZE(e6_i2c_board_info)); 1174 i2c_register_board_info(0, ARRAY_AND_SIZE(e6_i2c_board_info));
1179 1175
1180 set_pxa_fb_info(&ezx_fb_info_2); 1176 pxa_set_fb_info(NULL, &ezx_fb_info_2);
1181 1177
1182 pxa_set_keypad_info(&e6_keypad_platform_data); 1178 pxa_set_keypad_info(&e6_keypad_platform_data);
1183 1179
@@ -1186,10 +1182,9 @@ static void __init e6_init(void)
1186} 1182}
1187 1183
1188MACHINE_START(EZX_E6, "Motorola EZX E6") 1184MACHINE_START(EZX_E6, "Motorola EZX E6")
1189 .phys_io = 0x40000000,
1190 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
1191 .boot_params = 0xa0000100, 1185 .boot_params = 0xa0000100,
1192 .map_io = pxa_map_io, 1186 .map_io = pxa27x_map_io,
1187 .nr_irqs = EZX_NR_IRQS,
1193 .init_irq = pxa27x_init_irq, 1188 .init_irq = pxa27x_init_irq,
1194 .timer = &pxa_timer, 1189 .timer = &pxa_timer,
1195 .init_machine = e6_init, 1190 .init_machine = e6_init,
@@ -1217,7 +1212,7 @@ static void __init e2_init(void)
1217 pxa_set_i2c_info(NULL); 1212 pxa_set_i2c_info(NULL);
1218 i2c_register_board_info(0, ARRAY_AND_SIZE(e2_i2c_board_info)); 1213 i2c_register_board_info(0, ARRAY_AND_SIZE(e2_i2c_board_info));
1219 1214
1220 set_pxa_fb_info(&ezx_fb_info_2); 1215 pxa_set_fb_info(NULL, &ezx_fb_info_2);
1221 1216
1222 pxa_set_keypad_info(&e2_keypad_platform_data); 1217 pxa_set_keypad_info(&e2_keypad_platform_data);
1223 1218
@@ -1226,10 +1221,9 @@ static void __init e2_init(void)
1226} 1221}
1227 1222
1228MACHINE_START(EZX_E2, "Motorola EZX E2") 1223MACHINE_START(EZX_E2, "Motorola EZX E2")
1229 .phys_io = 0x40000000,
1230 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
1231 .boot_params = 0xa0000100, 1224 .boot_params = 0xa0000100,
1232 .map_io = pxa_map_io, 1225 .map_io = pxa27x_map_io,
1226 .nr_irqs = EZX_NR_IRQS,
1233 .init_irq = pxa27x_init_irq, 1227 .init_irq = pxa27x_init_irq,
1234 .timer = &pxa_timer, 1228 .timer = &pxa_timer,
1235 .init_machine = e2_init, 1229 .init_machine = e2_init,
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index baabb3ce088e..f5d91efc2965 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -22,12 +22,13 @@
22 22
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <asm/system.h> 24#include <asm/system.h>
25#include <asm/pgtable.h>
26#include <asm/mach/map.h> 25#include <asm/mach/map.h>
27#include <asm/mach-types.h> 26#include <asm/mach-types.h>
28 27
29#include <mach/reset.h> 28#include <mach/reset.h>
30#include <mach/gpio.h> 29#include <mach/gpio.h>
30#include <mach/smemc.h>
31#include <mach/pxa3xx-regs.h>
31 32
32#include "generic.h" 33#include "generic.h"
33 34
@@ -35,9 +36,10 @@ void clear_reset_status(unsigned int mask)
35{ 36{
36 if (cpu_is_pxa2xx()) 37 if (cpu_is_pxa2xx())
37 pxa2xx_clear_reset_status(mask); 38 pxa2xx_clear_reset_status(mask);
38 39 else {
39 if (cpu_is_pxa3xx()) 40 /* RESET_STATUS_* has a 1:1 mapping with ARSR */
40 pxa3xx_clear_reset_status(mask); 41 ARSR = mask;
42 }
41} 43}
42 44
43unsigned long get_clock_tick_rate(void) 45unsigned long get_clock_tick_rate(void)
@@ -66,54 +68,22 @@ unsigned int get_clk_frequency_khz(int info)
66 return pxa25x_get_clk_frequency_khz(info); 68 return pxa25x_get_clk_frequency_khz(info);
67 else if (cpu_is_pxa27x()) 69 else if (cpu_is_pxa27x())
68 return pxa27x_get_clk_frequency_khz(info); 70 return pxa27x_get_clk_frequency_khz(info);
69 else 71 return 0;
70 return pxa3xx_get_clk_frequency_khz(info);
71} 72}
72EXPORT_SYMBOL(get_clk_frequency_khz); 73EXPORT_SYMBOL(get_clk_frequency_khz);
73 74
74/* 75/*
75 * Return the current memory clock frequency in units of 10kHz
76 */
77unsigned int get_memclk_frequency_10khz(void)
78{
79 if (cpu_is_pxa25x())
80 return pxa25x_get_memclk_frequency_10khz();
81 else if (cpu_is_pxa27x())
82 return pxa27x_get_memclk_frequency_10khz();
83 else
84 return pxa3xx_get_memclk_frequency_10khz();
85}
86EXPORT_SYMBOL(get_memclk_frequency_10khz);
87
88/*
89 * Intel PXA2xx internal register mapping. 76 * Intel PXA2xx internal register mapping.
90 * 77 *
91 * Note 1: not all PXA2xx variants implement all those addresses. 78 * Note: virtual 0xfffe0000-0xffffffff is reserved for the vector table
92 * 79 * and cache flush area.
93 * Note 2: virtual 0xfffe0000-0xffffffff is reserved for the vector table
94 * and cache flush area.
95 */ 80 */
96static struct map_desc standard_io_desc[] __initdata = { 81static struct map_desc common_io_desc[] __initdata = {
97 { /* Devs */ 82 { /* Devs */
98 .virtual = 0xf2000000, 83 .virtual = 0xf2000000,
99 .pfn = __phys_to_pfn(0x40000000), 84 .pfn = __phys_to_pfn(0x40000000),
100 .length = 0x02000000, 85 .length = 0x02000000,
101 .type = MT_DEVICE 86 .type = MT_DEVICE
102 }, { /* Mem Ctl */
103 .virtual = 0xf6000000,
104 .pfn = __phys_to_pfn(0x48000000),
105 .length = 0x00200000,
106 .type = MT_DEVICE
107 }, { /* Camera */
108 .virtual = 0xfa000000,
109 .pfn = __phys_to_pfn(0x50000000),
110 .length = 0x00100000,
111 .type = MT_DEVICE
112 }, { /* IMem ctl */
113 .virtual = 0xfe000000,
114 .pfn = __phys_to_pfn(0x58000000),
115 .length = 0x00100000,
116 .type = MT_DEVICE
117 }, { /* UNCACHED_PHYS_0 */ 87 }, { /* UNCACHED_PHYS_0 */
118 .virtual = 0xff000000, 88 .virtual = 0xff000000,
119 .pfn = __phys_to_pfn(0x00000000), 89 .pfn = __phys_to_pfn(0x00000000),
@@ -124,6 +94,5 @@ static struct map_desc standard_io_desc[] __initdata = {
124 94
125void __init pxa_map_io(void) 95void __init pxa_map_io(void)
126{ 96{
127 iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc)); 97 iotable_init(ARRAY_AND_SIZE(common_io_desc));
128 get_clk_frequency_khz(1);
129} 98}
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h
index c6305c5b8a72..e6c9344a95ae 100644
--- a/arch/arm/mach-pxa/generic.h
+++ b/arch/arm/mach-pxa/generic.h
@@ -9,18 +9,25 @@
9 * published by the Free Software Foundation. 9 * published by the Free Software Foundation.
10 */ 10 */
11 11
12struct irq_data;
12struct sys_timer; 13struct sys_timer;
13 14
14extern struct sys_timer pxa_timer; 15extern struct sys_timer pxa_timer;
15extern void __init pxa_init_irq(int irq_nr, 16extern void __init pxa_init_irq(int irq_nr,
16 int (*set_wake)(unsigned int, unsigned int)); 17 int (*set_wake)(struct irq_data *,
18 unsigned int));
17extern void __init pxa25x_init_irq(void); 19extern void __init pxa25x_init_irq(void);
18#ifdef CONFIG_CPU_PXA26x 20#ifdef CONFIG_CPU_PXA26x
19extern void __init pxa26x_init_irq(void); 21extern void __init pxa26x_init_irq(void);
20#endif 22#endif
21extern void __init pxa27x_init_irq(void); 23extern void __init pxa27x_init_irq(void);
22extern void __init pxa3xx_init_irq(void); 24extern void __init pxa3xx_init_irq(void);
25extern void __init pxa95x_init_irq(void);
26
23extern void __init pxa_map_io(void); 27extern void __init pxa_map_io(void);
28extern void __init pxa25x_map_io(void);
29extern void __init pxa27x_map_io(void);
30extern void __init pxa3xx_map_io(void);
24 31
25extern unsigned int get_clk_frequency_khz(int info); 32extern unsigned int get_clk_frequency_khz(int info);
26 33
@@ -32,18 +39,14 @@ extern unsigned int get_clk_frequency_khz(int info);
32 39
33#ifdef CONFIG_PXA25x 40#ifdef CONFIG_PXA25x
34extern unsigned pxa25x_get_clk_frequency_khz(int); 41extern unsigned pxa25x_get_clk_frequency_khz(int);
35extern unsigned pxa25x_get_memclk_frequency_10khz(void);
36#else 42#else
37#define pxa25x_get_clk_frequency_khz(x) (0) 43#define pxa25x_get_clk_frequency_khz(x) (0)
38#define pxa25x_get_memclk_frequency_10khz() (0)
39#endif 44#endif
40 45
41#ifdef CONFIG_PXA27x 46#ifdef CONFIG_PXA27x
42extern unsigned pxa27x_get_clk_frequency_khz(int); 47extern unsigned pxa27x_get_clk_frequency_khz(int);
43extern unsigned pxa27x_get_memclk_frequency_10khz(void);
44#else 48#else
45#define pxa27x_get_clk_frequency_khz(x) (0) 49#define pxa27x_get_clk_frequency_khz(x) (0)
46#define pxa27x_get_memclk_frequency_10khz() (0)
47#endif 50#endif
48 51
49#if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x) 52#if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x)
@@ -54,18 +57,14 @@ static inline void pxa2xx_clear_reset_status(unsigned int mask) {}
54 57
55#ifdef CONFIG_PXA3xx 58#ifdef CONFIG_PXA3xx
56extern unsigned pxa3xx_get_clk_frequency_khz(int); 59extern unsigned pxa3xx_get_clk_frequency_khz(int);
57extern unsigned pxa3xx_get_memclk_frequency_10khz(void);
58extern void pxa3xx_clear_reset_status(unsigned int);
59#else 60#else
60#define pxa3xx_get_clk_frequency_khz(x) (0) 61#define pxa3xx_get_clk_frequency_khz(x) (0)
61#define pxa3xx_get_memclk_frequency_10khz() (0)
62static inline void pxa3xx_clear_reset_status(unsigned int mask) {}
63#endif 62#endif
64 63
65extern struct sysdev_class pxa_irq_sysclass; 64extern struct syscore_ops pxa_irq_syscore_ops;
66extern struct sysdev_class pxa_gpio_sysclass; 65extern struct syscore_ops pxa_gpio_syscore_ops;
67extern struct sysdev_class pxa2xx_mfp_sysclass; 66extern struct syscore_ops pxa2xx_mfp_syscore_ops;
68extern struct sysdev_class pxa3xx_mfp_sysclass; 67extern struct syscore_ops pxa3xx_mfp_syscore_ops;
69 68
70void __init pxa_set_ffuart_info(void *info); 69void __init pxa_set_ffuart_info(void *info);
71void __init pxa_set_btuart_info(void *info); 70void __init pxa_set_btuart_info(void *info);
diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c
index 96c345129135..d65e4bde9b91 100644
--- a/arch/arm/mach-pxa/gumstix.c
+++ b/arch/arm/mach-pxa/gumstix.c
@@ -26,6 +26,7 @@
26#include <linux/gpio.h> 26#include <linux/gpio.h>
27#include <linux/err.h> 27#include <linux/err.h>
28#include <linux/clk.h> 28#include <linux/clk.h>
29#include <linux/usb/gpio_vbus.h>
29 30
30#include <asm/setup.h> 31#include <asm/setup.h>
31#include <asm/memory.h> 32#include <asm/memory.h>
@@ -106,14 +107,22 @@ static void __init gumstix_mmc_init(void)
106#endif 107#endif
107 108
108#ifdef CONFIG_USB_GADGET_PXA25X 109#ifdef CONFIG_USB_GADGET_PXA25X
109static struct pxa2xx_udc_mach_info gumstix_udc_info __initdata = { 110static struct gpio_vbus_mach_info gumstix_udc_info = {
110 .gpio_vbus = GPIO_GUMSTIX_USB_GPIOn, 111 .gpio_vbus = GPIO_GUMSTIX_USB_GPIOn,
111 .gpio_pullup = GPIO_GUMSTIX_USB_GPIOx, 112 .gpio_pullup = GPIO_GUMSTIX_USB_GPIOx,
112}; 113};
113 114
115static struct platform_device gumstix_gpio_vbus = {
116 .name = "gpio-vbus",
117 .id = -1,
118 .dev = {
119 .platform_data = &gumstix_udc_info,
120 },
121};
122
114static void __init gumstix_udc_init(void) 123static void __init gumstix_udc_init(void)
115{ 124{
116 pxa_set_udc_info(&gumstix_udc_info); 125 platform_device_register(&gumstix_gpio_vbus);
117} 126}
118#else 127#else
119static void gumstix_udc_init(void) 128static void gumstix_udc_init(void)
@@ -224,10 +233,8 @@ static void __init gumstix_init(void)
224} 233}
225 234
226MACHINE_START(GUMSTIX, "Gumstix") 235MACHINE_START(GUMSTIX, "Gumstix")
227 .phys_io = 0x40000000,
228 .boot_params = 0xa0000100, /* match u-boot bi_boot_params */ 236 .boot_params = 0xa0000100, /* match u-boot bi_boot_params */
229 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, 237 .map_io = pxa25x_map_io,
230 .map_io = pxa_map_io,
231 .init_irq = pxa25x_init_irq, 238 .init_irq = pxa25x_init_irq,
232 .timer = &pxa_timer, 239 .timer = &pxa_timer,
233 .init_machine = gumstix_init, 240 .init_machine = gumstix_init,
diff --git a/arch/arm/mach-pxa/h5000.c b/arch/arm/mach-pxa/h5000.c
index c1cab0871c99..657db469de1f 100644
--- a/arch/arm/mach-pxa/h5000.c
+++ b/arch/arm/mach-pxa/h5000.c
@@ -32,6 +32,7 @@
32#include <mach/pxa25x.h> 32#include <mach/pxa25x.h>
33#include <mach/h5000.h> 33#include <mach/h5000.h>
34#include <mach/udc.h> 34#include <mach/udc.h>
35#include <mach/smemc.h>
35 36
36#include "generic.h" 37#include "generic.h"
37 38
@@ -172,11 +173,11 @@ static unsigned long h5000_pin_config[] __initdata = {
172 173
173static void fix_msc(void) 174static void fix_msc(void)
174{ 175{
175 MSC0 = 0x129c24f2; 176 __raw_writel(0x129c24f2, MSC0);
176 MSC1 = 0x7ff424fa; 177 __raw_writel(0x7ff424fa, MSC1);
177 MSC2 = 0x7ff47ff4; 178 __raw_writel(0x7ff47ff4, MSC2);
178 179
179 MDREFR |= 0x02080000; 180 __raw_writel(__raw_readl(MDREFR) | 0x02080000, MDREFR);
180} 181}
181 182
182/* 183/*
@@ -201,10 +202,8 @@ static void __init h5000_init(void)
201} 202}
202 203
203MACHINE_START(H5400, "HP iPAQ H5000") 204MACHINE_START(H5400, "HP iPAQ H5000")
204 .phys_io = 0x40000000,
205 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
206 .boot_params = 0xa0000100, 205 .boot_params = 0xa0000100,
207 .map_io = pxa_map_io, 206 .map_io = pxa25x_map_io,
208 .init_irq = pxa25x_init_irq, 207 .init_irq = pxa25x_init_irq,
209 .timer = &pxa_timer, 208 .timer = &pxa_timer,
210 .init_machine = h5000_init, 209 .init_machine = h5000_init,
diff --git a/arch/arm/mach-pxa/himalaya.c b/arch/arm/mach-pxa/himalaya.c
index f9a2e4b0f090..e8603eba54bd 100644
--- a/arch/arm/mach-pxa/himalaya.c
+++ b/arch/arm/mach-pxa/himalaya.c
@@ -159,10 +159,8 @@ static void __init himalaya_init(void)
159 159
160 160
161MACHINE_START(HIMALAYA, "HTC Himalaya") 161MACHINE_START(HIMALAYA, "HTC Himalaya")
162 .phys_io = 0x40000000,
163 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
164 .boot_params = 0xa0000100, 162 .boot_params = 0xa0000100,
165 .map_io = pxa_map_io, 163 .map_io = pxa25x_map_io,
166 .init_irq = pxa25x_init_irq, 164 .init_irq = pxa25x_init_irq,
167 .init_machine = himalaya_init, 165 .init_machine = himalaya_init,
168 .timer = &pxa_timer, 166 .timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index 848c861dd23f..f941a495a4a8 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -33,7 +33,9 @@
33#include <linux/regulator/max1586.h> 33#include <linux/regulator/max1586.h>
34#include <linux/spi/ads7846.h> 34#include <linux/spi/ads7846.h>
35#include <linux/spi/spi.h> 35#include <linux/spi/spi.h>
36#include <linux/spi/pxa2xx_spi.h>
36#include <linux/usb/gpio_vbus.h> 37#include <linux/usb/gpio_vbus.h>
38#include <linux/i2c/pxa-i2c.h>
37 39
38#include <mach/hardware.h> 40#include <mach/hardware.h>
39#include <asm/mach-types.h> 41#include <asm/mach-types.h>
@@ -41,9 +43,7 @@
41 43
42#include <mach/pxa27x.h> 44#include <mach/pxa27x.h>
43#include <mach/hx4700.h> 45#include <mach/hx4700.h>
44#include <plat/i2c.h>
45#include <mach/irda.h> 46#include <mach/irda.h>
46#include <mach/pxa2xx_spi.h>
47 47
48#include <video/platform_lcd.h> 48#include <video/platform_lcd.h>
49#include <video/w100fb.h> 49#include <video/w100fb.h>
@@ -711,7 +711,7 @@ static struct regulator_consumer_supply bq24022_consumers[] = {
711static struct regulator_init_data bq24022_init_data = { 711static struct regulator_init_data bq24022_init_data = {
712 .constraints = { 712 .constraints = {
713 .max_uA = 500000, 713 .max_uA = 500000,
714 .valid_ops_mask = REGULATOR_CHANGE_CURRENT, 714 .valid_ops_mask = REGULATOR_CHANGE_CURRENT|REGULATOR_CHANGE_STATUS,
715 }, 715 },
716 .num_consumer_supplies = ARRAY_SIZE(bq24022_consumers), 716 .num_consumer_supplies = ARRAY_SIZE(bq24022_consumers),
717 .consumer_supplies = bq24022_consumers, 717 .consumer_supplies = bq24022_consumers,
@@ -735,7 +735,7 @@ static struct platform_device bq24022 = {
735 * StrataFlash 735 * StrataFlash
736 */ 736 */
737 737
738static void hx4700_set_vpp(struct map_info *map, int vpp) 738static void hx4700_set_vpp(struct platform_device *pdev, int vpp)
739{ 739{
740 gpio_set_value(GPIO91_HX4700_FLASH_VPEN, vpp); 740 gpio_set_value(GPIO91_HX4700_FLASH_VPEN, vpp);
741} 741}
@@ -870,10 +870,9 @@ static void __init hx4700_init(void)
870} 870}
871 871
872MACHINE_START(H4700, "HP iPAQ HX4700") 872MACHINE_START(H4700, "HP iPAQ HX4700")
873 .phys_io = 0x40000000,
874 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
875 .boot_params = 0xa0000100, 873 .boot_params = 0xa0000100,
876 .map_io = pxa_map_io, 874 .map_io = pxa27x_map_io,
875 .nr_irqs = HX4700_NR_IRQS,
877 .init_irq = pxa27x_init_irq, 876 .init_irq = pxa27x_init_irq,
878 .init_machine = hx4700_init, 877 .init_machine = hx4700_init,
879 .timer = &pxa_timer, 878 .timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/icontrol.c b/arch/arm/mach-pxa/icontrol.c
index 5ccb0ceff6c4..6cedc81da3bc 100644
--- a/arch/arm/mach-pxa/icontrol.c
+++ b/arch/arm/mach-pxa/icontrol.c
@@ -24,7 +24,7 @@
24#include <mach/mxm8x10.h> 24#include <mach/mxm8x10.h>
25 25
26#include <linux/spi/spi.h> 26#include <linux/spi/spi.h>
27#include <mach/pxa2xx_spi.h> 27#include <linux/spi/pxa2xx_spi.h>
28#include <linux/can/platform/mcp251x.h> 28#include <linux/can/platform/mcp251x.h>
29 29
30#include "generic.h" 30#include "generic.h"
@@ -191,10 +191,8 @@ static void __init icontrol_init(void)
191} 191}
192 192
193MACHINE_START(ICONTROL, "iControl/SafeTcam boards using Embedian MXM-8x10 CoM") 193MACHINE_START(ICONTROL, "iControl/SafeTcam boards using Embedian MXM-8x10 CoM")
194 .phys_io = 0x40000000,
195 .boot_params = 0xa0000100, 194 .boot_params = 0xa0000100,
196 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, 195 .map_io = pxa3xx_map_io,
197 .map_io = pxa_map_io,
198 .init_irq = pxa3xx_init_irq, 196 .init_irq = pxa3xx_init_irq,
199 .timer = &pxa_timer, 197 .timer = &pxa_timer,
200 .init_machine = icontrol_init 198 .init_machine = icontrol_init
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
index bc78c4dc0c66..f7fb64f11a7d 100644
--- a/arch/arm/mach-pxa/idp.c
+++ b/arch/arm/mach-pxa/idp.c
@@ -167,7 +167,7 @@ static void __init idp_init(void)
167 167
168 platform_device_register(&smc91x_device); 168 platform_device_register(&smc91x_device);
169 //platform_device_register(&mst_audio_device); 169 //platform_device_register(&mst_audio_device);
170 set_pxa_fb_info(&sharp_lm8v31); 170 pxa_set_fb_info(NULL, &sharp_lm8v31);
171 pxa_set_mci_info(&idp_mci_platform_data); 171 pxa_set_mci_info(&idp_mci_platform_data);
172} 172}
173 173
@@ -187,15 +187,13 @@ static struct map_desc idp_io_desc[] __initdata = {
187 187
188static void __init idp_map_io(void) 188static void __init idp_map_io(void)
189{ 189{
190 pxa_map_io(); 190 pxa25x_map_io();
191 iotable_init(idp_io_desc, ARRAY_SIZE(idp_io_desc)); 191 iotable_init(idp_io_desc, ARRAY_SIZE(idp_io_desc));
192} 192}
193 193
194 194
195MACHINE_START(PXA_IDP, "Vibren PXA255 IDP") 195MACHINE_START(PXA_IDP, "Vibren PXA255 IDP")
196 /* Maintainer: Vibren Technologies */ 196 /* Maintainer: Vibren Technologies */
197 .phys_io = 0x40000000,
198 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
199 .map_io = idp_map_io, 197 .map_io = idp_map_io,
200 .init_irq = pxa25x_init_irq, 198 .init_irq = pxa25x_init_irq,
201 .timer = &pxa_timer, 199 .timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/include/mach/addr-map.h b/arch/arm/mach-pxa/include/mach/addr-map.h
new file mode 100644
index 000000000000..f4c03659168c
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/addr-map.h
@@ -0,0 +1,48 @@
1#ifndef __ASM_MACH_ADDR_MAP_H
2#define __ASM_MACH_ADDR_MAP_H
3
4/*
5 * Chip Selects
6 */
7#define PXA_CS0_PHYS 0x00000000
8#define PXA_CS1_PHYS 0x04000000
9#define PXA_CS2_PHYS 0x08000000
10#define PXA_CS3_PHYS 0x0C000000
11#define PXA_CS4_PHYS 0x10000000
12#define PXA_CS5_PHYS 0x14000000
13
14#define PXA300_CS0_PHYS 0x00000000 /* PXA300/PXA310 _only_ */
15#define PXA300_CS1_PHYS 0x30000000 /* PXA300/PXA310 _only_ */
16#define PXA3xx_CS2_PHYS 0x10000000
17#define PXA3xx_CS3_PHYS 0x14000000
18
19/*
20 * Peripheral Bus
21 */
22#define PERIPH_PHYS 0x40000000
23#define PERIPH_VIRT 0xf2000000
24#define PERIPH_SIZE 0x02000000
25
26/*
27 * Static Memory Controller (w/ SDRAM controls on PXA25x/PXA27x)
28 */
29#define PXA2XX_SMEMC_PHYS 0x48000000
30#define PXA3XX_SMEMC_PHYS 0x4a000000
31#define SMEMC_VIRT 0xf6000000
32#define SMEMC_SIZE 0x00100000
33
34/*
35 * Dynamic Memory Controller (only on PXA3xx)
36 */
37#define DMEMC_PHYS 0x48100000
38#define DMEMC_VIRT 0xf6100000
39#define DMEMC_SIZE 0x00100000
40
41/*
42 * Internal Memory Controller (PXA27x and later)
43 */
44#define IMEMC_PHYS 0x58000000
45#define IMEMC_VIRT 0xfe000000
46#define IMEMC_SIZE 0x00100000
47
48#endif /* __ASM_MACH_ADDR_MAP_H */
diff --git a/arch/arm/mach-pxa/include/mach/balloon3.h b/arch/arm/mach-pxa/include/mach/balloon3.h
index eec92e6fd7cf..7074e76146c9 100644
--- a/arch/arm/mach-pxa/include/mach/balloon3.h
+++ b/arch/arm/mach-pxa/include/mach/balloon3.h
@@ -26,6 +26,8 @@ enum balloon3_features {
26#define BALLOON3_FPGA_VIRT (0xf1000000) /* as per balloon2 */ 26#define BALLOON3_FPGA_VIRT (0xf1000000) /* as per balloon2 */
27#define BALLOON3_FPGA_LENGTH 0x01000000 27#define BALLOON3_FPGA_LENGTH 0x01000000
28 28
29#define BALLOON3_FPGA_SETnCLR (0x1000)
30
29/* FPGA / CPLD registers for CF socket */ 31/* FPGA / CPLD registers for CF socket */
30#define BALLOON3_CF_STATUS_REG (BALLOON3_FPGA_VIRT + 0x00e00008) 32#define BALLOON3_CF_STATUS_REG (BALLOON3_FPGA_VIRT + 0x00e00008)
31#define BALLOON3_CF_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e00008) 33#define BALLOON3_CF_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e00008)
@@ -35,7 +37,7 @@ enum balloon3_features {
35#define BALLOON3_NAND_BASE (PXA_CS4_PHYS + 0x00e00000) 37#define BALLOON3_NAND_BASE (PXA_CS4_PHYS + 0x00e00000)
36#define BALLOON3_NAND_IO_REG (BALLOON3_FPGA_VIRT + 0x00e00000) 38#define BALLOON3_NAND_IO_REG (BALLOON3_FPGA_VIRT + 0x00e00000)
37#define BALLOON3_NAND_CONTROL2_REG (BALLOON3_FPGA_VIRT + 0x00e00010) 39#define BALLOON3_NAND_CONTROL2_REG (BALLOON3_FPGA_VIRT + 0x00e00010)
38#define BALLOON3_NAND_STAT_REG (BALLOON3_FPGA_VIRT + 0x00e00010) 40#define BALLOON3_NAND_STAT_REG (BALLOON3_FPGA_VIRT + 0x00e00014)
39#define BALLOON3_NAND_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e00014) 41#define BALLOON3_NAND_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e00014)
40 42
41/* fpga/cpld interrupt control register */ 43/* fpga/cpld interrupt control register */
@@ -174,6 +176,8 @@ enum balloon3_features {
174#define BALLOON3_CODEC_IRQ IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ) 176#define BALLOON3_CODEC_IRQ IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ)
175#define BALLOON3_S0_CD_IRQ IRQ_GPIO(BALLOON3_GPIO_S0_CD) 177#define BALLOON3_S0_CD_IRQ IRQ_GPIO(BALLOON3_GPIO_S0_CD)
176 178
179#define BALLOON3_NR_IRQS (IRQ_BOARD_START + 16)
180
177extern int balloon3_has(enum balloon3_features feature); 181extern int balloon3_has(enum balloon3_features feature);
178 182
179#endif 183#endif
diff --git a/arch/arm/mach-pxa/include/mach/colibri.h b/arch/arm/mach-pxa/include/mach/colibri.h
index 58dada11054f..cb4236e98a0f 100644
--- a/arch/arm/mach-pxa/include/mach/colibri.h
+++ b/arch/arm/mach-pxa/include/mach/colibri.h
@@ -9,14 +9,14 @@
9 */ 9 */
10 10
11enum { 11enum {
12 COLIBRI_PXA270_EVALBOARD = 0, 12 COLIBRI_EVALBOARD = 0,
13 COLIBRI_PXA270_INCOME, 13 COLIBRI_PXA270_INCOME,
14}; 14};
15 15
16#if defined(CONFIG_MACH_COLIBRI_PXA270_EVALBOARD) 16#if defined(CONFIG_MACH_COLIBRI_EVALBOARD)
17extern void colibri_pxa270_evalboard_init(void); 17extern void colibri_evalboard_init(void);
18#else 18#else
19static inline void colibri_pxa270_evalboard_init(void) {} 19static inline void colibri_evalboard_init(void) {}
20#endif 20#endif
21 21
22#if defined(CONFIG_MACH_COLIBRI_PXA270_INCOME) 22#if defined(CONFIG_MACH_COLIBRI_PXA270_INCOME)
@@ -59,5 +59,11 @@ static inline void colibri_pxa3xx_init_nand(void) {}
59#define GPIO0_COLIBRI_PXA270_SD_DETECT 0 59#define GPIO0_COLIBRI_PXA270_SD_DETECT 0
60#define GPIO113_COLIBRI_PXA270_TS_IRQ 113 60#define GPIO113_COLIBRI_PXA270_TS_IRQ 113
61 61
62/* GPIO definitions for Colibri PXA300/310 */
63#define GPIO13_COLIBRI_PXA300_SD_DETECT 13
64
65/* GPIO definitions for Colibri PXA320 */
66#define GPIO28_COLIBRI_PXA320_SD_DETECT 28
67
62#endif /* _COLIBRI_H_ */ 68#endif /* _COLIBRI_H_ */
63 69
diff --git a/arch/arm/mach-pxa/include/mach/debug-macro.S b/arch/arm/mach-pxa/include/mach/debug-macro.S
index 01cf81393fe2..7d5c75125d65 100644
--- a/arch/arm/mach-pxa/include/mach/debug-macro.S
+++ b/arch/arm/mach-pxa/include/mach/debug-macro.S
@@ -13,12 +13,10 @@
13 13
14#include "hardware.h" 14#include "hardware.h"
15 15
16 .macro addruart, rx, tmp 16 .macro addruart, rp, rv
17 mrc p15, 0, \rx, c1, c0 17 mov \rp, #0x00100000
18 tst \rx, #1 @ MMU enabled? 18 orr \rv, \rp, #io_p2v(0x40000000) @ virtual
19 moveq \rx, #0x40000000 @ physical 19 orr \rp, \rp, #0x40000000 @ physical
20 movne \rx, #io_p2v(0x40000000) @ virtual
21 orr \rx, \rx, #0x00100000
22 .endm 20 .endm
23 21
24#define UART_SHIFT 2 22#define UART_SHIFT 2
diff --git a/arch/arm/mach-pxa/include/mach/eseries-irq.h b/arch/arm/mach-pxa/include/mach/eseries-irq.h
index f2a93d5e31d3..de292b269c63 100644
--- a/arch/arm/mach-pxa/include/mach/eseries-irq.h
+++ b/arch/arm/mach-pxa/include/mach/eseries-irq.h
@@ -25,3 +25,4 @@
25#define TMIO_SD_IRQ IRQ_TMIO(1) 25#define TMIO_SD_IRQ IRQ_TMIO(1)
26#define TMIO_USB_IRQ IRQ_TMIO(2) 26#define TMIO_USB_IRQ IRQ_TMIO(2)
27 27
28#define ESERIES_NR_IRQS (IRQ_BOARD_START + 16)
diff --git a/arch/arm/mach-pxa/include/mach/gpio.h b/arch/arm/mach-pxa/include/mach/gpio.h
index b024a8b37439..c4639502efca 100644
--- a/arch/arm/mach-pxa/include/mach/gpio.h
+++ b/arch/arm/mach-pxa/include/mach/gpio.h
@@ -99,11 +99,24 @@
99#define GAFR(x) GPIO_REG(0x54 + (((x) & 0x70) >> 2)) 99#define GAFR(x) GPIO_REG(0x54 + (((x) & 0x70) >> 2))
100 100
101 101
102#define NR_BUILTIN_GPIO 128 102#define NR_BUILTIN_GPIO PXA_GPIO_IRQ_NUM
103 103
104#define gpio_to_bank(gpio) ((gpio) >> 5) 104#define gpio_to_bank(gpio) ((gpio) >> 5)
105#define gpio_to_irq(gpio) IRQ_GPIO(gpio) 105#define gpio_to_irq(gpio) IRQ_GPIO(gpio)
106#define irq_to_gpio(irq) IRQ_TO_GPIO(irq) 106
107static inline int irq_to_gpio(unsigned int irq)
108{
109 int gpio;
110
111 if (irq == IRQ_GPIO0 || irq == IRQ_GPIO1)
112 return irq - IRQ_GPIO0;
113
114 gpio = irq - PXA_GPIO_IRQ_BASE;
115 if (gpio >= 2 && gpio < NR_BUILTIN_GPIO)
116 return gpio;
117
118 return -1;
119}
107 120
108#ifdef CONFIG_CPU_PXA26x 121#ifdef CONFIG_CPU_PXA26x
109/* GPIO86/87/88/89 on PXA26x have their direction bits in GPDR2 inverted, 122/* GPIO86/87/88/89 on PXA26x have their direction bits in GPDR2 inverted,
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h
index 814f1458a06a..6957ba56025b 100644
--- a/arch/arm/mach-pxa/include/mach/hardware.h
+++ b/arch/arm/mach-pxa/include/mach/hardware.h
@@ -13,6 +13,8 @@
13#ifndef __ASM_ARCH_HARDWARE_H 13#ifndef __ASM_ARCH_HARDWARE_H
14#define __ASM_ARCH_HARDWARE_H 14#define __ASM_ARCH_HARDWARE_H
15 15
16#include <mach/addr-map.h>
17
16/* 18/*
17 * Workarounds for at least 2 errata so far require this. 19 * Workarounds for at least 2 errata so far require this.
18 * The mapping is set in mach-pxa/generic.c. 20 * The mapping is set in mach-pxa/generic.c.
@@ -193,14 +195,15 @@
193#define __cpu_is_pxa935(id) (0) 195#define __cpu_is_pxa935(id) (0)
194#endif 196#endif
195 197
196#ifdef CONFIG_CPU_PXA950 198#ifdef CONFIG_CPU_PXA955
197#define __cpu_is_pxa950(id) \ 199#define __cpu_is_pxa955(id) \
198 ({ \ 200 ({ \
199 unsigned int _id = (id) >> 4 & 0xfff; \ 201 unsigned int _id = (id) >> 4 & 0xfff; \
200 _id == 0x697; \ 202 _id == 0x581 || _id == 0xc08 \
201 }) 203 || _id == 0xb76; \
204 })
202#else 205#else
203#define __cpu_is_pxa950(id) (0) 206#define __cpu_is_pxa955(id) (0)
204#endif 207#endif
205 208
206#define cpu_is_pxa210() \ 209#define cpu_is_pxa210() \
@@ -253,16 +256,15 @@
253 __cpu_is_pxa935(read_cpuid_id()); \ 256 __cpu_is_pxa935(read_cpuid_id()); \
254 }) 257 })
255 258
256#define cpu_is_pxa950() \ 259#define cpu_is_pxa955() \
257 ({ \ 260 ({ \
258 __cpu_is_pxa950(read_cpuid_id()); \ 261 __cpu_is_pxa955(read_cpuid_id()); \
259 }) 262 })
260 263
261 264
262/* 265/*
263 * CPUID Core Generation Bit 266 * CPUID Core Generation Bit
264 * <= 0x2 for pxa21x/pxa25x/pxa26x/pxa27x 267 * <= 0x2 for pxa21x/pxa25x/pxa26x/pxa27x
265 * == 0x3 for pxa300/pxa310/pxa320
266 */ 268 */
267#if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x) 269#if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x)
268#define __cpu_is_pxa2xx(id) \ 270#define __cpu_is_pxa2xx(id) \
@@ -277,8 +279,10 @@
277#ifdef CONFIG_PXA3xx 279#ifdef CONFIG_PXA3xx
278#define __cpu_is_pxa3xx(id) \ 280#define __cpu_is_pxa3xx(id) \
279 ({ \ 281 ({ \
280 unsigned int _id = (id) >> 13 & 0x7; \ 282 __cpu_is_pxa300(id) \
281 _id == 0x3; \ 283 || __cpu_is_pxa310(id) \
284 || __cpu_is_pxa320(id) \
285 || __cpu_is_pxa93x(id); \
282 }) 286 })
283#else 287#else
284#define __cpu_is_pxa3xx(id) (0) 288#define __cpu_is_pxa3xx(id) (0)
@@ -287,13 +291,22 @@
287#if defined(CONFIG_CPU_PXA930) || defined(CONFIG_CPU_PXA935) 291#if defined(CONFIG_CPU_PXA930) || defined(CONFIG_CPU_PXA935)
288#define __cpu_is_pxa93x(id) \ 292#define __cpu_is_pxa93x(id) \
289 ({ \ 293 ({ \
290 unsigned int _id = (id) >> 4 & 0xfff; \ 294 __cpu_is_pxa930(id) \
291 _id == 0x683 || _id == 0x693; \ 295 || __cpu_is_pxa935(id); \
292 }) 296 })
293#else 297#else
294#define __cpu_is_pxa93x(id) (0) 298#define __cpu_is_pxa93x(id) (0)
295#endif 299#endif
296 300
301#ifdef CONFIG_PXA95x
302#define __cpu_is_pxa95x(id) \
303 ({ \
304 __cpu_is_pxa955(id); \
305 })
306#else
307#define __cpu_is_pxa95x(id) (0)
308#endif
309
297#define cpu_is_pxa2xx() \ 310#define cpu_is_pxa2xx() \
298 ({ \ 311 ({ \
299 __cpu_is_pxa2xx(read_cpuid_id()); \ 312 __cpu_is_pxa2xx(read_cpuid_id()); \
@@ -308,6 +321,12 @@
308 ({ \ 321 ({ \
309 __cpu_is_pxa93x(read_cpuid_id()); \ 322 __cpu_is_pxa93x(read_cpuid_id()); \
310 }) 323 })
324
325#define cpu_is_pxa95x() \
326 ({ \
327 __cpu_is_pxa95x(read_cpuid_id()); \
328 })
329
311/* 330/*
312 * return current memory and LCD clock frequency in units of 10kHz 331 * return current memory and LCD clock frequency in units of 10kHz
313 */ 332 */
diff --git a/arch/arm/mach-pxa/include/mach/hx4700.h b/arch/arm/mach-pxa/include/mach/hx4700.h
index 9eaeed1f87f1..37408449ec25 100644
--- a/arch/arm/mach-pxa/include/mach/hx4700.h
+++ b/arch/arm/mach-pxa/include/mach/hx4700.h
@@ -17,6 +17,7 @@
17 17
18#define HX4700_ASIC3_GPIO_BASE NR_BUILTIN_GPIO 18#define HX4700_ASIC3_GPIO_BASE NR_BUILTIN_GPIO
19#define HX4700_EGPIO_BASE (HX4700_ASIC3_GPIO_BASE + ASIC3_NUM_GPIOS) 19#define HX4700_EGPIO_BASE (HX4700_ASIC3_GPIO_BASE + ASIC3_NUM_GPIOS)
20#define HX4700_NR_IRQS (IRQ_BOARD_START + 70)
20 21
21/* 22/*
22 * PXA GPIOs 23 * PXA GPIOs
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
index ffc8314520f2..038402404e39 100644
--- a/arch/arm/mach-pxa/include/mach/irqs.h
+++ b/arch/arm/mach-pxa/include/mach/irqs.h
@@ -21,16 +21,14 @@
21 21
22#define PXA_IRQ(x) (PXA_ISA_IRQ_NUM + (x)) 22#define PXA_IRQ(x) (PXA_ISA_IRQ_NUM + (x))
23 23
24#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
25#define IRQ_SSP3 PXA_IRQ(0) /* SSP3 service request */ 24#define IRQ_SSP3 PXA_IRQ(0) /* SSP3 service request */
26#define IRQ_MSL PXA_IRQ(1) /* MSL Interface interrupt */ 25#define IRQ_MSL PXA_IRQ(1) /* MSL Interface interrupt */
27#define IRQ_USBH2 PXA_IRQ(2) /* USB Host interrupt 1 (OHCI) */ 26#define IRQ_USBH2 PXA_IRQ(2) /* USB Host interrupt 1 (OHCI,PXA27x) */
28#define IRQ_USBH1 PXA_IRQ(3) /* USB Host interrupt 2 (non-OHCI) */ 27#define IRQ_USBH1 PXA_IRQ(3) /* USB Host interrupt 2 (non-OHCI,PXA27x) */
29#define IRQ_KEYPAD PXA_IRQ(4) /* Key pad controller */ 28#define IRQ_KEYPAD PXA_IRQ(4) /* Key pad controller */
30#define IRQ_MEMSTK PXA_IRQ(5) /* Memory Stick interrupt */ 29#define IRQ_MEMSTK PXA_IRQ(5) /* Memory Stick interrupt (PXA27x) */
30#define IRQ_ACIPC0 PXA_IRQ(5) /* AP-CP Communication (PXA930) */
31#define IRQ_PWRI2C PXA_IRQ(6) /* Power I2C interrupt */ 31#define IRQ_PWRI2C PXA_IRQ(6) /* Power I2C interrupt */
32#endif
33
34#define IRQ_HWUART PXA_IRQ(7) /* HWUART Transmit/Receive/Error (PXA26x) */ 32#define IRQ_HWUART PXA_IRQ(7) /* HWUART Transmit/Receive/Error (PXA26x) */
35#define IRQ_OST_4_11 PXA_IRQ(7) /* OS timer 4-11 matches (PXA27x) */ 33#define IRQ_OST_4_11 PXA_IRQ(7) /* OS timer 4-11 matches (PXA27x) */
36#define IRQ_GPIO0 PXA_IRQ(8) /* GPIO0 Edge Detect */ 34#define IRQ_GPIO0 PXA_IRQ(8) /* GPIO0 Edge Detect */
@@ -38,7 +36,8 @@
38#define IRQ_GPIO_2_x PXA_IRQ(10) /* GPIO[2-x] Edge Detect */ 36#define IRQ_GPIO_2_x PXA_IRQ(10) /* GPIO[2-x] Edge Detect */
39#define IRQ_USB PXA_IRQ(11) /* USB Service */ 37#define IRQ_USB PXA_IRQ(11) /* USB Service */
40#define IRQ_PMU PXA_IRQ(12) /* Performance Monitoring Unit */ 38#define IRQ_PMU PXA_IRQ(12) /* Performance Monitoring Unit */
41#define IRQ_I2S PXA_IRQ(13) /* I2S Interrupt */ 39#define IRQ_I2S PXA_IRQ(13) /* I2S Interrupt (PXA27x) */
40#define IRQ_SSP4 PXA_IRQ(13) /* SSP4 service request (PXA3xx) */
42#define IRQ_AC97 PXA_IRQ(14) /* AC97 Interrupt */ 41#define IRQ_AC97 PXA_IRQ(14) /* AC97 Interrupt */
43#define IRQ_ASSP PXA_IRQ(15) /* Audio SSP Service Request (PXA25x) */ 42#define IRQ_ASSP PXA_IRQ(15) /* Audio SSP Service Request (PXA25x) */
44#define IRQ_USIM PXA_IRQ(15) /* Smart Card interface interrupt (PXA27x) */ 43#define IRQ_USIM PXA_IRQ(15) /* Smart Card interface interrupt (PXA27x) */
@@ -47,6 +46,7 @@
47#define IRQ_LCD PXA_IRQ(17) /* LCD Controller Service Request */ 46#define IRQ_LCD PXA_IRQ(17) /* LCD Controller Service Request */
48#define IRQ_I2C PXA_IRQ(18) /* I2C Service Request */ 47#define IRQ_I2C PXA_IRQ(18) /* I2C Service Request */
49#define IRQ_ICP PXA_IRQ(19) /* ICP Transmit/Receive/Error */ 48#define IRQ_ICP PXA_IRQ(19) /* ICP Transmit/Receive/Error */
49#define IRQ_ACIPC2 PXA_IRQ(19) /* AP-CP Communication (PXA930) */
50#define IRQ_STUART PXA_IRQ(20) /* STUART Transmit/Receive/Error */ 50#define IRQ_STUART PXA_IRQ(20) /* STUART Transmit/Receive/Error */
51#define IRQ_BTUART PXA_IRQ(21) /* BTUART Transmit/Receive/Error */ 51#define IRQ_BTUART PXA_IRQ(21) /* BTUART Transmit/Receive/Error */
52#define IRQ_FFUART PXA_IRQ(22) /* FFUART Transmit/Receive/Error*/ 52#define IRQ_FFUART PXA_IRQ(22) /* FFUART Transmit/Receive/Error*/
@@ -60,19 +60,17 @@
60#define IRQ_RTC1Hz PXA_IRQ(30) /* RTC HZ Clock Tick */ 60#define IRQ_RTC1Hz PXA_IRQ(30) /* RTC HZ Clock Tick */
61#define IRQ_RTCAlrm PXA_IRQ(31) /* RTC Alarm */ 61#define IRQ_RTCAlrm PXA_IRQ(31) /* RTC Alarm */
62 62
63#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
64#define IRQ_TPM PXA_IRQ(32) /* TPM interrupt */ 63#define IRQ_TPM PXA_IRQ(32) /* TPM interrupt */
65#define IRQ_CAMERA PXA_IRQ(33) /* Camera Interface */ 64#define IRQ_CAMERA PXA_IRQ(33) /* Camera Interface */
66#endif
67
68#ifdef CONFIG_PXA3xx
69#define IRQ_SSP4 PXA_IRQ(13) /* SSP4 service request */
70#define IRQ_CIR PXA_IRQ(34) /* Consumer IR */ 65#define IRQ_CIR PXA_IRQ(34) /* Consumer IR */
71#define IRQ_COMM_WDT PXA_IRQ(35) /* Comm WDT interrupt */ 66#define IRQ_COMM_WDT PXA_IRQ(35) /* Comm WDT interrupt */
72#define IRQ_TSI PXA_IRQ(36) /* Touch Screen Interface (PXA320) */ 67#define IRQ_TSI PXA_IRQ(36) /* Touch Screen Interface (PXA320) */
68#define IRQ_ENHROT PXA_IRQ(37) /* Enhanced Rotary (PXA930) */
73#define IRQ_USIM2 PXA_IRQ(38) /* USIM2 Controller */ 69#define IRQ_USIM2 PXA_IRQ(38) /* USIM2 Controller */
74#define IRQ_GCU PXA_IRQ(39) /* Graphics Controller */ 70#define IRQ_GCU PXA_IRQ(39) /* Graphics Controller (PXA3xx) */
71#define IRQ_ACIPC1 PXA_IRQ(40) /* AP-CP Communication (PXA930) */
75#define IRQ_MMC2 PXA_IRQ(41) /* MMC2 Controller */ 72#define IRQ_MMC2 PXA_IRQ(41) /* MMC2 Controller */
73#define IRQ_TRKBALL PXA_IRQ(43) /* Track Ball (PXA930) */
76#define IRQ_1WIRE PXA_IRQ(44) /* 1-Wire Controller */ 74#define IRQ_1WIRE PXA_IRQ(44) /* 1-Wire Controller */
77#define IRQ_NAND PXA_IRQ(45) /* NAND Controller */ 75#define IRQ_NAND PXA_IRQ(45) /* NAND Controller */
78#define IRQ_USB2 PXA_IRQ(46) /* USB 2.0 Device Controller */ 76#define IRQ_USB2 PXA_IRQ(46) /* USB 2.0 Device Controller */
@@ -80,30 +78,14 @@
80#define IRQ_WAKEUP1 PXA_IRQ(50) /* EXT_WAKEUP1 */ 78#define IRQ_WAKEUP1 PXA_IRQ(50) /* EXT_WAKEUP1 */
81#define IRQ_DMEMC PXA_IRQ(51) /* Dynamic Memory Controller */ 79#define IRQ_DMEMC PXA_IRQ(51) /* Dynamic Memory Controller */
82#define IRQ_MMC3 PXA_IRQ(55) /* MMC3 Controller (PXA310) */ 80#define IRQ_MMC3 PXA_IRQ(55) /* MMC3 Controller (PXA310) */
83#endif
84 81
85#ifdef CONFIG_CPU_PXA935
86#define IRQ_U2O PXA_IRQ(64) /* USB OTG 2.0 Controller (PXA935) */ 82#define IRQ_U2O PXA_IRQ(64) /* USB OTG 2.0 Controller (PXA935) */
87#define IRQ_U2H PXA_IRQ(65) /* USB Host 2.0 Controller (PXA935) */ 83#define IRQ_U2H PXA_IRQ(65) /* USB Host 2.0 Controller (PXA935) */
88 84#define IRQ_PXA935_MMC0 PXA_IRQ(72) /* MMC0 Controller (PXA935) */
89#define IRQ_MMC3_PXA935 PXA_IRQ(72) /* MMC3 Controller (PXA935) */ 85#define IRQ_PXA935_MMC1 PXA_IRQ(73) /* MMC1 Controller (PXA935) */
90#define IRQ_MMC4_PXA935 PXA_IRQ(73) /* MMC4 Controller (PXA935) */ 86#define IRQ_PXA935_MMC2 PXA_IRQ(74) /* MMC2 Controller (PXA935) */
91#define IRQ_MMC5_PXA935 PXA_IRQ(74) /* MMC5 Controller (PXA935) */ 87#define IRQ_PXA955_MMC3 PXA_IRQ(75) /* MMC3 Controller (PXA955) */
92
93#define IRQ_U2P PXA_IRQ(93) /* USB PHY D+/D- Lines (PXA935) */ 88#define IRQ_U2P PXA_IRQ(93) /* USB PHY D+/D- Lines (PXA935) */
94#endif
95
96#ifdef CONFIG_CPU_PXA930
97#define IRQ_ENHROT PXA_IRQ(37) /* Enhanced Rotary (PXA930) */
98#define IRQ_ACIPC0 PXA_IRQ(5)
99#define IRQ_ACIPC1 PXA_IRQ(40)
100#define IRQ_ACIPC2 PXA_IRQ(19)
101#define IRQ_TRKBALL PXA_IRQ(43) /* Track Ball */
102#endif
103
104#ifdef CONFIG_CPU_PXA950
105#define IRQ_GC500 PXA_IRQ(70) /* Graphics Controller (PXA950) */
106#endif
107 89
108#define PXA_GPIO_IRQ_BASE PXA_IRQ(96) 90#define PXA_GPIO_IRQ_BASE PXA_IRQ(96)
109#define PXA_GPIO_IRQ_NUM (192) 91#define PXA_GPIO_IRQ_NUM (192)
@@ -111,54 +93,15 @@
111#define GPIO_2_x_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x)) 93#define GPIO_2_x_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x))
112#define IRQ_GPIO(x) (((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x)) 94#define IRQ_GPIO(x) (((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x))
113 95
114#define IRQ_TO_GPIO_2_x(i) ((i) - PXA_GPIO_IRQ_BASE)
115#define IRQ_TO_GPIO(i) (((i) < IRQ_GPIO(2)) ? ((i) - IRQ_GPIO0) : IRQ_TO_GPIO_2_x(i))
116
117/* 96/*
118 * The following interrupts are for board specific purposes. Since 97 * The following interrupts are for board specific purposes. Since
119 * the kernel can only run on one machine at a time, we can re-use 98 * the kernel can only run on one machine at a time, we can re-use
120 * these. There will be 16 IRQs by default. If it is not enough, 99 * these.
121 * IRQ_BOARD_END is allowed be customized for each board, but keep 100 * By default, no board IRQ is reserved. It should be finished in
122 * the numbers within sensible limits and in descending order, so 101 * custom board since sparse IRQ is already enabled.
123 * when multiple config options are selected, the maximum will be
124 * used.
125 */ 102 */
126#define IRQ_BOARD_START (PXA_GPIO_IRQ_BASE + PXA_GPIO_IRQ_NUM) 103#define IRQ_BOARD_START (PXA_GPIO_IRQ_BASE + PXA_GPIO_IRQ_NUM)
127 104
128#if defined(CONFIG_MACH_H4700)
129#define IRQ_BOARD_END (IRQ_BOARD_START + 70)
130#elif defined(CONFIG_MACH_ZYLONITE)
131#define IRQ_BOARD_END (IRQ_BOARD_START + 32)
132#elif defined(CONFIG_PXA_EZX)
133#define IRQ_BOARD_END (IRQ_BOARD_START + 23)
134#else
135#define IRQ_BOARD_END (IRQ_BOARD_START + 16)
136#endif
137
138/*
139 * Figure out the MAX IRQ number.
140 *
141 * If we have an SA1111, the max IRQ is S1_BVD1_STSCHG+1.
142 * If we have an LoCoMo, the max IRQ is IRQ_LOCOMO_SPI_TEND+1
143 * Otherwise, we have the standard IRQs only.
144 */
145#ifdef CONFIG_SA1111
146#define NR_IRQS (IRQ_BOARD_END + 55)
147#elif defined(CONFIG_PXA_HAVE_BOARD_IRQS)
148#define NR_IRQS (IRQ_BOARD_END)
149#else
150#define NR_IRQS (IRQ_BOARD_START) 105#define NR_IRQS (IRQ_BOARD_START)
151#endif
152
153/* add IT8152 IRQs beyond BOARD_END */
154#ifdef CONFIG_PCI_HOST_ITE8152
155#define IT8152_LAST_IRQ (IRQ_BOARD_END + 40)
156
157#if NR_IRQS < (IT8152_LAST_IRQ+1)
158#undef NR_IRQS
159#define NR_IRQS (IT8152_LAST_IRQ+1)
160#endif
161
162#endif /* CONFIG_PCI_HOST_ITE8152 */
163 106
164#endif /* __ASM_MACH_IRQS_H */ 107#endif /* __ASM_MACH_IRQS_H */
diff --git a/arch/arm/mach-pxa/include/mach/littleton.h b/arch/arm/mach-pxa/include/mach/littleton.h
index 6c9b21c51322..2a5726c15e0e 100644
--- a/arch/arm/mach-pxa/include/mach/littleton.h
+++ b/arch/arm/mach-pxa/include/mach/littleton.h
@@ -10,4 +10,6 @@
10#define EXT0_GPIO_BASE (NR_BUILTIN_GPIO) 10#define EXT0_GPIO_BASE (NR_BUILTIN_GPIO)
11#define EXT0_GPIO(x) (EXT0_GPIO_BASE + (x)) 11#define EXT0_GPIO(x) (EXT0_GPIO_BASE + (x))
12 12
13#define LITTLETON_NR_IRQS (IRQ_BOARD_START + 8)
14
13#endif /* __ASM_ARCH_LITTLETON_H */ 15#endif /* __ASM_ARCH_LITTLETON_H */
diff --git a/arch/arm/mach-pxa/include/mach/lpd270.h b/arch/arm/mach-pxa/include/mach/lpd270.h
index 0e6440c81683..cd070092b6eb 100644
--- a/arch/arm/mach-pxa/include/mach/lpd270.h
+++ b/arch/arm/mach-pxa/include/mach/lpd270.h
@@ -38,5 +38,6 @@
38#define LPD270_USBC_IRQ LPD270_IRQ(2) 38#define LPD270_USBC_IRQ LPD270_IRQ(2)
39#define LPD270_ETHERNET_IRQ LPD270_IRQ(3) 39#define LPD270_ETHERNET_IRQ LPD270_IRQ(3)
40#define LPD270_AC97_IRQ LPD270_IRQ(4) 40#define LPD270_AC97_IRQ LPD270_IRQ(4)
41#define LPD270_NR_IRQS (IRQ_BOARD_START + 5)
41 42
42#endif 43#endif
diff --git a/arch/arm/mach-pxa/include/mach/lubbock.h b/arch/arm/mach-pxa/include/mach/lubbock.h
index a0d4247f08fc..2a086e8373eb 100644
--- a/arch/arm/mach-pxa/include/mach/lubbock.h
+++ b/arch/arm/mach-pxa/include/mach/lubbock.h
@@ -45,6 +45,9 @@
45#define LUBBOCK_USB_DISC_IRQ LUBBOCK_IRQ(6) /* usb disconnect */ 45#define LUBBOCK_USB_DISC_IRQ LUBBOCK_IRQ(6) /* usb disconnect */
46#define LUBBOCK_LAST_IRQ LUBBOCK_IRQ(6) 46#define LUBBOCK_LAST_IRQ LUBBOCK_IRQ(6)
47 47
48#define LUBBOCK_SA1111_IRQ_BASE (IRQ_BOARD_START + 16)
49#define LUBBOCK_NR_IRQS (IRQ_BOARD_START + 16 + 55)
50
48#ifndef __ASSEMBLY__ 51#ifndef __ASSEMBLY__
49extern void lubbock_set_misc_wr(unsigned int mask, unsigned int set); 52extern void lubbock_set_misc_wr(unsigned int mask, unsigned int set);
50#endif 53#endif
diff --git a/arch/arm/mach-pxa/include/mach/magician.h b/arch/arm/mach-pxa/include/mach/magician.h
index 20ef37d4a9a7..0a2efcf7947c 100644
--- a/arch/arm/mach-pxa/include/mach/magician.h
+++ b/arch/arm/mach-pxa/include/mach/magician.h
@@ -71,6 +71,8 @@
71#define IRQ_MAGICIAN_BT (IRQ_BOARD_START + 2) 71#define IRQ_MAGICIAN_BT (IRQ_BOARD_START + 2)
72#define IRQ_MAGICIAN_VBUS (IRQ_BOARD_START + 3) 72#define IRQ_MAGICIAN_VBUS (IRQ_BOARD_START + 3)
73 73
74#define MAGICIAN_NR_IRQS (IRQ_BOARD_START + 8)
75
74/* 76/*
75 * CPLD EGPIOs 77 * CPLD EGPIOs
76 */ 78 */
diff --git a/arch/arm/mach-pxa/include/mach/mainstone.h b/arch/arm/mach-pxa/include/mach/mainstone.h
index 86e623abd64d..4c2d11cd824d 100644
--- a/arch/arm/mach-pxa/include/mach/mainstone.h
+++ b/arch/arm/mach-pxa/include/mach/mainstone.h
@@ -134,4 +134,6 @@
134#define MAINSTONE_S1_STSCHG_IRQ MAINSTONE_IRQ(14) 134#define MAINSTONE_S1_STSCHG_IRQ MAINSTONE_IRQ(14)
135#define MAINSTONE_S1_IRQ MAINSTONE_IRQ(15) 135#define MAINSTONE_S1_IRQ MAINSTONE_IRQ(15)
136 136
137#define MAINSTONE_NR_IRQS (IRQ_BOARD_START + 16)
138
137#endif 139#endif
diff --git a/arch/arm/mach-pxa/include/mach/memory.h b/arch/arm/mach-pxa/include/mach/memory.h
index 92361a66b223..07734f37f8fd 100644
--- a/arch/arm/mach-pxa/include/mach/memory.h
+++ b/arch/arm/mach-pxa/include/mach/memory.h
@@ -15,16 +15,10 @@
15/* 15/*
16 * Physical DRAM offset. 16 * Physical DRAM offset.
17 */ 17 */
18#define PHYS_OFFSET UL(0xa0000000) 18#define PLAT_PHYS_OFFSET UL(0xa0000000)
19 19
20#if !defined(__ASSEMBLY__) && defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI) 20#if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI)
21void cmx2xx_pci_adjust_zones(unsigned long *size, unsigned long *holes); 21#define ARM_DMA_ZONE_SIZE SZ_64M
22
23#define arch_adjust_zones(size, holes) \
24 cmx2xx_pci_adjust_zones(size, holes)
25
26#define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_64M - 1)
27#define MAX_DMA_ADDRESS (PAGE_OFFSET + SZ_64M)
28#endif 22#endif
29 23
30#endif 24#endif
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa930.h b/arch/arm/mach-pxa/include/mach/mfp-pxa930.h
index 0d119d3b9221..04f7c97044f3 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa930.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa930.h
@@ -69,6 +69,7 @@
69#define nBE0_GPIO_60 MFP_CFG(nBE0, AF0) 69#define nBE0_GPIO_60 MFP_CFG(nBE0, AF0)
70#define nBE1_GPIO_61 MFP_CFG(nBE1, AF0) 70#define nBE1_GPIO_61 MFP_CFG(nBE1, AF0)
71#define RDY_GPIO_62 MFP_CFG(RDY, AF0) 71#define RDY_GPIO_62 MFP_CFG(RDY, AF0)
72#define PMIC_INT_GPIO83 MFP_CFG_LPM(PMIC_INT, AF0, PULL_HIGH)
72 73
73/* Chip Select */ 74/* Chip Select */
74#define DF_nCS0_nCS2 MFP_CFG_LPM(DF_nCS0, AF3, PULL_HIGH) 75#define DF_nCS0_nCS2 MFP_CFG_LPM(DF_nCS0, AF3, PULL_HIGH)
@@ -92,6 +93,9 @@
92#define GPIO63_CI2C_SCL MFP_CFG_LPM(GPIO63, AF4, PULL_HIGH) 93#define GPIO63_CI2C_SCL MFP_CFG_LPM(GPIO63, AF4, PULL_HIGH)
93#define GPIO64_CI2C_SDA MFP_CFG_LPM(GPIO64, AF4, PULL_HIGH) 94#define GPIO64_CI2C_SDA MFP_CFG_LPM(GPIO64, AF4, PULL_HIGH)
94 95
96#define GPIO73_CI2C_SCL MFP_CFG_LPM(GPIO73, AF1, PULL_HIGH)
97#define GPIO74_CI2C_SDA MFP_CFG_LPM(GPIO74, AF1, PULL_HIGH)
98
95#define GPIO77_CI2C_SCL MFP_CFG_LPM(GPIO77, AF2, PULL_HIGH) 99#define GPIO77_CI2C_SCL MFP_CFG_LPM(GPIO77, AF2, PULL_HIGH)
96#define GPIO78_CI2C_SDA MFP_CFG_LPM(GPIO78, AF2, PULL_HIGH) 100#define GPIO78_CI2C_SDA MFP_CFG_LPM(GPIO78, AF2, PULL_HIGH)
97 101
@@ -345,6 +349,9 @@
345#define GPIO69_UART1_CTS MFP_CFG(GPIO69, AF2) 349#define GPIO69_UART1_CTS MFP_CFG(GPIO69, AF2)
346#define GPIO70_UART1_RTS MFP_CFG(GPIO70, AF2) 350#define GPIO70_UART1_RTS MFP_CFG(GPIO70, AF2)
347 351
352#define GPIO53_UART1_TXD MFP_CFG(GPIO53, AF2)
353#define GPIO54_UART1_RXD MFP_CFG(GPIO54, AF2)
354
348/* UART2 - BTUART */ 355/* UART2 - BTUART */
349#define GPIO91_UART2_RXD MFP_CFG(GPIO91, AF1) 356#define GPIO91_UART2_RXD MFP_CFG(GPIO91, AF1)
350#define GPIO92_UART2_TXD MFP_CFG(GPIO92, AF1) 357#define GPIO92_UART2_TXD MFP_CFG(GPIO92, AF1)
diff --git a/arch/arm/mach-pxa/include/mach/palmz72.h b/arch/arm/mach-pxa/include/mach/palmz72.h
index 2bbcf70dd935..0d4700a79612 100644
--- a/arch/arm/mach-pxa/include/mach/palmz72.h
+++ b/arch/arm/mach-pxa/include/mach/palmz72.h
@@ -44,6 +44,11 @@
44#define GPIO_NR_PALMZ72_BT_POWER 17 44#define GPIO_NR_PALMZ72_BT_POWER 17
45#define GPIO_NR_PALMZ72_BT_RESET 83 45#define GPIO_NR_PALMZ72_BT_RESET 83
46 46
47/* Camera */
48#define GPIO_NR_PALMZ72_CAM_PWDN 56
49#define GPIO_NR_PALMZ72_CAM_RESET 57
50#define GPIO_NR_PALMZ72_CAM_POWER 91
51
47/** Initial values **/ 52/** Initial values **/
48 53
49/* Battery */ 54/* Battery */
diff --git a/arch/arm/mach-pxa/include/mach/pcm027.h b/arch/arm/mach-pxa/include/mach/pcm027.h
index 04083263167e..4bac588478a8 100644
--- a/arch/arm/mach-pxa/include/mach/pcm027.h
+++ b/arch/arm/mach-pxa/include/mach/pcm027.h
@@ -30,6 +30,8 @@
30#define PCM027_MMCDET_IRQ PCM027_IRQ(2) 30#define PCM027_MMCDET_IRQ PCM027_IRQ(2)
31#define PCM027_PM_5V_IRQ PCM027_IRQ(3) 31#define PCM027_PM_5V_IRQ PCM027_IRQ(3)
32 32
33#define PCM027_NR_IRQS (IRQ_BOARD_START + 32)
34
33/* I2C RTC */ 35/* I2C RTC */
34#define PCM027_RTC_IRQ_GPIO 0 36#define PCM027_RTC_IRQ_GPIO 0
35#define PCM027_RTC_IRQ IRQ_GPIO(PCM027_RTC_IRQ_GPIO) 37#define PCM027_RTC_IRQ IRQ_GPIO(PCM027_RTC_IRQ_GPIO)
diff --git a/arch/arm/mach-pxa/include/mach/pm.h b/arch/arm/mach-pxa/include/mach/pm.h
index fd8360c6839d..f15afe012995 100644
--- a/arch/arm/mach-pxa/include/mach/pm.h
+++ b/arch/arm/mach-pxa/include/mach/pm.h
@@ -22,9 +22,8 @@ struct pxa_cpu_pm_fns {
22extern struct pxa_cpu_pm_fns *pxa_cpu_pm_fns; 22extern struct pxa_cpu_pm_fns *pxa_cpu_pm_fns;
23 23
24/* sleep.S */ 24/* sleep.S */
25extern void pxa25x_cpu_suspend(unsigned int); 25extern void pxa25x_cpu_suspend(unsigned int, long);
26extern void pxa27x_cpu_suspend(unsigned int); 26extern void pxa27x_cpu_suspend(unsigned int, long);
27extern void pxa_cpu_resume(void);
28 27
29extern int pxa_pm_enter(suspend_state_t state); 28extern int pxa_pm_enter(suspend_state_t state);
30extern int pxa_pm_prepare(void); 29extern int pxa_pm_prepare(void);
diff --git a/arch/arm/mach-pxa/include/mach/poodle.h b/arch/arm/mach-pxa/include/mach/poodle.h
index 0b3e6d051c64..83d1cfd00fc9 100644
--- a/arch/arm/mach-pxa/include/mach/poodle.h
+++ b/arch/arm/mach-pxa/include/mach/poodle.h
@@ -85,6 +85,8 @@
85#define POODLE_LOCOMO_GPIO_232VCC_ON LOCOMO_GPIO(12) 85#define POODLE_LOCOMO_GPIO_232VCC_ON LOCOMO_GPIO(12)
86#define POODLE_LOCOMO_GPIO_JK_B LOCOMO_GPIO(13) 86#define POODLE_LOCOMO_GPIO_JK_B LOCOMO_GPIO(13)
87 87
88#define POODLE_NR_IRQS (IRQ_BOARD_START + 4) /* 4 for LoCoMo */
89
88extern struct platform_device poodle_locomo_device; 90extern struct platform_device poodle_locomo_device;
89 91
90#endif /* __ASM_ARCH_POODLE_H */ 92#endif /* __ASM_ARCH_POODLE_H */
diff --git a/arch/arm/mach-pxa/include/mach/pxa27x_keypad.h b/arch/arm/mach-pxa/include/mach/pxa27x_keypad.h
deleted file mode 100644
index 7b4eadc6df3a..000000000000
--- a/arch/arm/mach-pxa/include/mach/pxa27x_keypad.h
+++ /dev/null
@@ -1,59 +0,0 @@
1#ifndef __ASM_ARCH_PXA27x_KEYPAD_H
2#define __ASM_ARCH_PXA27x_KEYPAD_H
3
4#include <linux/input.h>
5#include <linux/input/matrix_keypad.h>
6
7#define MAX_MATRIX_KEY_ROWS (8)
8#define MAX_MATRIX_KEY_COLS (8)
9#define MATRIX_ROW_SHIFT (3)
10#define MAX_DIRECT_KEY_NUM (8)
11
12/* pxa3xx keypad platform specific parameters
13 *
14 * NOTE:
15 * 1. direct_key_num indicates the number of keys in the direct keypad
16 * _plus_ the number of rotary-encoder sensor inputs, this can be
17 * left as 0 if only rotary encoders are enabled, the driver will
18 * automatically calculate this
19 *
20 * 2. direct_key_map is the key code map for the direct keys, if rotary
21 * encoder(s) are enabled, direct key 0/1(2/3) will be ignored
22 *
23 * 3. rotary can be either interpreted as a relative input event (e.g.
24 * REL_WHEEL/REL_HWHEEL) or specific keys (e.g. UP/DOWN/LEFT/RIGHT)
25 *
26 * 4. matrix key and direct key will use the same debounce_interval by
27 * default, which should be sufficient in most cases
28 */
29struct pxa27x_keypad_platform_data {
30
31 /* code map for the matrix keys */
32 unsigned int matrix_key_rows;
33 unsigned int matrix_key_cols;
34 unsigned int *matrix_key_map;
35 int matrix_key_map_size;
36
37 /* direct keys */
38 int direct_key_num;
39 unsigned int direct_key_map[MAX_DIRECT_KEY_NUM];
40
41 /* rotary encoders 0 */
42 int enable_rotary0;
43 int rotary0_rel_code;
44 int rotary0_up_key;
45 int rotary0_down_key;
46
47 /* rotary encoders 1 */
48 int enable_rotary1;
49 int rotary1_rel_code;
50 int rotary1_up_key;
51 int rotary1_down_key;
52
53 /* key debounce interval */
54 unsigned int debounce_interval;
55};
56
57extern void pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info);
58
59#endif /* __ASM_ARCH_PXA27x_KEYPAD_H */
diff --git a/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h b/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h
index 4fcddd9cab76..ee6ced1cea7f 100644
--- a/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h
+++ b/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h
@@ -17,72 +17,6 @@
17#include <mach/hardware.h> 17#include <mach/hardware.h>
18 18
19/* 19/*
20 * PXA Chip selects
21 */
22
23#define PXA_CS0_PHYS 0x00000000
24#define PXA_CS1_PHYS 0x04000000
25#define PXA_CS2_PHYS 0x08000000
26#define PXA_CS3_PHYS 0x0C000000
27#define PXA_CS4_PHYS 0x10000000
28#define PXA_CS5_PHYS 0x14000000
29
30/*
31 * Memory controller
32 */
33
34#define MDCNFG __REG(0x48000000) /* SDRAM Configuration Register 0 */
35#define MDREFR __REG(0x48000004) /* SDRAM Refresh Control Register */
36#define MSC0 __REG(0x48000008) /* Static Memory Control Register 0 */
37#define MSC1 __REG(0x4800000C) /* Static Memory Control Register 1 */
38#define MSC2 __REG(0x48000010) /* Static Memory Control Register 2 */
39#define MECR __REG(0x48000014) /* Expansion Memory (PCMCIA/Compact Flash) Bus Configuration */
40#define SXLCR __REG(0x48000018) /* LCR value to be written to SDRAM-Timing Synchronous Flash */
41#define SXCNFG __REG(0x4800001C) /* Synchronous Static Memory Control Register */
42#define SXMRS __REG(0x48000024) /* MRS value to be written to Synchronous Flash or SMROM */
43#define MCMEM0 __REG(0x48000028) /* Card interface Common Memory Space Socket 0 Timing */
44#define MCMEM1 __REG(0x4800002C) /* Card interface Common Memory Space Socket 1 Timing */
45#define MCATT0 __REG(0x48000030) /* Card interface Attribute Space Socket 0 Timing Configuration */
46#define MCATT1 __REG(0x48000034) /* Card interface Attribute Space Socket 1 Timing Configuration */
47#define MCIO0 __REG(0x48000038) /* Card interface I/O Space Socket 0 Timing Configuration */
48#define MCIO1 __REG(0x4800003C) /* Card interface I/O Space Socket 1 Timing Configuration */
49#define MDMRS __REG(0x48000040) /* MRS value to be written to SDRAM */
50#define BOOT_DEF __REG(0x48000044) /* Read-Only Boot-Time Register. Contains BOOT_SEL and PKG_SEL */
51
52/*
53 * More handy macros for PCMCIA
54 *
55 * Arg is socket number
56 */
57#define MCMEM(s) __REG2(0x48000028, (s)<<2 ) /* Card interface Common Memory Space Socket s Timing */
58#define MCATT(s) __REG2(0x48000030, (s)<<2 ) /* Card interface Attribute Space Socket s Timing Configuration */
59#define MCIO(s) __REG2(0x48000038, (s)<<2 ) /* Card interface I/O Space Socket s Timing Configuration */
60
61/* MECR register defines */
62#define MECR_NOS (1 << 0) /* Number Of Sockets: 0 -> 1 sock, 1 -> 2 sock */
63#define MECR_CIT (1 << 1) /* Card Is There: 0 -> no card, 1 -> card inserted */
64
65#define MDCNFG_DE0 (1 << 0) /* SDRAM Bank 0 Enable */
66#define MDCNFG_DE1 (1 << 1) /* SDRAM Bank 1 Enable */
67#define MDCNFG_DE2 (1 << 16) /* SDRAM Bank 2 Enable */
68#define MDCNFG_DE3 (1 << 17) /* SDRAM Bank 3 Enable */
69
70#define MDREFR_K0DB4 (1 << 29) /* SDCLK0 Divide by 4 Control/Status */
71#define MDREFR_K2FREE (1 << 25) /* SDRAM Free-Running Control */
72#define MDREFR_K1FREE (1 << 24) /* SDRAM Free-Running Control */
73#define MDREFR_K0FREE (1 << 23) /* SDRAM Free-Running Control */
74#define MDREFR_SLFRSH (1 << 22) /* SDRAM Self-Refresh Control/Status */
75#define MDREFR_APD (1 << 20) /* SDRAM/SSRAM Auto-Power-Down Enable */
76#define MDREFR_K2DB2 (1 << 19) /* SDCLK2 Divide by 2 Control/Status */
77#define MDREFR_K2RUN (1 << 18) /* SDCLK2 Run Control/Status */
78#define MDREFR_K1DB2 (1 << 17) /* SDCLK1 Divide by 2 Control/Status */
79#define MDREFR_K1RUN (1 << 16) /* SDCLK1 Run Control/Status */
80#define MDREFR_E1PIN (1 << 15) /* SDCKE1 Level Control/Status */
81#define MDREFR_K0DB2 (1 << 14) /* SDCLK0 Divide by 2 Control/Status */
82#define MDREFR_K0RUN (1 << 13) /* SDCLK0 Run Control/Status */
83#define MDREFR_E0PIN (1 << 12) /* SDCKE0 Level Control/Status */
84
85/*
86 * Power Manager 20 * Power Manager
87 */ 21 */
88 22
diff --git a/arch/arm/mach-pxa/include/mach/pxa2xx_spi.h b/arch/arm/mach-pxa/include/mach/pxa2xx_spi.h
deleted file mode 100644
index b87cecd9bbdc..000000000000
--- a/arch/arm/mach-pxa/include/mach/pxa2xx_spi.h
+++ /dev/null
@@ -1,47 +0,0 @@
1/*
2 * Copyright (C) 2005 Stephen Street / StreetFire Sound Labs
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19#ifndef PXA2XX_SPI_H_
20#define PXA2XX_SPI_H_
21
22#define PXA2XX_CS_ASSERT (0x01)
23#define PXA2XX_CS_DEASSERT (0x02)
24
25/* device.platform_data for SSP controller devices */
26struct pxa2xx_spi_master {
27 u32 clock_enable;
28 u16 num_chipselect;
29 u8 enable_dma;
30};
31
32/* spi_board_info.controller_data for SPI slave devices,
33 * copied to spi_device.platform_data ... mostly for dma tuning
34 */
35struct pxa2xx_spi_chip {
36 u8 tx_threshold;
37 u8 rx_threshold;
38 u8 dma_burst_size;
39 u32 timeout;
40 u8 enable_loopback;
41 int gpio_cs;
42 void (*cs_control)(u32 command);
43};
44
45extern void pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info);
46
47#endif /*PXA2XX_SPI_H_*/
diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h b/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
index e91d63cfe811..207ecb49a61b 100644
--- a/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
+++ b/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
@@ -16,15 +16,6 @@
16#include <mach/hardware.h> 16#include <mach/hardware.h>
17 17
18/* 18/*
19 * Static Chip Selects
20 */
21
22#define PXA300_CS0_PHYS (0x00000000) /* PXA300/PXA310 _only_ */
23#define PXA300_CS1_PHYS (0x30000000) /* PXA300/PXA310 _only_ */
24#define PXA3xx_CS2_PHYS (0x10000000)
25#define PXA3xx_CS3_PHYS (0x14000000)
26
27/*
28 * Oscillator Configuration Register (OSCC) 19 * Oscillator Configuration Register (OSCC)
29 */ 20 */
30#define OSCC __REG(0x41350000) /* Oscillator Configuration Register */ 21#define OSCC __REG(0x41350000) /* Oscillator Configuration Register */
@@ -47,7 +38,7 @@
47#define PCMD(x) __REG(0x40F50110 + ((x) << 2)) 38#define PCMD(x) __REG(0x40F50110 + ((x) << 2))
48 39
49/* 40/*
50 * Slave Power Managment Unit 41 * Slave Power Management Unit
51 */ 42 */
52#define ASCR __REG(0x40f40000) /* Application Subsystem Power Status/Configuration */ 43#define ASCR __REG(0x40f40000) /* Application Subsystem Power Status/Configuration */
53#define ARSR __REG(0x40f40004) /* Application Subsystem Reset Status */ 44#define ARSR __REG(0x40f40004) /* Application Subsystem Reset Status */
diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx-u2d.h b/arch/arm/mach-pxa/include/mach/pxa3xx-u2d.h
new file mode 100644
index 000000000000..9d82cb65ea56
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/pxa3xx-u2d.h
@@ -0,0 +1,35 @@
1/*
2 * PXA3xx U2D header
3 *
4 * Copyright (C) 2010 CompuLab Ltd.
5 *
6 * Igor Grinberg <grinberg@compulab.co.il>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#ifndef __PXA310_U2D__
13#define __PXA310_U2D__
14
15#include <linux/usb/ulpi.h>
16
17struct pxa3xx_u2d_platform_data {
18
19#define ULPI_SER_6PIN (1 << 0)
20#define ULPI_SER_3PIN (1 << 1)
21 unsigned int ulpi_mode;
22
23 int (*init)(struct device *);
24 void (*exit)(struct device *);
25};
26
27
28/* Start PXA3xx U2D host */
29int pxa3xx_u2d_start_hc(struct usb_bus *host);
30/* Stop PXA3xx U2D host */
31void pxa3xx_u2d_stop_hc(struct usb_bus *host);
32
33extern void pxa3xx_set_u2d_info(struct pxa3xx_u2d_platform_data *info);
34
35#endif /* __PXA310_U2D__ */
diff --git a/arch/arm/mach-pxa/include/mach/pxafb.h b/arch/arm/mach-pxa/include/mach/pxafb.h
index 160ec83f51a6..01a45ac48114 100644
--- a/arch/arm/mach-pxa/include/mach/pxafb.h
+++ b/arch/arm/mach-pxa/include/mach/pxafb.h
@@ -154,8 +154,8 @@ struct pxafb_mach_info {
154 void (*pxafb_lcd_power)(int, struct fb_var_screeninfo *); 154 void (*pxafb_lcd_power)(int, struct fb_var_screeninfo *);
155 void (*smart_update)(struct fb_info *); 155 void (*smart_update)(struct fb_info *);
156}; 156};
157void set_pxa_fb_info(struct pxafb_mach_info *hard_pxa_fb_info); 157
158void set_pxa_fb_parent(struct device *parent_dev); 158void pxa_set_fb_info(struct device *, struct pxafb_mach_info *);
159unsigned long pxafb_get_hsync_time(struct device *dev); 159unsigned long pxafb_get_hsync_time(struct device *dev);
160 160
161extern int pxafb_smart_queue(struct fb_info *info, uint16_t *cmds, int); 161extern int pxafb_smart_queue(struct fb_info *info, uint16_t *cmds, int);
diff --git a/arch/arm/mach-pxa/include/mach/regs-intc.h b/arch/arm/mach-pxa/include/mach/regs-intc.h
index 68464ce1c1ea..662288eb6f95 100644
--- a/arch/arm/mach-pxa/include/mach/regs-intc.h
+++ b/arch/arm/mach-pxa/include/mach/regs-intc.h
@@ -27,8 +27,4 @@
27#define ICFP3 __REG(0x40D0013C) /* Interrupt Controller FIQ Pending Register 3 */ 27#define ICFP3 __REG(0x40D0013C) /* Interrupt Controller FIQ Pending Register 3 */
28#define ICPR3 __REG(0x40D00140) /* Interrupt Controller Pending Register 3 */ 28#define ICPR3 __REG(0x40D00140) /* Interrupt Controller Pending Register 3 */
29 29
30#define IPR(x) __REG(0x40D0001C + (x < 32 ? (x << 2) \
31 : (x < 64 ? (0x94 + ((x - 32) << 2)) \
32 : (0x128 + ((x - 64) << 2)))))
33
34#endif /* __ASM_MACH_REGS_INTC_H */ 30#endif /* __ASM_MACH_REGS_INTC_H */
diff --git a/arch/arm/mach-pxa/include/mach/smemc.h b/arch/arm/mach-pxa/include/mach/smemc.h
new file mode 100644
index 000000000000..654adc90c9a0
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/smemc.h
@@ -0,0 +1,74 @@
1/*
2 * Static memory controller register definitions for PXA CPUs
3 *
4 * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __SMEMC_REGS_H
12#define __SMEMC_REGS_H
13
14#define PXA2XX_SMEMC_BASE 0x48000000
15#define PXA3XX_SMEMC_BASE 0x4a000000
16#define SMEMC_VIRT 0xf6000000
17
18#define MDCNFG (SMEMC_VIRT + 0x00) /* SDRAM Configuration Register 0 */
19#define MDREFR (SMEMC_VIRT + 0x04) /* SDRAM Refresh Control Register */
20#define MSC0 (SMEMC_VIRT + 0x08) /* Static Memory Control Register 0 */
21#define MSC1 (SMEMC_VIRT + 0x0C) /* Static Memory Control Register 1 */
22#define MSC2 (SMEMC_VIRT + 0x10) /* Static Memory Control Register 2 */
23#define MECR (SMEMC_VIRT + 0x14) /* Expansion Memory (PCMCIA/Compact Flash) Bus Configuration */
24#define SXLCR (SMEMC_VIRT + 0x18) /* LCR value to be written to SDRAM-Timing Synchronous Flash */
25#define SXCNFG (SMEMC_VIRT + 0x1C) /* Synchronous Static Memory Control Register */
26#define SXMRS (SMEMC_VIRT + 0x24) /* MRS value to be written to Synchronous Flash or SMROM */
27#define MCMEM0 (SMEMC_VIRT + 0x28) /* Card interface Common Memory Space Socket 0 Timing */
28#define MCMEM1 (SMEMC_VIRT + 0x2C) /* Card interface Common Memory Space Socket 1 Timing */
29#define MCATT0 (SMEMC_VIRT + 0x30) /* Card interface Attribute Space Socket 0 Timing Configuration */
30#define MCATT1 (SMEMC_VIRT + 0x34) /* Card interface Attribute Space Socket 1 Timing Configuration */
31#define MCIO0 (SMEMC_VIRT + 0x38) /* Card interface I/O Space Socket 0 Timing Configuration */
32#define MCIO1 (SMEMC_VIRT + 0x3C) /* Card interface I/O Space Socket 1 Timing Configuration */
33#define MDMRS (SMEMC_VIRT + 0x40) /* MRS value to be written to SDRAM */
34#define BOOT_DEF (SMEMC_VIRT + 0x44) /* Read-Only Boot-Time Register. Contains BOOT_SEL and PKG_SEL */
35#define MEMCLKCFG (SMEMC_VIRT + 0x68) /* Clock Configuration */
36#define CSADRCFG0 (SMEMC_VIRT + 0x80) /* Address Configuration Register for CS0 */
37#define CSADRCFG1 (SMEMC_VIRT + 0x84) /* Address Configuration Register for CS1 */
38#define CSADRCFG2 (SMEMC_VIRT + 0x88) /* Address Configuration Register for CS2 */
39#define CSADRCFG3 (SMEMC_VIRT + 0x8C) /* Address Configuration Register for CS3 */
40
41/*
42 * More handy macros for PCMCIA
43 *
44 * Arg is socket number
45 */
46#define MCMEM(s) (SMEMC_VIRT + 0x28 + ((s)<<2)) /* Card interface Common Memory Space Socket s Timing */
47#define MCATT(s) (SMEMC_VIRT + 0x30 + ((s)<<2)) /* Card interface Attribute Space Socket s Timing Configuration */
48#define MCIO(s) (SMEMC_VIRT + 0x38 + ((s)<<2)) /* Card interface I/O Space Socket s Timing Configuration */
49
50/* MECR register defines */
51#define MECR_NOS (1 << 0) /* Number Of Sockets: 0 -> 1 sock, 1 -> 2 sock */
52#define MECR_CIT (1 << 1) /* Card Is There: 0 -> no card, 1 -> card inserted */
53
54#define MDCNFG_DE0 (1 << 0) /* SDRAM Bank 0 Enable */
55#define MDCNFG_DE1 (1 << 1) /* SDRAM Bank 1 Enable */
56#define MDCNFG_DE2 (1 << 16) /* SDRAM Bank 2 Enable */
57#define MDCNFG_DE3 (1 << 17) /* SDRAM Bank 3 Enable */
58
59#define MDREFR_K0DB4 (1 << 29) /* SDCLK0 Divide by 4 Control/Status */
60#define MDREFR_K2FREE (1 << 25) /* SDRAM Free-Running Control */
61#define MDREFR_K1FREE (1 << 24) /* SDRAM Free-Running Control */
62#define MDREFR_K0FREE (1 << 23) /* SDRAM Free-Running Control */
63#define MDREFR_SLFRSH (1 << 22) /* SDRAM Self-Refresh Control/Status */
64#define MDREFR_APD (1 << 20) /* SDRAM/SSRAM Auto-Power-Down Enable */
65#define MDREFR_K2DB2 (1 << 19) /* SDCLK2 Divide by 2 Control/Status */
66#define MDREFR_K2RUN (1 << 18) /* SDCLK2 Run Control/Status */
67#define MDREFR_K1DB2 (1 << 17) /* SDCLK1 Divide by 2 Control/Status */
68#define MDREFR_K1RUN (1 << 16) /* SDCLK1 Run Control/Status */
69#define MDREFR_E1PIN (1 << 15) /* SDCKE1 Level Control/Status */
70#define MDREFR_K0DB2 (1 << 14) /* SDCLK0 Divide by 2 Control/Status */
71#define MDREFR_K0RUN (1 << 13) /* SDCLK0 Run Control/Status */
72#define MDREFR_E0PIN (1 << 12) /* SDCKE0 Level Control/Status */
73
74#endif
diff --git a/arch/arm/mach-pxa/include/mach/tosa.h b/arch/arm/mach-pxa/include/mach/tosa.h
index 1bbd1f2e4beb..1272c4b56ceb 100644
--- a/arch/arm/mach-pxa/include/mach/tosa.h
+++ b/arch/arm/mach-pxa/include/mach/tosa.h
@@ -20,6 +20,7 @@
20/* Jacket Scoop */ 20/* Jacket Scoop */
21#define TOSA_SCOOP_PHYS (PXA_CS5_PHYS + 0x00800000) 21#define TOSA_SCOOP_PHYS (PXA_CS5_PHYS + 0x00800000)
22 22
23#define TOSA_NR_IRQS (IRQ_BOARD_START + TC6393XB_NR_IRQS)
23/* 24/*
24 * SCOOP2 internal GPIOs 25 * SCOOP2 internal GPIOs
25 */ 26 */
diff --git a/arch/arm/mach-pxa/include/mach/uncompress.h b/arch/arm/mach-pxa/include/mach/uncompress.h
index 759b851ec985..5519a34b667f 100644
--- a/arch/arm/mach-pxa/include/mach/uncompress.h
+++ b/arch/arm/mach-pxa/include/mach/uncompress.h
@@ -16,9 +16,9 @@
16#define BTUART_BASE (0x40200000) 16#define BTUART_BASE (0x40200000)
17#define STUART_BASE (0x40700000) 17#define STUART_BASE (0x40700000)
18 18
19static unsigned long uart_base; 19unsigned long uart_base;
20static unsigned int uart_shift; 20unsigned int uart_shift;
21static unsigned int uart_is_pxa; 21unsigned int uart_is_pxa;
22 22
23static inline unsigned char uart_read(int offset) 23static inline unsigned char uart_read(int offset)
24{ 24{
diff --git a/arch/arm/mach-pxa/include/mach/z2.h b/arch/arm/mach-pxa/include/mach/z2.h
index 8835c16bc82f..7b0f71ef3167 100644
--- a/arch/arm/mach-pxa/include/mach/z2.h
+++ b/arch/arm/mach-pxa/include/mach/z2.h
@@ -25,8 +25,7 @@
25#define GPIO98_ZIPITZ2_LID_BUTTON 98 25#define GPIO98_ZIPITZ2_LID_BUTTON 98
26 26
27/* Libertas GSPI8686 WiFi */ 27/* Libertas GSPI8686 WiFi */
28#define GPIO14_ZIPITZ2_WIFI_RESET 14 28#define GPIO14_ZIPITZ2_WIFI_POWER 14
29#define GPIO15_ZIPITZ2_WIFI_POWER 15
30#define GPIO24_ZIPITZ2_WIFI_CS 24 29#define GPIO24_ZIPITZ2_WIFI_CS 24
31#define GPIO36_ZIPITZ2_WIFI_IRQ 36 30#define GPIO36_ZIPITZ2_WIFI_IRQ 36
32 31
diff --git a/arch/arm/mach-pxa/include/mach/zeus.h b/arch/arm/mach-pxa/include/mach/zeus.h
index 6e119976003e..0641f31a56b7 100644
--- a/arch/arm/mach-pxa/include/mach/zeus.h
+++ b/arch/arm/mach-pxa/include/mach/zeus.h
@@ -15,6 +15,8 @@
15#ifndef _MACH_ZEUS_H 15#ifndef _MACH_ZEUS_H
16#define _MACH_ZEUS_H 16#define _MACH_ZEUS_H
17 17
18#define ZEUS_NR_IRQS (IRQ_BOARD_START + 48)
19
18/* Physical addresses */ 20/* Physical addresses */
19#define ZEUS_FLASH_PHYS PXA_CS0_PHYS 21#define ZEUS_FLASH_PHYS PXA_CS0_PHYS
20#define ZEUS_ETH0_PHYS PXA_CS1_PHYS 22#define ZEUS_ETH0_PHYS PXA_CS1_PHYS
@@ -62,7 +64,7 @@
62 64
63/* 65/*
64 * CPLD registers: 66 * CPLD registers:
65 * Only 4 registers, but spreaded over a 32MB address space. 67 * Only 4 registers, but spread over a 32MB address space.
66 * Be gentle, and remap that over 32kB... 68 * Be gentle, and remap that over 32kB...
67 */ 69 */
68 70
diff --git a/arch/arm/mach-pxa/include/mach/zylonite.h b/arch/arm/mach-pxa/include/mach/zylonite.h
index 9edf645368d6..ea24998b923c 100644
--- a/arch/arm/mach-pxa/include/mach/zylonite.h
+++ b/arch/arm/mach-pxa/include/mach/zylonite.h
@@ -5,6 +5,8 @@
5 5
6#define EXT_GPIO(x) (128 + (x)) 6#define EXT_GPIO(x) (128 + (x))
7 7
8#define ZYLONITE_NR_IRQS (IRQ_BOARD_START + 32)
9
8/* the following variables are processor specific and initialized 10/* the following variables are processor specific and initialized
9 * by the corresponding zylonite_pxa3xx_init() 11 * by the corresponding zylonite_pxa3xx_init()
10 */ 12 */
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index 1beb40f692fc..32ed551bf9c5 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -15,21 +15,32 @@
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/module.h> 16#include <linux/module.h>
17#include <linux/interrupt.h> 17#include <linux/interrupt.h>
18#include <linux/sysdev.h> 18#include <linux/syscore_ops.h>
19#include <linux/io.h>
20#include <linux/irq.h>
19 21
20#include <mach/hardware.h> 22#include <mach/hardware.h>
21#include <asm/irq.h> 23#include <mach/irqs.h>
22#include <asm/mach/irq.h>
23#include <mach/gpio.h> 24#include <mach/gpio.h>
24#include <mach/regs-intc.h>
25 25
26#include "generic.h" 26#include "generic.h"
27 27
28#define MAX_INTERNAL_IRQS 128 28#define IRQ_BASE (void __iomem *)io_p2v(0x40d00000)
29
30#define ICIP (0x000)
31#define ICMR (0x004)
32#define ICLR (0x008)
33#define ICFR (0x00c)
34#define ICPR (0x010)
35#define ICCR (0x014)
36#define ICHP (0x018)
37#define IPR(i) (((i) < 32) ? (0x01c + ((i) << 2)) : \
38 ((i) < 64) ? (0x0b0 + (((i) - 32) << 2)) : \
39 (0x144 + (((i) - 64) << 2)))
40#define IPR_VALID (1 << 31)
41#define IRQ_BIT(n) (((n) - PXA_IRQ(0)) & 0x1f)
29 42
30#define IRQ_BIT(n) (((n) - PXA_IRQ(0)) & 0x1f) 43#define MAX_INTERNAL_IRQS 128
31#define _ICMR(n) (*((((n) - PXA_IRQ(0)) & ~0x1f) ? &ICMR2 : &ICMR))
32#define _ICLR(n) (*((((n) - PXA_IRQ(0)) & ~0x1f) ? &ICLR2 : &ICLR))
33 44
34/* 45/*
35 * This is for peripheral IRQs internal to the PXA chip. 46 * This is for peripheral IRQs internal to the PXA chip.
@@ -37,29 +48,53 @@
37 48
38static int pxa_internal_irq_nr; 49static int pxa_internal_irq_nr;
39 50
40static void pxa_mask_irq(unsigned int irq) 51static inline int cpu_has_ipr(void)
52{
53 return !cpu_is_pxa25x();
54}
55
56static inline void __iomem *irq_base(int i)
57{
58 static unsigned long phys_base[] = {
59 0x40d00000,
60 0x40d0009c,
61 0x40d00130,
62 };
63
64 return (void __iomem *)io_p2v(phys_base[i]);
65}
66
67static void pxa_mask_irq(struct irq_data *d)
41{ 68{
42 _ICMR(irq) &= ~(1 << IRQ_BIT(irq)); 69 void __iomem *base = irq_data_get_irq_chip_data(d);
70 uint32_t icmr = __raw_readl(base + ICMR);
71
72 icmr &= ~(1 << IRQ_BIT(d->irq));
73 __raw_writel(icmr, base + ICMR);
43} 74}
44 75
45static void pxa_unmask_irq(unsigned int irq) 76static void pxa_unmask_irq(struct irq_data *d)
46{ 77{
47 _ICMR(irq) |= 1 << IRQ_BIT(irq); 78 void __iomem *base = irq_data_get_irq_chip_data(d);
79 uint32_t icmr = __raw_readl(base + ICMR);
80
81 icmr |= 1 << IRQ_BIT(d->irq);
82 __raw_writel(icmr, base + ICMR);
48} 83}
49 84
50static struct irq_chip pxa_internal_irq_chip = { 85static struct irq_chip pxa_internal_irq_chip = {
51 .name = "SC", 86 .name = "SC",
52 .ack = pxa_mask_irq, 87 .irq_ack = pxa_mask_irq,
53 .mask = pxa_mask_irq, 88 .irq_mask = pxa_mask_irq,
54 .unmask = pxa_unmask_irq, 89 .irq_unmask = pxa_unmask_irq,
55}; 90};
56 91
57/* 92/*
58 * GPIO IRQs for GPIO 0 and 1 93 * GPIO IRQs for GPIO 0 and 1
59 */ 94 */
60static int pxa_set_low_gpio_type(unsigned int irq, unsigned int type) 95static int pxa_set_low_gpio_type(struct irq_data *d, unsigned int type)
61{ 96{
62 int gpio = irq - IRQ_GPIO0; 97 int gpio = d->irq - IRQ_GPIO0;
63 98
64 if (__gpio_is_occupied(gpio)) { 99 if (__gpio_is_occupied(gpio)) {
65 pr_err("%s failed: GPIO is configured\n", __func__); 100 pr_err("%s failed: GPIO is configured\n", __func__);
@@ -79,27 +114,17 @@ static int pxa_set_low_gpio_type(unsigned int irq, unsigned int type)
79 return 0; 114 return 0;
80} 115}
81 116
82static void pxa_ack_low_gpio(unsigned int irq) 117static void pxa_ack_low_gpio(struct irq_data *d)
83{
84 GEDR0 = (1 << (irq - IRQ_GPIO0));
85}
86
87static void pxa_mask_low_gpio(unsigned int irq)
88{
89 ICMR &= ~(1 << (irq - PXA_IRQ(0)));
90}
91
92static void pxa_unmask_low_gpio(unsigned int irq)
93{ 118{
94 ICMR |= 1 << (irq - PXA_IRQ(0)); 119 GEDR0 = (1 << (d->irq - IRQ_GPIO0));
95} 120}
96 121
97static struct irq_chip pxa_low_gpio_chip = { 122static struct irq_chip pxa_low_gpio_chip = {
98 .name = "GPIO-l", 123 .name = "GPIO-l",
99 .ack = pxa_ack_low_gpio, 124 .irq_ack = pxa_ack_low_gpio,
100 .mask = pxa_mask_low_gpio, 125 .irq_mask = pxa_mask_irq,
101 .unmask = pxa_unmask_low_gpio, 126 .irq_unmask = pxa_unmask_irq,
102 .set_type = pxa_set_low_gpio_type, 127 .irq_set_type = pxa_set_low_gpio_type,
103}; 128};
104 129
105static void __init pxa_init_low_gpio_irq(set_wake_t fn) 130static void __init pxa_init_low_gpio_irq(set_wake_t fn)
@@ -112,43 +137,45 @@ static void __init pxa_init_low_gpio_irq(set_wake_t fn)
112 GEDR0 = 0x3; 137 GEDR0 = 0x3;
113 138
114 for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) { 139 for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) {
115 set_irq_chip(irq, &pxa_low_gpio_chip); 140 irq_set_chip_and_handler(irq, &pxa_low_gpio_chip,
116 set_irq_handler(irq, handle_edge_irq); 141 handle_edge_irq);
142 irq_set_chip_data(irq, irq_base(0));
117 set_irq_flags(irq, IRQF_VALID); 143 set_irq_flags(irq, IRQF_VALID);
118 } 144 }
119 145
120 pxa_low_gpio_chip.set_wake = fn; 146 pxa_low_gpio_chip.irq_set_wake = fn;
121} 147}
122 148
123void __init pxa_init_irq(int irq_nr, set_wake_t fn) 149void __init pxa_init_irq(int irq_nr, set_wake_t fn)
124{ 150{
125 int irq, i; 151 int irq, i, n;
126 152
127 BUG_ON(irq_nr > MAX_INTERNAL_IRQS); 153 BUG_ON(irq_nr > MAX_INTERNAL_IRQS);
128 154
129 pxa_internal_irq_nr = irq_nr; 155 pxa_internal_irq_nr = irq_nr;
130 156
131 for (irq = PXA_IRQ(0); irq < PXA_IRQ(irq_nr); irq += 32) { 157 for (n = 0; n < irq_nr; n += 32) {
132 _ICMR(irq) = 0; /* disable all IRQs */ 158 void __iomem *base = irq_base(n >> 5);
133 _ICLR(irq) = 0; /* all IRQs are IRQ, not FIQ */ 159
134 } 160 __raw_writel(0, base + ICMR); /* disable all IRQs */
135 161 __raw_writel(0, base + ICLR); /* all IRQs are IRQ, not FIQ */
136 /* initialize interrupt priority */ 162 for (i = n; (i < (n + 32)) && (i < irq_nr); i++) {
137 if (cpu_is_pxa27x() || cpu_is_pxa3xx()) { 163 /* initialize interrupt priority */
138 for (i = 0; i < irq_nr; i++) 164 if (cpu_has_ipr())
139 IPR(i) = i | (1 << 31); 165 __raw_writel(i | IPR_VALID, IRQ_BASE + IPR(i));
166
167 irq = PXA_IRQ(i);
168 irq_set_chip_and_handler(irq, &pxa_internal_irq_chip,
169 handle_level_irq);
170 irq_set_chip_data(irq, base);
171 set_irq_flags(irq, IRQF_VALID);
172 }
140 } 173 }
141 174
142 /* only unmasked interrupts kick us out of idle */ 175 /* only unmasked interrupts kick us out of idle */
143 ICCR = 1; 176 __raw_writel(1, irq_base(0) + ICCR);
144
145 for (irq = PXA_IRQ(0); irq < PXA_IRQ(irq_nr); irq++) {
146 set_irq_chip(irq, &pxa_internal_irq_chip);
147 set_irq_handler(irq, handle_level_irq);
148 set_irq_flags(irq, IRQF_VALID);
149 }
150 177
151 pxa_internal_irq_chip.set_wake = fn; 178 pxa_internal_irq_chip.irq_set_wake = fn;
152 pxa_init_low_gpio_irq(fn); 179 pxa_init_low_gpio_irq(fn);
153} 180}
154 181
@@ -156,54 +183,48 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn)
156static unsigned long saved_icmr[MAX_INTERNAL_IRQS/32]; 183static unsigned long saved_icmr[MAX_INTERNAL_IRQS/32];
157static unsigned long saved_ipr[MAX_INTERNAL_IRQS]; 184static unsigned long saved_ipr[MAX_INTERNAL_IRQS];
158 185
159static int pxa_irq_suspend(struct sys_device *dev, pm_message_t state) 186static int pxa_irq_suspend(void)
160{ 187{
161 int i, irq = PXA_IRQ(0); 188 int i;
162 189
163 for (i = 0; irq < PXA_IRQ(pxa_internal_irq_nr); i++, irq += 32) { 190 for (i = 0; i < pxa_internal_irq_nr / 32; i++) {
164 saved_icmr[i] = _ICMR(irq); 191 void __iomem *base = irq_base(i);
165 _ICMR(irq) = 0; 192
193 saved_icmr[i] = __raw_readl(base + ICMR);
194 __raw_writel(0, base + ICMR);
166 } 195 }
167 196
168 if (cpu_is_pxa27x() || cpu_is_pxa3xx()) { 197 if (cpu_has_ipr()) {
169 for (i = 0; i < pxa_internal_irq_nr; i++) 198 for (i = 0; i < pxa_internal_irq_nr; i++)
170 saved_ipr[i] = IPR(i); 199 saved_ipr[i] = __raw_readl(IRQ_BASE + IPR(i));
171 } 200 }
172 201
173 return 0; 202 return 0;
174} 203}
175 204
176static int pxa_irq_resume(struct sys_device *dev) 205static void pxa_irq_resume(void)
177{ 206{
178 int i, irq = PXA_IRQ(0); 207 int i;
179 208
180 if (cpu_is_pxa27x() || cpu_is_pxa3xx()) { 209 for (i = 0; i < pxa_internal_irq_nr / 32; i++) {
181 for (i = 0; i < pxa_internal_irq_nr; i++) 210 void __iomem *base = irq_base(i);
182 IPR(i) = saved_ipr[i];
183 }
184 211
185 for (i = 0; irq < PXA_IRQ(pxa_internal_irq_nr); i++, irq += 32) { 212 __raw_writel(saved_icmr[i], base + ICMR);
186 _ICMR(irq) = saved_icmr[i]; 213 __raw_writel(0, base + ICLR);
187 _ICLR(irq) = 0;
188 } 214 }
189 215
190 ICCR = 1; 216 if (cpu_has_ipr())
191 return 0; 217 for (i = 0; i < pxa_internal_irq_nr; i++)
218 __raw_writel(saved_ipr[i], IRQ_BASE + IPR(i));
219
220 __raw_writel(1, IRQ_BASE + ICCR);
192} 221}
193#else 222#else
194#define pxa_irq_suspend NULL 223#define pxa_irq_suspend NULL
195#define pxa_irq_resume NULL 224#define pxa_irq_resume NULL
196#endif 225#endif
197 226
198struct sysdev_class pxa_irq_sysclass = { 227struct syscore_ops pxa_irq_syscore_ops = {
199 .name = "irq",
200 .suspend = pxa_irq_suspend, 228 .suspend = pxa_irq_suspend,
201 .resume = pxa_irq_resume, 229 .resume = pxa_irq_resume,
202}; 230};
203
204static int __init pxa_irq_init(void)
205{
206 return sysdev_class_register(&pxa_irq_sysclass);
207}
208
209core_initcall(pxa_irq_init);
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
index 9b9046185b00..e5e326d2cdc9 100644
--- a/arch/arm/mach-pxa/littleton.c
+++ b/arch/arm/mach-pxa/littleton.c
@@ -22,11 +22,13 @@
22#include <linux/clk.h> 22#include <linux/clk.h>
23#include <linux/gpio.h> 23#include <linux/gpio.h>
24#include <linux/spi/spi.h> 24#include <linux/spi/spi.h>
25#include <linux/spi/pxa2xx_spi.h>
25#include <linux/smc91x.h> 26#include <linux/smc91x.h>
26#include <linux/i2c.h> 27#include <linux/i2c.h>
27#include <linux/leds.h> 28#include <linux/leds.h>
28#include <linux/mfd/da903x.h> 29#include <linux/mfd/da903x.h>
29#include <linux/i2c/max732x.h> 30#include <linux/i2c/max732x.h>
31#include <linux/i2c/pxa-i2c.h>
30 32
31#include <asm/types.h> 33#include <asm/types.h>
32#include <asm/setup.h> 34#include <asm/setup.h>
@@ -42,10 +44,8 @@
42#include <mach/pxa300.h> 44#include <mach/pxa300.h>
43#include <mach/pxafb.h> 45#include <mach/pxafb.h>
44#include <mach/mmc.h> 46#include <mach/mmc.h>
45#include <mach/pxa2xx_spi.h> 47#include <plat/pxa27x_keypad.h>
46#include <mach/pxa27x_keypad.h>
47#include <mach/littleton.h> 48#include <mach/littleton.h>
48#include <plat/i2c.h>
49#include <plat/pxa3xx_nand.h> 49#include <plat/pxa3xx_nand.h>
50 50
51#include "generic.h" 51#include "generic.h"
@@ -185,7 +185,7 @@ static struct pxafb_mach_info littleton_lcd_info = {
185 185
186static void littleton_init_lcd(void) 186static void littleton_init_lcd(void)
187{ 187{
188 set_pxa_fb_info(&littleton_lcd_info); 188 pxa_set_fb_info(NULL, &littleton_lcd_info);
189} 189}
190#else 190#else
191static inline void littleton_init_lcd(void) {}; 191static inline void littleton_init_lcd(void) {};
@@ -437,10 +437,9 @@ static void __init littleton_init(void)
437} 437}
438 438
439MACHINE_START(LITTLETON, "Marvell Form Factor Development Platform (aka Littleton)") 439MACHINE_START(LITTLETON, "Marvell Form Factor Development Platform (aka Littleton)")
440 .phys_io = 0x40000000,
441 .boot_params = 0xa0000100, 440 .boot_params = 0xa0000100,
442 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, 441 .map_io = pxa3xx_map_io,
443 .map_io = pxa_map_io, 442 .nr_irqs = LITTLETON_NR_IRQS,
444 .init_irq = pxa3xx_init_irq, 443 .init_irq = pxa3xx_init_irq,
445 .timer = &pxa_timer, 444 .timer = &pxa_timer,
446 .init_machine = littleton_init, 445 .init_machine = littleton_init,
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index d279507fc748..6cf8180bf5bd 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -15,7 +15,7 @@
15 15
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/sysdev.h> 18#include <linux/syscore_ops.h>
19#include <linux/interrupt.h> 19#include <linux/interrupt.h>
20#include <linux/sched.h> 20#include <linux/sched.h>
21#include <linux/bitops.h> 21#include <linux/bitops.h>
@@ -46,6 +46,7 @@
46#include <mach/mmc.h> 46#include <mach/mmc.h>
47#include <mach/irda.h> 47#include <mach/irda.h>
48#include <mach/ohci.h> 48#include <mach/ohci.h>
49#include <mach/smemc.h>
49 50
50#include "generic.h" 51#include "generic.h"
51#include "devices.h" 52#include "devices.h"
@@ -94,9 +95,9 @@ static unsigned long lpd270_pin_config[] __initdata = {
94 95
95static unsigned int lpd270_irq_enabled; 96static unsigned int lpd270_irq_enabled;
96 97
97static void lpd270_mask_irq(unsigned int irq) 98static void lpd270_mask_irq(struct irq_data *d)
98{ 99{
99 int lpd270_irq = irq - LPD270_IRQ(0); 100 int lpd270_irq = d->irq - LPD270_IRQ(0);
100 101
101 __raw_writew(~(1 << lpd270_irq), LPD270_INT_STATUS); 102 __raw_writew(~(1 << lpd270_irq), LPD270_INT_STATUS);
102 103
@@ -104,9 +105,9 @@ static void lpd270_mask_irq(unsigned int irq)
104 __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK); 105 __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
105} 106}
106 107
107static void lpd270_unmask_irq(unsigned int irq) 108static void lpd270_unmask_irq(struct irq_data *d)
108{ 109{
109 int lpd270_irq = irq - LPD270_IRQ(0); 110 int lpd270_irq = d->irq - LPD270_IRQ(0);
110 111
111 lpd270_irq_enabled |= 1 << lpd270_irq; 112 lpd270_irq_enabled |= 1 << lpd270_irq;
112 __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK); 113 __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
@@ -114,9 +115,9 @@ static void lpd270_unmask_irq(unsigned int irq)
114 115
115static struct irq_chip lpd270_irq_chip = { 116static struct irq_chip lpd270_irq_chip = {
116 .name = "CPLD", 117 .name = "CPLD",
117 .ack = lpd270_mask_irq, 118 .irq_ack = lpd270_mask_irq,
118 .mask = lpd270_mask_irq, 119 .irq_mask = lpd270_mask_irq,
119 .unmask = lpd270_unmask_irq, 120 .irq_unmask = lpd270_unmask_irq,
120}; 121};
121 122
122static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc) 123static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc)
@@ -125,7 +126,8 @@ static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc)
125 126
126 pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled; 127 pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled;
127 do { 128 do {
128 desc->chip->ack(irq); /* clear useless edge notification */ 129 /* clear useless edge notification */
130 desc->irq_data.chip->irq_ack(&desc->irq_data);
129 if (likely(pending)) { 131 if (likely(pending)) {
130 irq = LPD270_IRQ(0) + __ffs(pending); 132 irq = LPD270_IRQ(0) + __ffs(pending);
131 generic_handle_irq(irq); 133 generic_handle_irq(irq);
@@ -147,40 +149,32 @@ static void __init lpd270_init_irq(void)
147 149
148 /* setup extra LogicPD PXA270 irqs */ 150 /* setup extra LogicPD PXA270 irqs */
149 for (irq = LPD270_IRQ(2); irq <= LPD270_IRQ(4); irq++) { 151 for (irq = LPD270_IRQ(2); irq <= LPD270_IRQ(4); irq++) {
150 set_irq_chip(irq, &lpd270_irq_chip); 152 irq_set_chip_and_handler(irq, &lpd270_irq_chip,
151 set_irq_handler(irq, handle_level_irq); 153 handle_level_irq);
152 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 154 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
153 } 155 }
154 set_irq_chained_handler(IRQ_GPIO(0), lpd270_irq_handler); 156 irq_set_chained_handler(IRQ_GPIO(0), lpd270_irq_handler);
155 set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING); 157 irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
156} 158}
157 159
158 160
159#ifdef CONFIG_PM 161#ifdef CONFIG_PM
160static int lpd270_irq_resume(struct sys_device *dev) 162static void lpd270_irq_resume(void)
161{ 163{
162 __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK); 164 __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
163 return 0;
164} 165}
165 166
166static struct sysdev_class lpd270_irq_sysclass = { 167static struct syscore_ops lpd270_irq_syscore_ops = {
167 .name = "cpld_irq",
168 .resume = lpd270_irq_resume, 168 .resume = lpd270_irq_resume,
169}; 169};
170 170
171static struct sys_device lpd270_irq_device = {
172 .cls = &lpd270_irq_sysclass,
173};
174
175static int __init lpd270_irq_device_init(void) 171static int __init lpd270_irq_device_init(void)
176{ 172{
177 int ret = -ENODEV;
178 if (machine_is_logicpd_pxa270()) { 173 if (machine_is_logicpd_pxa270()) {
179 ret = sysdev_class_register(&lpd270_irq_sysclass); 174 register_syscore_ops(&lpd270_irq_syscore_ops);
180 if (ret == 0) 175 return 0;
181 ret = sysdev_register(&lpd270_irq_device);
182 } 176 }
183 return ret; 177 return -ENODEV;
184} 178}
185 179
186device_initcall(lpd270_irq_device_init); 180device_initcall(lpd270_irq_device_init);
@@ -463,7 +457,7 @@ static void __init lpd270_init(void)
463 pxa_set_btuart_info(NULL); 457 pxa_set_btuart_info(NULL);
464 pxa_set_stuart_info(NULL); 458 pxa_set_stuart_info(NULL);
465 459
466 lpd270_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4; 460 lpd270_flash_data[0].width = (__raw_readl(BOOT_DEF) & 1) ? 2 : 4;
467 lpd270_flash_data[1].width = 4; 461 lpd270_flash_data[1].width = 4;
468 462
469 /* 463 /*
@@ -478,7 +472,7 @@ static void __init lpd270_init(void)
478 pxa_set_ac97_info(NULL); 472 pxa_set_ac97_info(NULL);
479 473
480 if (lpd270_lcd_to_use != NULL) 474 if (lpd270_lcd_to_use != NULL)
481 set_pxa_fb_info(lpd270_lcd_to_use); 475 pxa_set_fb_info(NULL, lpd270_lcd_to_use);
482 476
483 pxa_set_ohci_info(&lpd270_ohci_platform_data); 477 pxa_set_ohci_info(&lpd270_ohci_platform_data);
484} 478}
@@ -495,7 +489,7 @@ static struct map_desc lpd270_io_desc[] __initdata = {
495 489
496static void __init lpd270_map_io(void) 490static void __init lpd270_map_io(void)
497{ 491{
498 pxa_map_io(); 492 pxa27x_map_io();
499 iotable_init(lpd270_io_desc, ARRAY_SIZE(lpd270_io_desc)); 493 iotable_init(lpd270_io_desc, ARRAY_SIZE(lpd270_io_desc));
500 494
501 /* for use I SRAM as framebuffer. */ 495 /* for use I SRAM as framebuffer. */
@@ -505,10 +499,9 @@ static void __init lpd270_map_io(void)
505 499
506MACHINE_START(LOGICPD_PXA270, "LogicPD PXA270 Card Engine") 500MACHINE_START(LOGICPD_PXA270, "LogicPD PXA270 Card Engine")
507 /* Maintainer: Peter Barada */ 501 /* Maintainer: Peter Barada */
508 .phys_io = 0x40000000,
509 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
510 .boot_params = 0xa0000100, 502 .boot_params = 0xa0000100,
511 .map_io = lpd270_map_io, 503 .map_io = lpd270_map_io,
504 .nr_irqs = LPD270_NR_IRQS,
512 .init_irq = lpd270_init_irq, 505 .init_irq = lpd270_init_irq,
513 .timer = &pxa_timer, 506 .timer = &pxa_timer,
514 .init_machine = lpd270_init, 507 .init_machine = lpd270_init,
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 330c3282856e..e10ddb827147 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -15,7 +15,7 @@
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/sysdev.h> 18#include <linux/syscore_ops.h>
19#include <linux/major.h> 19#include <linux/major.h>
20#include <linux/fb.h> 20#include <linux/fb.h>
21#include <linux/interrupt.h> 21#include <linux/interrupt.h>
@@ -25,7 +25,7 @@
25 25
26#include <linux/spi/spi.h> 26#include <linux/spi/spi.h>
27#include <linux/spi/ads7846.h> 27#include <linux/spi/ads7846.h>
28#include <mach/pxa2xx_spi.h> 28#include <linux/spi/pxa2xx_spi.h>
29 29
30#include <asm/setup.h> 30#include <asm/setup.h>
31#include <asm/memory.h> 31#include <asm/memory.h>
@@ -50,6 +50,7 @@
50#include <mach/pxafb.h> 50#include <mach/pxafb.h>
51#include <mach/mmc.h> 51#include <mach/mmc.h>
52#include <mach/pm.h> 52#include <mach/pm.h>
53#include <mach/smemc.h>
53 54
54#include "generic.h" 55#include "generic.h"
55#include "clock.h" 56#include "clock.h"
@@ -121,15 +122,15 @@ EXPORT_SYMBOL(lubbock_set_misc_wr);
121 122
122static unsigned long lubbock_irq_enabled; 123static unsigned long lubbock_irq_enabled;
123 124
124static void lubbock_mask_irq(unsigned int irq) 125static void lubbock_mask_irq(struct irq_data *d)
125{ 126{
126 int lubbock_irq = (irq - LUBBOCK_IRQ(0)); 127 int lubbock_irq = (d->irq - LUBBOCK_IRQ(0));
127 LUB_IRQ_MASK_EN = (lubbock_irq_enabled &= ~(1 << lubbock_irq)); 128 LUB_IRQ_MASK_EN = (lubbock_irq_enabled &= ~(1 << lubbock_irq));
128} 129}
129 130
130static void lubbock_unmask_irq(unsigned int irq) 131static void lubbock_unmask_irq(struct irq_data *d)
131{ 132{
132 int lubbock_irq = (irq - LUBBOCK_IRQ(0)); 133 int lubbock_irq = (d->irq - LUBBOCK_IRQ(0));
133 /* the irq can be acknowledged only if deasserted, so it's done here */ 134 /* the irq can be acknowledged only if deasserted, so it's done here */
134 LUB_IRQ_SET_CLR &= ~(1 << lubbock_irq); 135 LUB_IRQ_SET_CLR &= ~(1 << lubbock_irq);
135 LUB_IRQ_MASK_EN = (lubbock_irq_enabled |= (1 << lubbock_irq)); 136 LUB_IRQ_MASK_EN = (lubbock_irq_enabled |= (1 << lubbock_irq));
@@ -137,16 +138,17 @@ static void lubbock_unmask_irq(unsigned int irq)
137 138
138static struct irq_chip lubbock_irq_chip = { 139static struct irq_chip lubbock_irq_chip = {
139 .name = "FPGA", 140 .name = "FPGA",
140 .ack = lubbock_mask_irq, 141 .irq_ack = lubbock_mask_irq,
141 .mask = lubbock_mask_irq, 142 .irq_mask = lubbock_mask_irq,
142 .unmask = lubbock_unmask_irq, 143 .irq_unmask = lubbock_unmask_irq,
143}; 144};
144 145
145static void lubbock_irq_handler(unsigned int irq, struct irq_desc *desc) 146static void lubbock_irq_handler(unsigned int irq, struct irq_desc *desc)
146{ 147{
147 unsigned long pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled; 148 unsigned long pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled;
148 do { 149 do {
149 desc->chip->ack(irq); /* clear our parent irq */ 150 /* clear our parent irq */
151 desc->irq_data.chip->irq_ack(&desc->irq_data);
150 if (likely(pending)) { 152 if (likely(pending)) {
151 irq = LUBBOCK_IRQ(0) + __ffs(pending); 153 irq = LUBBOCK_IRQ(0) + __ffs(pending);
152 generic_handle_irq(irq); 154 generic_handle_irq(irq);
@@ -163,42 +165,33 @@ static void __init lubbock_init_irq(void)
163 165
164 /* setup extra lubbock irqs */ 166 /* setup extra lubbock irqs */
165 for (irq = LUBBOCK_IRQ(0); irq <= LUBBOCK_LAST_IRQ; irq++) { 167 for (irq = LUBBOCK_IRQ(0); irq <= LUBBOCK_LAST_IRQ; irq++) {
166 set_irq_chip(irq, &lubbock_irq_chip); 168 irq_set_chip_and_handler(irq, &lubbock_irq_chip,
167 set_irq_handler(irq, handle_level_irq); 169 handle_level_irq);
168 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 170 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
169 } 171 }
170 172
171 set_irq_chained_handler(IRQ_GPIO(0), lubbock_irq_handler); 173 irq_set_chained_handler(IRQ_GPIO(0), lubbock_irq_handler);
172 set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING); 174 irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
173} 175}
174 176
175#ifdef CONFIG_PM 177#ifdef CONFIG_PM
176 178
177static int lubbock_irq_resume(struct sys_device *dev) 179static void lubbock_irq_resume(void)
178{ 180{
179 LUB_IRQ_MASK_EN = lubbock_irq_enabled; 181 LUB_IRQ_MASK_EN = lubbock_irq_enabled;
180 return 0;
181} 182}
182 183
183static struct sysdev_class lubbock_irq_sysclass = { 184static struct syscore_ops lubbock_irq_syscore_ops = {
184 .name = "cpld_irq",
185 .resume = lubbock_irq_resume, 185 .resume = lubbock_irq_resume,
186}; 186};
187 187
188static struct sys_device lubbock_irq_device = {
189 .cls = &lubbock_irq_sysclass,
190};
191
192static int __init lubbock_irq_device_init(void) 188static int __init lubbock_irq_device_init(void)
193{ 189{
194 int ret = -ENODEV;
195
196 if (machine_is_lubbock()) { 190 if (machine_is_lubbock()) {
197 ret = sysdev_class_register(&lubbock_irq_sysclass); 191 register_syscore_ops(&lubbock_irq_syscore_ops);
198 if (ret == 0) 192 return 0;
199 ret = sysdev_register(&lubbock_irq_device);
200 } 193 }
201 return ret; 194 return -ENODEV;
202} 195}
203 196
204device_initcall(lubbock_irq_device_init); 197device_initcall(lubbock_irq_device_init);
@@ -229,7 +222,7 @@ static struct resource sa1111_resources[] = {
229}; 222};
230 223
231static struct sa1111_platform_data sa1111_info = { 224static struct sa1111_platform_data sa1111_info = {
232 .irq_base = IRQ_BOARD_END, 225 .irq_base = LUBBOCK_SA1111_IRQ_BASE,
233}; 226};
234 227
235static struct platform_device sa1111_device = { 228static struct platform_device sa1111_device = {
@@ -519,13 +512,13 @@ static void __init lubbock_init(void)
519 512
520 clk_add_alias("SA1111_CLK", NULL, "GPIO11_CLK", NULL); 513 clk_add_alias("SA1111_CLK", NULL, "GPIO11_CLK", NULL);
521 pxa_set_udc_info(&udc_info); 514 pxa_set_udc_info(&udc_info);
522 set_pxa_fb_info(&sharp_lm8v31); 515 pxa_set_fb_info(NULL, &sharp_lm8v31);
523 pxa_set_mci_info(&lubbock_mci_platform_data); 516 pxa_set_mci_info(&lubbock_mci_platform_data);
524 pxa_set_ficp_info(&lubbock_ficp_platform_data); 517 pxa_set_ficp_info(&lubbock_ficp_platform_data);
525 pxa_set_ac97_info(NULL); 518 pxa_set_ac97_info(NULL);
526 519
527 lubbock_flash_data[0].width = lubbock_flash_data[1].width = 520 lubbock_flash_data[0].width = lubbock_flash_data[1].width =
528 (BOOT_DEF & 1) ? 2 : 4; 521 (__raw_readl(BOOT_DEF) & 1) ? 2 : 4;
529 /* Compensate for the nROMBT switch which swaps the flash banks */ 522 /* Compensate for the nROMBT switch which swaps the flash banks */
530 printk(KERN_NOTICE "Lubbock configured to boot from %s (bank %d)\n", 523 printk(KERN_NOTICE "Lubbock configured to boot from %s (bank %d)\n",
531 flashboot?"Flash":"ROM", flashboot); 524 flashboot?"Flash":"ROM", flashboot);
@@ -549,7 +542,7 @@ static struct map_desc lubbock_io_desc[] __initdata = {
549 542
550static void __init lubbock_map_io(void) 543static void __init lubbock_map_io(void)
551{ 544{
552 pxa_map_io(); 545 pxa25x_map_io();
553 iotable_init(lubbock_io_desc, ARRAY_SIZE(lubbock_io_desc)); 546 iotable_init(lubbock_io_desc, ARRAY_SIZE(lubbock_io_desc));
554 547
555 PCFR |= PCFR_OPDE; 548 PCFR |= PCFR_OPDE;
@@ -557,9 +550,8 @@ static void __init lubbock_map_io(void)
557 550
558MACHINE_START(LUBBOCK, "Intel DBPXA250 Development Platform (aka Lubbock)") 551MACHINE_START(LUBBOCK, "Intel DBPXA250 Development Platform (aka Lubbock)")
559 /* Maintainer: MontaVista Software Inc. */ 552 /* Maintainer: MontaVista Software Inc. */
560 .phys_io = 0x40000000,
561 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
562 .map_io = lubbock_map_io, 553 .map_io = lubbock_map_io,
554 .nr_irqs = LUBBOCK_NR_IRQS,
563 .init_irq = lubbock_init_irq, 555 .init_irq = lubbock_init_irq,
564 .timer = &pxa_timer, 556 .timer = &pxa_timer,
565 .init_machine = lubbock_init, 557 .init_machine = lubbock_init,
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index e81dd0c8e40d..e1920572948a 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -28,6 +28,7 @@
28#include <linux/regulator/bq24022.h> 28#include <linux/regulator/bq24022.h>
29#include <linux/regulator/machine.h> 29#include <linux/regulator/machine.h>
30#include <linux/usb/gpio_vbus.h> 30#include <linux/usb/gpio_vbus.h>
31#include <linux/i2c/pxa-i2c.h>
31 32
32#include <mach/hardware.h> 33#include <mach/hardware.h>
33#include <asm/mach-types.h> 34#include <asm/mach-types.h>
@@ -36,7 +37,6 @@
36#include <mach/pxa27x.h> 37#include <mach/pxa27x.h>
37#include <mach/magician.h> 38#include <mach/magician.h>
38#include <mach/pxafb.h> 39#include <mach/pxafb.h>
39#include <plat/i2c.h>
40#include <mach/mmc.h> 40#include <mach/mmc.h>
41#include <mach/irda.h> 41#include <mach/irda.h>
42#include <mach/ohci.h> 42#include <mach/ohci.h>
@@ -599,7 +599,7 @@ static struct regulator_consumer_supply bq24022_consumers[] = {
599static struct regulator_init_data bq24022_init_data = { 599static struct regulator_init_data bq24022_init_data = {
600 .constraints = { 600 .constraints = {
601 .max_uA = 500000, 601 .max_uA = 500000,
602 .valid_ops_mask = REGULATOR_CHANGE_CURRENT, 602 .valid_ops_mask = REGULATOR_CHANGE_CURRENT | REGULATOR_CHANGE_STATUS,
603 }, 603 },
604 .num_consumer_supplies = ARRAY_SIZE(bq24022_consumers), 604 .num_consumer_supplies = ARRAY_SIZE(bq24022_consumers),
605 .consumer_supplies = bq24022_consumers, 605 .consumer_supplies = bq24022_consumers,
@@ -662,7 +662,7 @@ static struct pxaohci_platform_data magician_ohci_info = {
662 * StrataFlash 662 * StrataFlash
663 */ 663 */
664 664
665static void magician_set_vpp(struct map_info *map, int vpp) 665static void magician_set_vpp(struct platform_device *pdev, int vpp)
666{ 666{
667 gpio_set_value(EGPIO_MAGICIAN_FLASH_VPP, vpp); 667 gpio_set_value(EGPIO_MAGICIAN_FLASH_VPP, vpp);
668} 668}
@@ -757,17 +757,16 @@ static void __init magician_init(void)
757 gpio_direction_output(GPIO104_MAGICIAN_LCD_POWER_1, 0); 757 gpio_direction_output(GPIO104_MAGICIAN_LCD_POWER_1, 0);
758 gpio_direction_output(GPIO105_MAGICIAN_LCD_POWER_2, 0); 758 gpio_direction_output(GPIO105_MAGICIAN_LCD_POWER_2, 0);
759 gpio_direction_output(GPIO106_MAGICIAN_LCD_POWER_3, 0); 759 gpio_direction_output(GPIO106_MAGICIAN_LCD_POWER_3, 0);
760 set_pxa_fb_info(lcd_select ? &samsung_info : &toppoly_info); 760 pxa_set_fb_info(NULL, lcd_select ? &samsung_info : &toppoly_info);
761 } else 761 } else
762 pr_err("LCD detection: CPLD mapping failed\n"); 762 pr_err("LCD detection: CPLD mapping failed\n");
763} 763}
764 764
765 765
766MACHINE_START(MAGICIAN, "HTC Magician") 766MACHINE_START(MAGICIAN, "HTC Magician")
767 .phys_io = 0x40000000,
768 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
769 .boot_params = 0xa0000100, 767 .boot_params = 0xa0000100,
770 .map_io = pxa_map_io, 768 .map_io = pxa27x_map_io,
769 .nr_irqs = MAGICIAN_NR_IRQS,
771 .init_irq = pxa27x_init_irq, 770 .init_irq = pxa27x_init_irq,
772 .init_machine = magician_init, 771 .init_machine = magician_init,
773 .timer = &pxa_timer, 772 .timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index 5543c64da9ef..3479e2b3b511 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -15,7 +15,7 @@
15 15
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/sysdev.h> 18#include <linux/syscore_ops.h>
19#include <linux/interrupt.h> 19#include <linux/interrupt.h>
20#include <linux/sched.h> 20#include <linux/sched.h>
21#include <linux/bitops.h> 21#include <linux/bitops.h>
@@ -27,6 +27,7 @@
27#include <linux/gpio_keys.h> 27#include <linux/gpio_keys.h>
28#include <linux/pwm_backlight.h> 28#include <linux/pwm_backlight.h>
29#include <linux/smc91x.h> 29#include <linux/smc91x.h>
30#include <linux/i2c/pxa-i2c.h>
30 31
31#include <asm/types.h> 32#include <asm/types.h>
32#include <asm/setup.h> 33#include <asm/setup.h>
@@ -46,11 +47,11 @@
46#include <mach/mainstone.h> 47#include <mach/mainstone.h>
47#include <mach/audio.h> 48#include <mach/audio.h>
48#include <mach/pxafb.h> 49#include <mach/pxafb.h>
49#include <plat/i2c.h>
50#include <mach/mmc.h> 50#include <mach/mmc.h>
51#include <mach/irda.h> 51#include <mach/irda.h>
52#include <mach/ohci.h> 52#include <mach/ohci.h>
53#include <mach/pxa27x_keypad.h> 53#include <plat/pxa27x_keypad.h>
54#include <mach/smemc.h>
54 55
55#include "generic.h" 56#include "generic.h"
56#include "devices.h" 57#include "devices.h"
@@ -122,15 +123,15 @@ static unsigned long mainstone_pin_config[] = {
122 123
123static unsigned long mainstone_irq_enabled; 124static unsigned long mainstone_irq_enabled;
124 125
125static void mainstone_mask_irq(unsigned int irq) 126static void mainstone_mask_irq(struct irq_data *d)
126{ 127{
127 int mainstone_irq = (irq - MAINSTONE_IRQ(0)); 128 int mainstone_irq = (d->irq - MAINSTONE_IRQ(0));
128 MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq)); 129 MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq));
129} 130}
130 131
131static void mainstone_unmask_irq(unsigned int irq) 132static void mainstone_unmask_irq(struct irq_data *d)
132{ 133{
133 int mainstone_irq = (irq - MAINSTONE_IRQ(0)); 134 int mainstone_irq = (d->irq - MAINSTONE_IRQ(0));
134 /* the irq can be acknowledged only if deasserted, so it's done here */ 135 /* the irq can be acknowledged only if deasserted, so it's done here */
135 MST_INTSETCLR &= ~(1 << mainstone_irq); 136 MST_INTSETCLR &= ~(1 << mainstone_irq);
136 MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq)); 137 MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq));
@@ -138,16 +139,17 @@ static void mainstone_unmask_irq(unsigned int irq)
138 139
139static struct irq_chip mainstone_irq_chip = { 140static struct irq_chip mainstone_irq_chip = {
140 .name = "FPGA", 141 .name = "FPGA",
141 .ack = mainstone_mask_irq, 142 .irq_ack = mainstone_mask_irq,
142 .mask = mainstone_mask_irq, 143 .irq_mask = mainstone_mask_irq,
143 .unmask = mainstone_unmask_irq, 144 .irq_unmask = mainstone_unmask_irq,
144}; 145};
145 146
146static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc) 147static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc)
147{ 148{
148 unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled; 149 unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
149 do { 150 do {
150 desc->chip->ack(irq); /* clear useless edge notification */ 151 /* clear useless edge notification */
152 desc->irq_data.chip->irq_ack(&desc->irq_data);
151 if (likely(pending)) { 153 if (likely(pending)) {
152 irq = MAINSTONE_IRQ(0) + __ffs(pending); 154 irq = MAINSTONE_IRQ(0) + __ffs(pending);
153 generic_handle_irq(irq); 155 generic_handle_irq(irq);
@@ -164,8 +166,8 @@ static void __init mainstone_init_irq(void)
164 166
165 /* setup extra Mainstone irqs */ 167 /* setup extra Mainstone irqs */
166 for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) { 168 for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) {
167 set_irq_chip(irq, &mainstone_irq_chip); 169 irq_set_chip_and_handler(irq, &mainstone_irq_chip,
168 set_irq_handler(irq, handle_level_irq); 170 handle_level_irq);
169 if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14)) 171 if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14))
170 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN); 172 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN);
171 else 173 else
@@ -177,37 +179,27 @@ static void __init mainstone_init_irq(void)
177 MST_INTMSKENA = 0; 179 MST_INTMSKENA = 0;
178 MST_INTSETCLR = 0; 180 MST_INTSETCLR = 0;
179 181
180 set_irq_chained_handler(IRQ_GPIO(0), mainstone_irq_handler); 182 irq_set_chained_handler(IRQ_GPIO(0), mainstone_irq_handler);
181 set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING); 183 irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
182} 184}
183 185
184#ifdef CONFIG_PM 186#ifdef CONFIG_PM
185 187
186static int mainstone_irq_resume(struct sys_device *dev) 188static void mainstone_irq_resume(void)
187{ 189{
188 MST_INTMSKENA = mainstone_irq_enabled; 190 MST_INTMSKENA = mainstone_irq_enabled;
189 return 0;
190} 191}
191 192
192static struct sysdev_class mainstone_irq_sysclass = { 193static struct syscore_ops mainstone_irq_syscore_ops = {
193 .name = "cpld_irq",
194 .resume = mainstone_irq_resume, 194 .resume = mainstone_irq_resume,
195}; 195};
196 196
197static struct sys_device mainstone_irq_device = {
198 .cls = &mainstone_irq_sysclass,
199};
200
201static int __init mainstone_irq_device_init(void) 197static int __init mainstone_irq_device_init(void)
202{ 198{
203 int ret = -ENODEV; 199 if (machine_is_mainstone())
200 register_syscore_ops(&mainstone_irq_syscore_ops);
204 201
205 if (machine_is_mainstone()) { 202 return 0;
206 ret = sysdev_class_register(&mainstone_irq_sysclass);
207 if (ret == 0)
208 ret = sysdev_register(&mainstone_irq_device);
209 }
210 return ret;
211} 203}
212 204
213device_initcall(mainstone_irq_device_init); 205device_initcall(mainstone_irq_device_init);
@@ -565,7 +557,7 @@ static void __init mainstone_init(void)
565 pxa_set_btuart_info(NULL); 557 pxa_set_btuart_info(NULL);
566 pxa_set_stuart_info(NULL); 558 pxa_set_stuart_info(NULL);
567 559
568 mst_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4; 560 mst_flash_data[0].width = (__raw_readl(BOOT_DEF) & 1) ? 2 : 4;
569 mst_flash_data[1].width = 4; 561 mst_flash_data[1].width = 4;
570 562
571 /* Compensate for SW7 which swaps the flash banks */ 563 /* Compensate for SW7 which swaps the flash banks */
@@ -590,7 +582,7 @@ static void __init mainstone_init(void)
590 else 582 else
591 mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode; 583 mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode;
592 584
593 set_pxa_fb_info(&mainstone_pxafb_info); 585 pxa_set_fb_info(NULL, &mainstone_pxafb_info);
594 mainstone_backlight_register(); 586 mainstone_backlight_register();
595 587
596 pxa_set_mci_info(&mainstone_mci_platform_data); 588 pxa_set_mci_info(&mainstone_mci_platform_data);
@@ -614,7 +606,7 @@ static struct map_desc mainstone_io_desc[] __initdata = {
614 606
615static void __init mainstone_map_io(void) 607static void __init mainstone_map_io(void)
616{ 608{
617 pxa_map_io(); 609 pxa27x_map_io();
618 iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc)); 610 iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc));
619 611
620 /* for use I SRAM as framebuffer. */ 612 /* for use I SRAM as framebuffer. */
@@ -624,10 +616,9 @@ static void __init mainstone_map_io(void)
624 616
625MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)") 617MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
626 /* Maintainer: MontaVista Software Inc. */ 618 /* Maintainer: MontaVista Software Inc. */
627 .phys_io = 0x40000000,
628 .boot_params = 0xa0000100, /* BLOB boot parameter setting */ 619 .boot_params = 0xa0000100, /* BLOB boot parameter setting */
629 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
630 .map_io = mainstone_map_io, 620 .map_io = mainstone_map_io,
621 .nr_irqs = MAINSTONE_NR_IRQS,
631 .init_irq = mainstone_init_irq, 622 .init_irq = mainstone_init_irq,
632 .timer = &pxa_timer, 623 .timer = &pxa_timer,
633 .init_machine = mainstone_init, 624 .init_machine = mainstone_init,
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index 1d1419b73457..b27544bcafcb 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -16,7 +16,7 @@
16#include <linux/module.h> 16#include <linux/module.h>
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/sysdev.h> 19#include <linux/syscore_ops.h>
20 20
21#include <mach/gpio.h> 21#include <mach/gpio.h>
22#include <mach/pxa2xx-regs.h> 22#include <mach/pxa2xx-regs.h>
@@ -338,7 +338,7 @@ static unsigned long saved_gafr[2][4];
338static unsigned long saved_gpdr[4]; 338static unsigned long saved_gpdr[4];
339static unsigned long saved_pgsr[4]; 339static unsigned long saved_pgsr[4];
340 340
341static int pxa2xx_mfp_suspend(struct sys_device *d, pm_message_t state) 341static int pxa2xx_mfp_suspend(void)
342{ 342{
343 int i; 343 int i;
344 344
@@ -347,9 +347,9 @@ static int pxa2xx_mfp_suspend(struct sys_device *d, pm_message_t state)
347 if ((gpio_desc[i].config & MFP_LPM_KEEP_OUTPUT) && 347 if ((gpio_desc[i].config & MFP_LPM_KEEP_OUTPUT) &&
348 (GPDR(i) & GPIO_bit(i))) { 348 (GPDR(i) & GPIO_bit(i))) {
349 if (GPLR(i) & GPIO_bit(i)) 349 if (GPLR(i) & GPIO_bit(i))
350 PGSR(i) |= GPIO_bit(i); 350 PGSR(gpio_to_bank(i)) |= GPIO_bit(i);
351 else 351 else
352 PGSR(i) &= ~GPIO_bit(i); 352 PGSR(gpio_to_bank(i)) &= ~GPIO_bit(i);
353 } 353 }
354 } 354 }
355 355
@@ -365,7 +365,7 @@ static int pxa2xx_mfp_suspend(struct sys_device *d, pm_message_t state)
365 return 0; 365 return 0;
366} 366}
367 367
368static int pxa2xx_mfp_resume(struct sys_device *d) 368static void pxa2xx_mfp_resume(void)
369{ 369{
370 int i; 370 int i;
371 371
@@ -376,15 +376,13 @@ static int pxa2xx_mfp_resume(struct sys_device *d)
376 PGSR(i) = saved_pgsr[i]; 376 PGSR(i) = saved_pgsr[i];
377 } 377 }
378 PSSR = PSSR_RDH | PSSR_PH; 378 PSSR = PSSR_RDH | PSSR_PH;
379 return 0;
380} 379}
381#else 380#else
382#define pxa2xx_mfp_suspend NULL 381#define pxa2xx_mfp_suspend NULL
383#define pxa2xx_mfp_resume NULL 382#define pxa2xx_mfp_resume NULL
384#endif 383#endif
385 384
386struct sysdev_class pxa2xx_mfp_sysclass = { 385struct syscore_ops pxa2xx_mfp_syscore_ops = {
387 .name = "mfp",
388 .suspend = pxa2xx_mfp_suspend, 386 .suspend = pxa2xx_mfp_suspend,
389 .resume = pxa2xx_mfp_resume, 387 .resume = pxa2xx_mfp_resume,
390}; 388};
@@ -409,6 +407,6 @@ static int __init pxa2xx_mfp_init(void)
409 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) 407 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++)
410 gpdr_lpm[i] = GPDR(i * 32); 408 gpdr_lpm[i] = GPDR(i * 32);
411 409
412 return sysdev_class_register(&pxa2xx_mfp_sysclass); 410 return 0;
413} 411}
414postcore_initcall(pxa2xx_mfp_init); 412postcore_initcall(pxa2xx_mfp_init);
diff --git a/arch/arm/mach-pxa/mfp-pxa3xx.c b/arch/arm/mach-pxa/mfp-pxa3xx.c
index 7a270eecd480..89863a01ecd7 100644
--- a/arch/arm/mach-pxa/mfp-pxa3xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa3xx.c
@@ -17,7 +17,7 @@
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/io.h> 19#include <linux/io.h>
20#include <linux/sysdev.h> 20#include <linux/syscore_ops.h>
21 21
22#include <mach/hardware.h> 22#include <mach/hardware.h>
23#include <mach/mfp-pxa3xx.h> 23#include <mach/mfp-pxa3xx.h>
@@ -31,13 +31,13 @@
31 * a pull-down mode if they're an active low chip select, and we're 31 * a pull-down mode if they're an active low chip select, and we're
32 * just entering standby. 32 * just entering standby.
33 */ 33 */
34static int pxa3xx_mfp_suspend(struct sys_device *d, pm_message_t state) 34static int pxa3xx_mfp_suspend(void)
35{ 35{
36 mfp_config_lpm(); 36 mfp_config_lpm();
37 return 0; 37 return 0;
38} 38}
39 39
40static int pxa3xx_mfp_resume(struct sys_device *d) 40static void pxa3xx_mfp_resume(void)
41{ 41{
42 mfp_config_run(); 42 mfp_config_run();
43 43
@@ -47,24 +47,13 @@ static int pxa3xx_mfp_resume(struct sys_device *d)
47 * preserve them here in case they will be referenced later 47 * preserve them here in case they will be referenced later
48 */ 48 */
49 ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S); 49 ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S);
50 return 0;
51} 50}
52#else 51#else
53#define pxa3xx_mfp_suspend NULL 52#define pxa3xx_mfp_suspend NULL
54#define pxa3xx_mfp_resume NULL 53#define pxa3xx_mfp_resume NULL
55#endif 54#endif
56 55
57struct sysdev_class pxa3xx_mfp_sysclass = { 56struct syscore_ops pxa3xx_mfp_syscore_ops = {
58 .name = "mfp",
59 .suspend = pxa3xx_mfp_suspend, 57 .suspend = pxa3xx_mfp_suspend,
60 .resume = pxa3xx_mfp_resume, 58 .resume = pxa3xx_mfp_resume,
61}; 59};
62
63static int __init mfp_init_devicefs(void)
64{
65 if (cpu_is_pxa3xx())
66 return sysdev_class_register(&pxa3xx_mfp_sysclass);
67
68 return 0;
69}
70postcore_initcall(mfp_init_devicefs);
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index dc66942ef9ab..e3470137c934 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -22,7 +22,7 @@
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/platform_device.h> 24#include <linux/platform_device.h>
25#include <linux/sysdev.h> 25#include <linux/syscore_ops.h>
26#include <linux/input.h> 26#include <linux/input.h>
27#include <linux/delay.h> 27#include <linux/delay.h>
28#include <linux/gpio_keys.h> 28#include <linux/gpio_keys.h>
@@ -39,18 +39,18 @@
39#include <linux/usb/gpio_vbus.h> 39#include <linux/usb/gpio_vbus.h>
40#include <linux/regulator/max1586.h> 40#include <linux/regulator/max1586.h>
41#include <linux/slab.h> 41#include <linux/slab.h>
42#include <linux/i2c/pxa-i2c.h>
42 43
43#include <asm/mach-types.h> 44#include <asm/mach-types.h>
44#include <asm/mach/arch.h> 45#include <asm/mach/arch.h>
45 46
46#include <mach/pxa27x.h> 47#include <mach/pxa27x.h>
47#include <mach/regs-rtc.h> 48#include <mach/regs-rtc.h>
48#include <mach/pxa27x_keypad.h> 49#include <plat/pxa27x_keypad.h>
49#include <mach/pxafb.h> 50#include <mach/pxafb.h>
50#include <mach/mmc.h> 51#include <mach/mmc.h>
51#include <mach/udc.h> 52#include <mach/udc.h>
52#include <mach/pxa27x-udc.h> 53#include <mach/pxa27x-udc.h>
53#include <plat/i2c.h>
54#include <mach/camera.h> 54#include <mach/camera.h>
55#include <mach/audio.h> 55#include <mach/audio.h>
56#include <media/soc_camera.h> 56#include <media/soc_camera.h>
@@ -458,7 +458,7 @@ static struct platform_device strataflash = {
458/* 458/*
459 * Suspend/Resume bootstrap management 459 * Suspend/Resume bootstrap management
460 * 460 *
461 * MIO A701 reboot sequence is highly ROM dependant. From the one dissassembled, 461 * MIO A701 reboot sequence is highly ROM dependent. From the one dissassembled,
462 * this sequence is as follows : 462 * this sequence is as follows :
463 * - disables interrupts 463 * - disables interrupts
464 * - initialize SDRAM (self refresh RAM into active RAM) 464 * - initialize SDRAM (self refresh RAM into active RAM)
@@ -488,7 +488,7 @@ static void install_bootstrap(void)
488} 488}
489 489
490 490
491static int mioa701_sys_suspend(struct sys_device *sysdev, pm_message_t state) 491static int mioa701_sys_suspend(void)
492{ 492{
493 int i = 0, is_bt_on; 493 int i = 0, is_bt_on;
494 u32 *mem_resume_vector = phys_to_virt(RESUME_VECTOR_ADDR); 494 u32 *mem_resume_vector = phys_to_virt(RESUME_VECTOR_ADDR);
@@ -514,7 +514,7 @@ static int mioa701_sys_suspend(struct sys_device *sysdev, pm_message_t state)
514 return 0; 514 return 0;
515} 515}
516 516
517static int mioa701_sys_resume(struct sys_device *sysdev) 517static void mioa701_sys_resume(void)
518{ 518{
519 int i = 0; 519 int i = 0;
520 u32 *mem_resume_vector = phys_to_virt(RESUME_VECTOR_ADDR); 520 u32 *mem_resume_vector = phys_to_virt(RESUME_VECTOR_ADDR);
@@ -527,43 +527,18 @@ static int mioa701_sys_resume(struct sys_device *sysdev)
527 *mem_resume_enabler = save_buffer[i++]; 527 *mem_resume_enabler = save_buffer[i++];
528 *mem_resume_bt = save_buffer[i++]; 528 *mem_resume_bt = save_buffer[i++];
529 *mem_resume_unknown = save_buffer[i++]; 529 *mem_resume_unknown = save_buffer[i++];
530
531 return 0;
532} 530}
533 531
534static struct sysdev_class mioa701_sysclass = { 532static struct syscore_ops mioa701_syscore_ops = {
535 .name = "mioa701", 533 .suspend = mioa701_sys_suspend,
536}; 534 .resume = mioa701_sys_resume,
537
538static struct sys_device sysdev_bootstrap = {
539 .cls = &mioa701_sysclass,
540};
541
542static struct sysdev_driver driver_bootstrap = {
543 .suspend = &mioa701_sys_suspend,
544 .resume = &mioa701_sys_resume,
545}; 535};
546 536
547static int __init bootstrap_init(void) 537static int __init bootstrap_init(void)
548{ 538{
549 int rc;
550 int save_size = mioa701_bootstrap_lg + (sizeof(u32) * 3); 539 int save_size = mioa701_bootstrap_lg + (sizeof(u32) * 3);
551 540
552 rc = sysdev_class_register(&mioa701_sysclass); 541 register_syscore_ops(&mioa701_syscore_ops);
553 if (rc) {
554 printk(KERN_ERR "Failed registering mioa701 sys class\n");
555 return -ENODEV;
556 }
557 rc = sysdev_register(&sysdev_bootstrap);
558 if (rc) {
559 printk(KERN_ERR "Failed registering mioa701 sys device\n");
560 return -ENODEV;
561 }
562 rc = sysdev_driver_register(&mioa701_sysclass, &driver_bootstrap);
563 if (rc) {
564 printk(KERN_ERR "Failed registering PMU sys driver\n");
565 return -ENODEV;
566 }
567 542
568 save_buffer = kmalloc(save_size, GFP_KERNEL); 543 save_buffer = kmalloc(save_size, GFP_KERNEL);
569 if (!save_buffer) 544 if (!save_buffer)
@@ -576,9 +551,7 @@ static int __init bootstrap_init(void)
576static void bootstrap_exit(void) 551static void bootstrap_exit(void)
577{ 552{
578 kfree(save_buffer); 553 kfree(save_buffer);
579 sysdev_driver_unregister(&mioa701_sysclass, &driver_bootstrap); 554 unregister_syscore_ops(&mioa701_syscore_ops);
580 sysdev_unregister(&sysdev_bootstrap);
581 sysdev_class_unregister(&mioa701_sysclass);
582 555
583 printk(KERN_CRIT "Unregistering mioa701 suspend will hang next" 556 printk(KERN_CRIT "Unregistering mioa701 suspend will hang next"
584 "resume !!!\n"); 557 "resume !!!\n");
@@ -711,7 +684,6 @@ static struct soc_camera_link iclink = {
711 .bus_id = 0, /* Match id in pxa27x_device_camera in device.c */ 684 .bus_id = 0, /* Match id in pxa27x_device_camera in device.c */
712 .board_info = &mioa701_i2c_devices[0], 685 .board_info = &mioa701_i2c_devices[0],
713 .i2c_adapter_id = 0, 686 .i2c_adapter_id = 0,
714 .module_name = "mt9m111",
715}; 687};
716 688
717struct i2c_pxa_platform_data i2c_pdata = { 689struct i2c_pxa_platform_data i2c_pdata = {
@@ -796,7 +768,7 @@ static void __init mioa701_machine_init(void)
796 pxa_set_stuart_info(NULL); 768 pxa_set_stuart_info(NULL);
797 mio_gpio_request(ARRAY_AND_SIZE(global_gpios)); 769 mio_gpio_request(ARRAY_AND_SIZE(global_gpios));
798 bootstrap_init(); 770 bootstrap_init();
799 set_pxa_fb_info(&mioa701_pxafb_info); 771 pxa_set_fb_info(NULL, &mioa701_pxafb_info);
800 pxa_set_mci_info(&mioa701_mci_info); 772 pxa_set_mci_info(&mioa701_mci_info);
801 pxa_set_keypad_info(&mioa701_keypad_info); 773 pxa_set_keypad_info(&mioa701_keypad_info);
802 pxa_set_udc_info(&mioa701_udc_info); 774 pxa_set_udc_info(&mioa701_udc_info);
@@ -819,10 +791,8 @@ static void mioa701_machine_exit(void)
819} 791}
820 792
821MACHINE_START(MIOA701, "MIO A701") 793MACHINE_START(MIOA701, "MIO A701")
822 .phys_io = 0x40000000,
823 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
824 .boot_params = 0xa0000100, 794 .boot_params = 0xa0000100,
825 .map_io = &pxa_map_io, 795 .map_io = &pxa27x_map_io,
826 .init_irq = &pxa27x_init_irq, 796 .init_irq = &pxa27x_init_irq,
827 .init_machine = mioa701_machine_init, 797 .init_machine = mioa701_machine_init,
828 .timer = &pxa_timer, 798 .timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/mp900.c b/arch/arm/mach-pxa/mp900.c
index 6d4503927a76..59cce78aebd1 100644
--- a/arch/arm/mach-pxa/mp900.c
+++ b/arch/arm/mach-pxa/mp900.c
@@ -92,11 +92,9 @@ static void __init mp900c_init(void)
92 92
93/* Maintainer - Michael Petchkovsky <mkpetch@internode.on.net> */ 93/* Maintainer - Michael Petchkovsky <mkpetch@internode.on.net> */
94MACHINE_START(NEC_MP900, "MobilePro900/C") 94MACHINE_START(NEC_MP900, "MobilePro900/C")
95 .phys_io = 0x40000000,
96 .boot_params = 0xa0220100, 95 .boot_params = 0xa0220100,
97 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
98 .timer = &pxa_timer, 96 .timer = &pxa_timer,
99 .map_io = pxa_map_io, 97 .map_io = pxa25x_map_io,
100 .init_irq = pxa25x_init_irq, 98 .init_irq = pxa25x_init_irq,
101 .init_machine = mp900c_init, 99 .init_machine = mp900c_init,
102MACHINE_END 100MACHINE_END
diff --git a/arch/arm/mach-pxa/mxm8x10.c b/arch/arm/mach-pxa/mxm8x10.c
index 462167ac05f9..b5a8fd3fce04 100644
--- a/arch/arm/mach-pxa/mxm8x10.c
+++ b/arch/arm/mach-pxa/mxm8x10.c
@@ -22,8 +22,8 @@
22#include <linux/serial_8250.h> 22#include <linux/serial_8250.h>
23#include <linux/dm9000.h> 23#include <linux/dm9000.h>
24#include <linux/gpio.h> 24#include <linux/gpio.h>
25#include <linux/i2c/pxa-i2c.h>
25 26
26#include <plat/i2c.h>
27#include <plat/pxa3xx_nand.h> 27#include <plat/pxa3xx_nand.h>
28 28
29#include <mach/pxafb.h> 29#include <mach/pxafb.h>
@@ -337,7 +337,7 @@ void __init mxm_8x10_mmc_init(void)
337} 337}
338#endif 338#endif
339 339
340/* USB Open Host Controler Interface */ 340/* USB Open Host Controller Interface */
341static struct pxaohci_platform_data mxm_8x10_ohci_platform_data = { 341static struct pxaohci_platform_data mxm_8x10_ohci_platform_data = {
342 .port_mode = PMM_NPS_MODE, 342 .port_mode = PMM_NPS_MODE,
343 .flags = ENABLE_PORT_ALL 343 .flags = ENABLE_PORT_ALL
diff --git a/arch/arm/mach-pxa/palm27x.c b/arch/arm/mach-pxa/palm27x.c
index 405b92a29793..325c245c0a0d 100644
--- a/arch/arm/mach-pxa/palm27x.c
+++ b/arch/arm/mach-pxa/palm27x.c
@@ -1,8 +1,7 @@
1/* 1/*
2 * Common code for Palm LD, T5, TX, Z72 2 * Common code for Palm LD, T5, TX, Z72
3 * 3 *
4 * Copyright (C) 2010 4 * Copyright (C) 2010-2011 Marek Vasut <marek.vasut@gmail.com>
5 * Marek Vasut <marek.vasut@gmail.com>
6 * 5 *
7 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
@@ -22,6 +21,7 @@
22#include <linux/power_supply.h> 21#include <linux/power_supply.h>
23#include <linux/usb/gpio_vbus.h> 22#include <linux/usb/gpio_vbus.h>
24#include <linux/regulator/max1586.h> 23#include <linux/regulator/max1586.h>
24#include <linux/i2c/pxa-i2c.h>
25 25
26#include <asm/mach-types.h> 26#include <asm/mach-types.h>
27#include <asm/mach/arch.h> 27#include <asm/mach/arch.h>
@@ -36,8 +36,6 @@
36#include <mach/palmasoc.h> 36#include <mach/palmasoc.h>
37#include <mach/palm27x.h> 37#include <mach/palm27x.h>
38 38
39#include <plat/i2c.h>
40
41#include "generic.h" 39#include "generic.h"
42#include "devices.h" 40#include "devices.h"
43 41
@@ -159,7 +157,7 @@ void __init palm27x_lcd_init(int power, struct pxafb_mode_info *mode)
159 palm27x_lcd_screen.pxafb_lcd_power = palm27x_lcd_ctl; 157 palm27x_lcd_screen.pxafb_lcd_power = palm27x_lcd_ctl;
160 } 158 }
161 159
162 set_pxa_fb_info(&palm27x_lcd_screen); 160 pxa_set_fb_info(NULL, &palm27x_lcd_screen);
163} 161}
164#endif 162#endif
165 163
@@ -323,7 +321,7 @@ static struct platform_pwm_backlight_data palm27x_backlight_data = {
323 .pwm_id = 0, 321 .pwm_id = 0,
324 .max_brightness = 0xfe, 322 .max_brightness = 0xfe,
325 .dft_brightness = 0x7e, 323 .dft_brightness = 0x7e,
326 .pwm_period_ns = 3500, 324 .pwm_period_ns = 3500 * 1024,
327 .init = palm27x_backlight_init, 325 .init = palm27x_backlight_init,
328 .notify = palm27x_backlight_notify, 326 .notify = palm27x_backlight_notify,
329 .exit = palm27x_backlight_exit, 327 .exit = palm27x_backlight_exit,
diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c
index 91038eeafe44..4061ecddee70 100644
--- a/arch/arm/mach-pxa/palmld.c
+++ b/arch/arm/mach-pxa/palmld.c
@@ -24,7 +24,6 @@
24#include <linux/gpio.h> 24#include <linux/gpio.h>
25#include <linux/wm97xx.h> 25#include <linux/wm97xx.h>
26#include <linux/power_supply.h> 26#include <linux/power_supply.h>
27#include <linux/sysdev.h>
28#include <linux/mtd/mtd.h> 27#include <linux/mtd/mtd.h>
29#include <linux/mtd/partitions.h> 28#include <linux/mtd/partitions.h>
30#include <linux/mtd/physmap.h> 29#include <linux/mtd/physmap.h>
@@ -39,7 +38,7 @@
39#include <mach/mmc.h> 38#include <mach/mmc.h>
40#include <mach/pxafb.h> 39#include <mach/pxafb.h>
41#include <mach/irda.h> 40#include <mach/irda.h>
42#include <mach/pxa27x_keypad.h> 41#include <plat/pxa27x_keypad.h>
43#include <mach/palmasoc.h> 42#include <mach/palmasoc.h>
44#include <mach/palm27x.h> 43#include <mach/palm27x.h>
45 44
@@ -313,7 +312,7 @@ static struct map_desc palmld_io_desc[] __initdata = {
313 312
314static void __init palmld_map_io(void) 313static void __init palmld_map_io(void)
315{ 314{
316 pxa_map_io(); 315 pxa27x_map_io();
317 iotable_init(palmld_io_desc, ARRAY_SIZE(palmld_io_desc)); 316 iotable_init(palmld_io_desc, ARRAY_SIZE(palmld_io_desc));
318} 317}
319 318
@@ -343,8 +342,6 @@ static void __init palmld_init(void)
343} 342}
344 343
345MACHINE_START(PALMLD, "Palm LifeDrive") 344MACHINE_START(PALMLD, "Palm LifeDrive")
346 .phys_io = PALMLD_PHYS_IO_START,
347 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
348 .boot_params = 0xa0000100, 345 .boot_params = 0xa0000100,
349 .map_io = palmld_map_io, 346 .map_io = palmld_map_io,
350 .init_irq = pxa27x_init_irq, 347 .init_irq = pxa27x_init_irq,
diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c
index 1c281995f658..df4d7d009fbb 100644
--- a/arch/arm/mach-pxa/palmt5.c
+++ b/arch/arm/mach-pxa/palmt5.c
@@ -39,7 +39,7 @@
39#include <mach/mmc.h> 39#include <mach/mmc.h>
40#include <mach/pxafb.h> 40#include <mach/pxafb.h>
41#include <mach/irda.h> 41#include <mach/irda.h>
42#include <mach/pxa27x_keypad.h> 42#include <plat/pxa27x_keypad.h>
43#include <mach/udc.h> 43#include <mach/udc.h>
44#include <mach/palmasoc.h> 44#include <mach/palmasoc.h>
45#include <mach/palm27x.h> 45#include <mach/palm27x.h>
@@ -202,10 +202,8 @@ static void __init palmt5_init(void)
202} 202}
203 203
204MACHINE_START(PALMT5, "Palm Tungsten|T5") 204MACHINE_START(PALMT5, "Palm Tungsten|T5")
205 .phys_io = PALMT5_PHYS_IO_START,
206 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
207 .boot_params = 0xa0000100, 205 .boot_params = 0xa0000100,
208 .map_io = pxa_map_io, 206 .map_io = pxa27x_map_io,
209 .reserve = palmt5_reserve, 207 .reserve = palmt5_reserve,
210 .init_irq = pxa27x_init_irq, 208 .init_irq = pxa27x_init_irq,
211 .timer = &pxa_timer, 209 .timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c
index ce1104d1bc17..fb06bd047272 100644
--- a/arch/arm/mach-pxa/palmtc.c
+++ b/arch/arm/mach-pxa/palmtc.c
@@ -25,6 +25,7 @@
25#include <linux/power_supply.h> 25#include <linux/power_supply.h>
26#include <linux/gpio_keys.h> 26#include <linux/gpio_keys.h>
27#include <linux/mtd/physmap.h> 27#include <linux/mtd/physmap.h>
28#include <linux/usb/gpio_vbus.h>
28 29
29#include <asm/mach-types.h> 30#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
@@ -116,6 +117,7 @@ static unsigned long palmtc_pin_config[] __initdata = {
116/****************************************************************************** 117/******************************************************************************
117 * SD/MMC card controller 118 * SD/MMC card controller
118 ******************************************************************************/ 119 ******************************************************************************/
120#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
119static struct pxamci_platform_data palmtc_mci_platform_data = { 121static struct pxamci_platform_data palmtc_mci_platform_data = {
120 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, 122 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
121 .gpio_power = GPIO_NR_PALMTC_SD_POWER, 123 .gpio_power = GPIO_NR_PALMTC_SD_POWER,
@@ -124,9 +126,18 @@ static struct pxamci_platform_data palmtc_mci_platform_data = {
124 .detect_delay_ms = 200, 126 .detect_delay_ms = 200,
125}; 127};
126 128
129static void __init palmtc_mmc_init(void)
130{
131 pxa_set_mci_info(&palmtc_mci_platform_data);
132}
133#else
134static inline void palmtc_mmc_init(void) {}
135#endif
136
127/****************************************************************************** 137/******************************************************************************
128 * GPIO keys 138 * GPIO keys
129 ******************************************************************************/ 139 ******************************************************************************/
140#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
130static struct gpio_keys_button palmtc_pxa_buttons[] = { 141static struct gpio_keys_button palmtc_pxa_buttons[] = {
131 {KEY_F8, GPIO_NR_PALMTC_HOTSYNC_BUTTON, 1, "HotSync Button", EV_KEY, 1}, 142 {KEY_F8, GPIO_NR_PALMTC_HOTSYNC_BUTTON, 1, "HotSync Button", EV_KEY, 1},
132}; 143};
@@ -144,9 +155,18 @@ static struct platform_device palmtc_pxa_keys = {
144 }, 155 },
145}; 156};
146 157
158static void __init palmtc_keys_init(void)
159{
160 platform_device_register(&palmtc_pxa_keys);
161}
162#else
163static inline void palmtc_keys_init(void) {}
164#endif
165
147/****************************************************************************** 166/******************************************************************************
148 * Backlight 167 * Backlight
149 ******************************************************************************/ 168 ******************************************************************************/
169#if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM_MODULE)
150static int palmtc_backlight_init(struct device *dev) 170static int palmtc_backlight_init(struct device *dev)
151{ 171{
152 int ret; 172 int ret;
@@ -196,17 +216,35 @@ static struct platform_device palmtc_backlight = {
196 }, 216 },
197}; 217};
198 218
219static void __init palmtc_pwm_init(void)
220{
221 platform_device_register(&palmtc_backlight);
222}
223#else
224static inline void palmtc_pwm_init(void) {}
225#endif
226
199/****************************************************************************** 227/******************************************************************************
200 * IrDA 228 * IrDA
201 ******************************************************************************/ 229 ******************************************************************************/
230#if defined(CONFIG_IRDA) || defined(CONFIG_IRDA_MODULE)
202static struct pxaficp_platform_data palmtc_ficp_platform_data = { 231static struct pxaficp_platform_data palmtc_ficp_platform_data = {
203 .gpio_pwdown = GPIO_NR_PALMTC_IR_DISABLE, 232 .gpio_pwdown = GPIO_NR_PALMTC_IR_DISABLE,
204 .transceiver_cap = IR_SIRMODE | IR_OFF, 233 .transceiver_cap = IR_SIRMODE | IR_OFF,
205}; 234};
206 235
236static void __init palmtc_irda_init(void)
237{
238 pxa_set_ficp_info(&palmtc_ficp_platform_data);
239}
240#else
241static inline void palmtc_irda_init(void) {}
242#endif
243
207/****************************************************************************** 244/******************************************************************************
208 * Keyboard 245 * Keyboard
209 ******************************************************************************/ 246 ******************************************************************************/
247#if defined(CONFIG_KEYBOARD_MATRIX) || defined(CONFIG_KEYBOARD_MATRIX_MODULE)
210static const uint32_t palmtc_matrix_keys[] = { 248static const uint32_t palmtc_matrix_keys[] = {
211 KEY(0, 0, KEY_F1), 249 KEY(0, 0, KEY_F1),
212 KEY(0, 1, KEY_X), 250 KEY(0, 1, KEY_X),
@@ -290,27 +328,103 @@ static struct platform_device palmtc_keyboard = {
290 .platform_data = &palmtc_keypad_platform_data, 328 .platform_data = &palmtc_keypad_platform_data,
291 }, 329 },
292}; 330};
331static void __init palmtc_mkp_init(void)
332{
333 platform_device_register(&palmtc_keyboard);
334}
335#else
336static inline void palmtc_mkp_init(void) {}
337#endif
293 338
294/****************************************************************************** 339/******************************************************************************
295 * UDC 340 * UDC
296 ******************************************************************************/ 341 ******************************************************************************/
297static struct pxa2xx_udc_mach_info palmtc_udc_info __initdata = { 342#if defined(CONFIG_USB_GADGET_PXA25X)||defined(CONFIG_USB_GADGET_PXA25X_MODULE)
343static struct gpio_vbus_mach_info palmtc_udc_info = {
298 .gpio_vbus = GPIO_NR_PALMTC_USB_DETECT_N, 344 .gpio_vbus = GPIO_NR_PALMTC_USB_DETECT_N,
299 .gpio_vbus_inverted = 1, 345 .gpio_vbus_inverted = 1,
300 .gpio_pullup = GPIO_NR_PALMTC_USB_POWER, 346 .gpio_pullup = GPIO_NR_PALMTC_USB_POWER,
301}; 347};
302 348
349static struct platform_device palmtc_gpio_vbus = {
350 .name = "gpio-vbus",
351 .id = -1,
352 .dev = {
353 .platform_data = &palmtc_udc_info,
354 },
355};
356
357static void __init palmtc_udc_init(void)
358{
359 platform_device_register(&palmtc_gpio_vbus);
360};
361#else
362static inline void palmtc_udc_init(void) {}
363#endif
364
303/****************************************************************************** 365/******************************************************************************
304 * Touchscreen / Battery / GPIO-extender 366 * Touchscreen / Battery / GPIO-extender
305 ******************************************************************************/ 367 ******************************************************************************/
306static struct platform_device palmtc_ucb1400_core = { 368#if defined(CONFIG_TOUCHSCREEN_UCB1400) || \
369 defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
370static struct platform_device palmtc_ucb1400_device = {
307 .name = "ucb1400_core", 371 .name = "ucb1400_core",
308 .id = -1, 372 .id = -1,
309}; 373};
310 374
375static void __init palmtc_ts_init(void)
376{
377 pxa_set_ac97_info(NULL);
378 platform_device_register(&palmtc_ucb1400_device);
379}
380#else
381static inline void palmtc_ts_init(void) {}
382#endif
383
384/******************************************************************************
385 * LEDs
386 ******************************************************************************/
387#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
388struct gpio_led palmtc_gpio_leds[] = {
389{
390 .name = "palmtc:green:user",
391 .default_trigger = "none",
392 .gpio = GPIO_NR_PALMTC_LED_POWER,
393 .active_low = 1,
394}, {
395 .name = "palmtc:vibra:vibra",
396 .default_trigger = "none",
397 .gpio = GPIO_NR_PALMTC_VIBRA_POWER,
398 .active_low = 1,
399}
400
401};
402
403static struct gpio_led_platform_data palmtc_gpio_led_info = {
404 .leds = palmtc_gpio_leds,
405 .num_leds = ARRAY_SIZE(palmtc_gpio_leds),
406};
407
408static struct platform_device palmtc_leds = {
409 .name = "leds-gpio",
410 .id = -1,
411 .dev = {
412 .platform_data = &palmtc_gpio_led_info,
413 }
414};
415
416static void __init palmtc_leds_init(void)
417{
418 platform_device_register(&palmtc_leds);
419}
420#else
421static inline void palmtc_leds_init(void) {}
422#endif
423
311/****************************************************************************** 424/******************************************************************************
312 * NOR Flash 425 * NOR Flash
313 ******************************************************************************/ 426 ******************************************************************************/
427#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
314static struct resource palmtc_flash_resource = { 428static struct resource palmtc_flash_resource = {
315 .start = PXA_CS0_PHYS, 429 .start = PXA_CS0_PHYS,
316 .end = PXA_CS0_PHYS + SZ_16M - 1, 430 .end = PXA_CS0_PHYS + SZ_16M - 1,
@@ -356,24 +470,33 @@ static struct platform_device palmtc_flash = {
356 }, 470 },
357}; 471};
358 472
473static void __init palmtc_nor_init(void)
474{
475 platform_device_register(&palmtc_flash);
476}
477#else
478static inline void palmtc_nor_init(void) {}
479#endif
480
359/****************************************************************************** 481/******************************************************************************
360 * Framebuffer 482 * Framebuffer
361 ******************************************************************************/ 483 ******************************************************************************/
484#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
362static struct pxafb_mode_info palmtc_lcd_modes[] = { 485static struct pxafb_mode_info palmtc_lcd_modes[] = {
363{ 486 {
364 .pixclock = 115384, 487 .pixclock = 115384,
365 .xres = 320, 488 .xres = 320,
366 .yres = 320, 489 .yres = 320,
367 .bpp = 16, 490 .bpp = 16,
368 491
369 .left_margin = 27, 492 .left_margin = 27,
370 .right_margin = 7, 493 .right_margin = 7,
371 .upper_margin = 7, 494 .upper_margin = 7,
372 .lower_margin = 8, 495 .lower_margin = 8,
373 496
374 .hsync_len = 6, 497 .hsync_len = 6,
375 .vsync_len = 1, 498 .vsync_len = 1,
376}, 499 },
377}; 500};
378 501
379static struct pxafb_mach_info palmtc_lcd_screen = { 502static struct pxafb_mach_info palmtc_lcd_screen = {
@@ -382,17 +505,17 @@ static struct pxafb_mach_info palmtc_lcd_screen = {
382 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, 505 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
383}; 506};
384 507
508static void __init palmtc_lcd_init(void)
509{
510 pxa_set_fb_info(NULL, &palmtc_lcd_screen);
511}
512#else
513static inline void palmtc_lcd_init(void) {}
514#endif
515
385/****************************************************************************** 516/******************************************************************************
386 * Machine init 517 * Machine init
387 ******************************************************************************/ 518 ******************************************************************************/
388static struct platform_device *devices[] __initdata = {
389 &palmtc_backlight,
390 &palmtc_ucb1400_core,
391 &palmtc_keyboard,
392 &palmtc_pxa_keys,
393 &palmtc_flash,
394};
395
396static void __init palmtc_init(void) 519static void __init palmtc_init(void)
397{ 520{
398 pxa2xx_mfp_config(ARRAY_AND_SIZE(palmtc_pin_config)); 521 pxa2xx_mfp_config(ARRAY_AND_SIZE(palmtc_pin_config));
@@ -402,20 +525,21 @@ static void __init palmtc_init(void)
402 pxa_set_stuart_info(NULL); 525 pxa_set_stuart_info(NULL);
403 pxa_set_hwuart_info(NULL); 526 pxa_set_hwuart_info(NULL);
404 527
405 set_pxa_fb_info(&palmtc_lcd_screen); 528 palmtc_mmc_init();
406 pxa_set_mci_info(&palmtc_mci_platform_data); 529 palmtc_keys_init();
407 pxa_set_udc_info(&palmtc_udc_info); 530 palmtc_pwm_init();
408 pxa_set_ac97_info(NULL); 531 palmtc_irda_init();
409 pxa_set_ficp_info(&palmtc_ficp_platform_data); 532 palmtc_mkp_init();
410 533 palmtc_udc_init();
411 platform_add_devices(devices, ARRAY_SIZE(devices)); 534 palmtc_ts_init();
535 palmtc_nor_init();
536 palmtc_lcd_init();
537 palmtc_leds_init();
412}; 538};
413 539
414MACHINE_START(PALMTC, "Palm Tungsten|C") 540MACHINE_START(PALMTC, "Palm Tungsten|C")
415 .phys_io = 0x40000000,
416 .boot_params = 0xa0000100, 541 .boot_params = 0xa0000100,
417 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, 542 .map_io = pxa25x_map_io,
418 .map_io = pxa_map_io,
419 .init_irq = pxa25x_init_irq, 543 .init_irq = pxa25x_init_irq,
420 .timer = &pxa_timer, 544 .timer = &pxa_timer,
421 .init_machine = palmtc_init 545 .init_machine = palmtc_init
diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c
index 93c11a0438d5..726f5b98dcd3 100644
--- a/arch/arm/mach-pxa/palmte2.c
+++ b/arch/arm/mach-pxa/palmte2.c
@@ -136,30 +136,14 @@ static struct platform_device palmte2_pxa_keys = {
136/****************************************************************************** 136/******************************************************************************
137 * Backlight 137 * Backlight
138 ******************************************************************************/ 138 ******************************************************************************/
139static struct gpio palmte_bl_gpios[] = {
140 { GPIO_NR_PALMTE2_BL_POWER, GPIOF_INIT_LOW, "Backlight power" },
141 { GPIO_NR_PALMTE2_LCD_POWER, GPIOF_INIT_LOW, "LCD power" },
142};
143
139static int palmte2_backlight_init(struct device *dev) 144static int palmte2_backlight_init(struct device *dev)
140{ 145{
141 int ret; 146 return gpio_request_array(ARRAY_AND_SIZE(palmte_bl_gpios));
142
143 ret = gpio_request(GPIO_NR_PALMTE2_BL_POWER, "BL POWER");
144 if (ret)
145 goto err;
146 ret = gpio_direction_output(GPIO_NR_PALMTE2_BL_POWER, 0);
147 if (ret)
148 goto err2;
149 ret = gpio_request(GPIO_NR_PALMTE2_LCD_POWER, "LCD POWER");
150 if (ret)
151 goto err2;
152 ret = gpio_direction_output(GPIO_NR_PALMTE2_LCD_POWER, 0);
153 if (ret)
154 goto err3;
155
156 return 0;
157err3:
158 gpio_free(GPIO_NR_PALMTE2_LCD_POWER);
159err2:
160 gpio_free(GPIO_NR_PALMTE2_BL_POWER);
161err:
162 return ret;
163} 147}
164 148
165static int palmte2_backlight_notify(struct device *dev, int brightness) 149static int palmte2_backlight_notify(struct device *dev, int brightness)
@@ -171,8 +155,7 @@ static int palmte2_backlight_notify(struct device *dev, int brightness)
171 155
172static void palmte2_backlight_exit(struct device *dev) 156static void palmte2_backlight_exit(struct device *dev)
173{ 157{
174 gpio_free(GPIO_NR_PALMTE2_BL_POWER); 158 gpio_free_array(ARRAY_AND_SIZE(palmte_bl_gpios));
175 gpio_free(GPIO_NR_PALMTE2_LCD_POWER);
176} 159}
177 160
178static struct platform_pwm_backlight_data palmte2_backlight_data = { 161static struct platform_pwm_backlight_data palmte2_backlight_data = {
@@ -363,7 +346,7 @@ static void __init palmte2_init(void)
363 pxa_set_btuart_info(NULL); 346 pxa_set_btuart_info(NULL);
364 pxa_set_stuart_info(NULL); 347 pxa_set_stuart_info(NULL);
365 348
366 set_pxa_fb_info(&palmte2_lcd_screen); 349 pxa_set_fb_info(NULL, &palmte2_lcd_screen);
367 pxa_set_mci_info(&palmte2_mci_platform_data); 350 pxa_set_mci_info(&palmte2_mci_platform_data);
368 palmte2_udc_init(); 351 palmte2_udc_init();
369 pxa_set_ac97_info(&palmte2_ac97_pdata); 352 pxa_set_ac97_info(&palmte2_ac97_pdata);
@@ -373,10 +356,8 @@ static void __init palmte2_init(void)
373} 356}
374 357
375MACHINE_START(PALMTE2, "Palm Tungsten|E2") 358MACHINE_START(PALMTE2, "Palm Tungsten|E2")
376 .phys_io = 0x40000000,
377 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
378 .boot_params = 0xa0000100, 359 .boot_params = 0xa0000100,
379 .map_io = pxa_map_io, 360 .map_io = pxa25x_map_io,
380 .init_irq = pxa25x_init_irq, 361 .init_irq = pxa25x_init_irq,
381 .timer = &pxa_timer, 362 .timer = &pxa_timer,
382 .init_machine = palmte2_init 363 .init_machine = palmte2_init
diff --git a/arch/arm/mach-pxa/palmtreo.c b/arch/arm/mach-pxa/palmtreo.c
index 52defd5e42e5..20d1b18b1733 100644
--- a/arch/arm/mach-pxa/palmtreo.c
+++ b/arch/arm/mach-pxa/palmtreo.c
@@ -25,7 +25,6 @@
25#include <linux/pwm_backlight.h> 25#include <linux/pwm_backlight.h>
26#include <linux/gpio.h> 26#include <linux/gpio.h>
27#include <linux/power_supply.h> 27#include <linux/power_supply.h>
28#include <linux/sysdev.h>
29#include <linux/w1-gpio.h> 28#include <linux/w1-gpio.h>
30 29
31#include <asm/mach-types.h> 30#include <asm/mach-types.h>
@@ -39,7 +38,7 @@
39#include <mach/mmc.h> 38#include <mach/mmc.h>
40#include <mach/pxafb.h> 39#include <mach/pxafb.h>
41#include <mach/irda.h> 40#include <mach/irda.h>
42#include <mach/pxa27x_keypad.h> 41#include <plat/pxa27x_keypad.h>
43#include <mach/udc.h> 42#include <mach/udc.h>
44#include <mach/ohci.h> 43#include <mach/ohci.h>
45#include <mach/pxa2xx-regs.h> 44#include <mach/pxa2xx-regs.h>
@@ -441,10 +440,8 @@ static void __init centro_init(void)
441} 440}
442 441
443MACHINE_START(TREO680, "Palm Treo 680") 442MACHINE_START(TREO680, "Palm Treo 680")
444 .phys_io = TREO_PHYS_IO_START,
445 .io_pg_offst = io_p2v(0x40000000),
446 .boot_params = 0xa0000100, 443 .boot_params = 0xa0000100,
447 .map_io = pxa_map_io, 444 .map_io = pxa27x_map_io,
448 .reserve = treo_reserve, 445 .reserve = treo_reserve,
449 .init_irq = pxa27x_init_irq, 446 .init_irq = pxa27x_init_irq,
450 .timer = &pxa_timer, 447 .timer = &pxa_timer,
@@ -452,10 +449,8 @@ MACHINE_START(TREO680, "Palm Treo 680")
452MACHINE_END 449MACHINE_END
453 450
454MACHINE_START(CENTRO, "Palm Centro 685") 451MACHINE_START(CENTRO, "Palm Centro 685")
455 .phys_io = TREO_PHYS_IO_START,
456 .io_pg_offst = io_p2v(0x40000000),
457 .boot_params = 0xa0000100, 452 .boot_params = 0xa0000100,
458 .map_io = pxa_map_io, 453 .map_io = pxa27x_map_io,
459 .reserve = treo_reserve, 454 .reserve = treo_reserve,
460 .init_irq = pxa27x_init_irq, 455 .init_irq = pxa27x_init_irq,
461 .timer = &pxa_timer, 456 .timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
index 144dc2b6911f..595f002066cc 100644
--- a/arch/arm/mach-pxa/palmtx.c
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -43,7 +43,7 @@
43#include <mach/mmc.h> 43#include <mach/mmc.h>
44#include <mach/pxafb.h> 44#include <mach/pxafb.h>
45#include <mach/irda.h> 45#include <mach/irda.h>
46#include <mach/pxa27x_keypad.h> 46#include <plat/pxa27x_keypad.h>
47#include <mach/udc.h> 47#include <mach/udc.h>
48#include <mach/palmasoc.h> 48#include <mach/palmasoc.h>
49#include <mach/palm27x.h> 49#include <mach/palm27x.h>
@@ -241,7 +241,8 @@ static inline void palmtx_keys_init(void) {}
241/****************************************************************************** 241/******************************************************************************
242 * NAND Flash 242 * NAND Flash
243 ******************************************************************************/ 243 ******************************************************************************/
244#if defined(CONFIG_MTD_NAND_GPIO) || defined(CONFIG_MTD_NAND_GPIO_MODULE) 244#if defined(CONFIG_MTD_NAND_PLATFORM) || \
245 defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
245static void palmtx_nand_cmd_ctl(struct mtd_info *mtd, int cmd, 246static void palmtx_nand_cmd_ctl(struct mtd_info *mtd, int cmd,
246 unsigned int ctrl) 247 unsigned int ctrl)
247{ 248{
@@ -333,7 +334,7 @@ static struct map_desc palmtx_io_desc[] __initdata = {
333 334
334static void __init palmtx_map_io(void) 335static void __init palmtx_map_io(void)
335{ 336{
336 pxa_map_io(); 337 pxa27x_map_io();
337 iotable_init(palmtx_io_desc, ARRAY_SIZE(palmtx_io_desc)); 338 iotable_init(palmtx_io_desc, ARRAY_SIZE(palmtx_io_desc));
338} 339}
339 340
@@ -363,8 +364,6 @@ static void __init palmtx_init(void)
363} 364}
364 365
365MACHINE_START(PALMTX, "Palm T|X") 366MACHINE_START(PALMTX, "Palm T|X")
366 .phys_io = PALMTX_PHYS_IO_START,
367 .io_pg_offst = io_p2v(0x40000000),
368 .boot_params = 0xa0000100, 367 .boot_params = 0xa0000100,
369 .map_io = palmtx_map_io, 368 .map_io = palmtx_map_io,
370 .init_irq = pxa27x_init_irq, 369 .init_irq = pxa27x_init_irq,
diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c
index 87e4b1044e0b..65f24f0b77e8 100644
--- a/arch/arm/mach-pxa/palmz72.c
+++ b/arch/arm/mach-pxa/palmz72.c
@@ -19,7 +19,7 @@
19 */ 19 */
20 20
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22#include <linux/sysdev.h> 22#include <linux/syscore_ops.h>
23#include <linux/delay.h> 23#include <linux/delay.h>
24#include <linux/irq.h> 24#include <linux/irq.h>
25#include <linux/gpio_keys.h> 25#include <linux/gpio_keys.h>
@@ -30,6 +30,7 @@
30#include <linux/wm97xx.h> 30#include <linux/wm97xx.h>
31#include <linux/power_supply.h> 31#include <linux/power_supply.h>
32#include <linux/usb/gpio_vbus.h> 32#include <linux/usb/gpio_vbus.h>
33#include <linux/i2c-gpio.h>
33 34
34#include <asm/mach-types.h> 35#include <asm/mach-types.h>
35#include <asm/mach/arch.h> 36#include <asm/mach/arch.h>
@@ -41,12 +42,15 @@
41#include <mach/mmc.h> 42#include <mach/mmc.h>
42#include <mach/pxafb.h> 43#include <mach/pxafb.h>
43#include <mach/irda.h> 44#include <mach/irda.h>
44#include <mach/pxa27x_keypad.h> 45#include <plat/pxa27x_keypad.h>
45#include <mach/udc.h> 46#include <mach/udc.h>
46#include <mach/palmasoc.h> 47#include <mach/palmasoc.h>
47#include <mach/palm27x.h> 48#include <mach/palm27x.h>
48 49
49#include <mach/pm.h> 50#include <mach/pm.h>
51#include <mach/camera.h>
52
53#include <media/soc_camera.h>
50 54
51#include "generic.h" 55#include "generic.h"
52#include "devices.h" 56#include "devices.h"
@@ -103,6 +107,28 @@ static unsigned long palmz72_pin_config[] __initdata = {
103 GPIO22_GPIO, /* LCD border color */ 107 GPIO22_GPIO, /* LCD border color */
104 GPIO96_GPIO, /* lcd power */ 108 GPIO96_GPIO, /* lcd power */
105 109
110 /* PXA Camera */
111 GPIO81_CIF_DD_0,
112 GPIO48_CIF_DD_5,
113 GPIO50_CIF_DD_3,
114 GPIO51_CIF_DD_2,
115 GPIO52_CIF_DD_4,
116 GPIO53_CIF_MCLK,
117 GPIO54_CIF_PCLK,
118 GPIO55_CIF_DD_1,
119 GPIO84_CIF_FV,
120 GPIO85_CIF_LV,
121 GPIO93_CIF_DD_6,
122 GPIO108_CIF_DD_7,
123
124 GPIO56_GPIO, /* OV9640 Powerdown */
125 GPIO57_GPIO, /* OV9640 Reset */
126 GPIO91_GPIO, /* OV9640 Power */
127
128 /* I2C */
129 GPIO117_GPIO, /* I2C_SCL */
130 GPIO118_GPIO, /* I2C_SDA */
131
106 /* Misc. */ 132 /* Misc. */
107 GPIO0_GPIO | WAKEUP_ON_LEVEL_HIGH, /* power detect */ 133 GPIO0_GPIO | WAKEUP_ON_LEVEL_HIGH, /* power detect */
108 GPIO88_GPIO, /* green led */ 134 GPIO88_GPIO, /* green led */
@@ -207,12 +233,12 @@ static struct palmz72_resume_info palmz72_resume_info = {
207 233
208static unsigned long store_ptr; 234static unsigned long store_ptr;
209 235
210/* sys_device for Palm Zire 72 PM */ 236/* syscore_ops for Palm Zire 72 PM */
211 237
212static int palmz72_pm_suspend(struct sys_device *dev, pm_message_t msg) 238static int palmz72_pm_suspend(void)
213{ 239{
214 /* setup the resume_info struct for the original bootloader */ 240 /* setup the resume_info struct for the original bootloader */
215 palmz72_resume_info.resume_addr = (u32) pxa_cpu_resume; 241 palmz72_resume_info.resume_addr = (u32) cpu_resume;
216 242
217 /* Storing memory touched by ROM */ 243 /* Storing memory touched by ROM */
218 store_ptr = *PALMZ72_SAVE_DWORD; 244 store_ptr = *PALMZ72_SAVE_DWORD;
@@ -223,37 +249,129 @@ static int palmz72_pm_suspend(struct sys_device *dev, pm_message_t msg)
223 return 0; 249 return 0;
224} 250}
225 251
226static int palmz72_pm_resume(struct sys_device *dev) 252static void palmz72_pm_resume(void)
227{ 253{
228 *PALMZ72_SAVE_DWORD = store_ptr; 254 *PALMZ72_SAVE_DWORD = store_ptr;
229 return 0;
230} 255}
231 256
232static struct sysdev_class palmz72_pm_sysclass = { 257static struct syscore_ops palmz72_pm_syscore_ops = {
233 .name = "palmz72_pm",
234 .suspend = palmz72_pm_suspend, 258 .suspend = palmz72_pm_suspend,
235 .resume = palmz72_pm_resume, 259 .resume = palmz72_pm_resume,
236}; 260};
237 261
238static struct sys_device palmz72_pm_device = {
239 .cls = &palmz72_pm_sysclass,
240};
241
242static int __init palmz72_pm_init(void) 262static int __init palmz72_pm_init(void)
243{ 263{
244 int ret = -ENODEV;
245 if (machine_is_palmz72()) { 264 if (machine_is_palmz72()) {
246 ret = sysdev_class_register(&palmz72_pm_sysclass); 265 register_syscore_ops(&palmz72_pm_syscore_ops);
247 if (ret == 0) 266 return 0;
248 ret = sysdev_register(&palmz72_pm_device);
249 } 267 }
250 return ret; 268 return -ENODEV;
251} 269}
252 270
253device_initcall(palmz72_pm_init); 271device_initcall(palmz72_pm_init);
254#endif 272#endif
255 273
256/****************************************************************************** 274/******************************************************************************
275 * SoC Camera
276 ******************************************************************************/
277#if defined(CONFIG_SOC_CAMERA_OV9640) || \
278 defined(CONFIG_SOC_CAMERA_OV9640_MODULE)
279static struct pxacamera_platform_data palmz72_pxacamera_platform_data = {
280 .flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 |
281 PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN,
282 .mclk_10khz = 2600,
283};
284
285/* Board I2C devices. */
286static struct i2c_board_info palmz72_i2c_device[] = {
287 {
288 I2C_BOARD_INFO("ov9640", 0x30),
289 }
290};
291
292static int palmz72_camera_power(struct device *dev, int power)
293{
294 gpio_set_value(GPIO_NR_PALMZ72_CAM_PWDN, !power);
295 mdelay(50);
296 return 0;
297}
298
299static int palmz72_camera_reset(struct device *dev)
300{
301 gpio_set_value(GPIO_NR_PALMZ72_CAM_RESET, 1);
302 mdelay(50);
303 gpio_set_value(GPIO_NR_PALMZ72_CAM_RESET, 0);
304 mdelay(50);
305 return 0;
306}
307
308static struct soc_camera_link palmz72_iclink = {
309 .bus_id = 0, /* Match id in pxa27x_device_camera in device.c */
310 .board_info = &palmz72_i2c_device[0],
311 .i2c_adapter_id = 0,
312 .module_name = "ov96xx",
313 .power = &palmz72_camera_power,
314 .reset = &palmz72_camera_reset,
315 .flags = SOCAM_DATAWIDTH_8,
316};
317
318static struct i2c_gpio_platform_data palmz72_i2c_bus_data = {
319 .sda_pin = 118,
320 .scl_pin = 117,
321 .udelay = 10,
322 .timeout = 100,
323};
324
325static struct platform_device palmz72_i2c_bus_device = {
326 .name = "i2c-gpio",
327 .id = 0, /* we use this as a replacement for i2c-pxa */
328 .dev = {
329 .platform_data = &palmz72_i2c_bus_data,
330 }
331};
332
333static struct platform_device palmz72_camera = {
334 .name = "soc-camera-pdrv",
335 .id = -1,
336 .dev = {
337 .platform_data = &palmz72_iclink,
338 },
339};
340
341/* Here we request the camera GPIOs and configure them. We power up the camera
342 * module, deassert the reset pin, but put it into powerdown (low to no power
343 * consumption) mode. This allows us to later bring the module up fast. */
344static struct gpio palmz72_camera_gpios[] = {
345 { GPIO_NR_PALMZ72_CAM_POWER, GPIOF_INIT_HIGH,"Camera DVDD" },
346 { GPIO_NR_PALMZ72_CAM_RESET, GPIOF_INIT_LOW, "Camera RESET" },
347 { GPIO_NR_PALMZ72_CAM_PWDN, GPIOF_INIT_LOW, "Camera PWDN" },
348};
349
350static inline void __init palmz72_cam_gpio_init(void)
351{
352 int ret;
353
354 ret = gpio_request_array(ARRAY_AND_SIZE(palmz72_camera_gpios));
355 if (!ret)
356 gpio_free_array(ARRAY_AND_SIZE(palmz72_camera_gpios));
357 else
358 printk(KERN_ERR "Camera GPIO init failed!\n");
359
360 return;
361}
362
363static void __init palmz72_camera_init(void)
364{
365 palmz72_cam_gpio_init();
366 pxa_set_camera_info(&palmz72_pxacamera_platform_data);
367 platform_device_register(&palmz72_i2c_bus_device);
368 platform_device_register(&palmz72_camera);
369}
370#else
371static inline void palmz72_camera_init(void) {}
372#endif
373
374/******************************************************************************
257 * Machine init 375 * Machine init
258 ******************************************************************************/ 376 ******************************************************************************/
259static void __init palmz72_init(void) 377static void __init palmz72_init(void)
@@ -276,13 +394,12 @@ static void __init palmz72_init(void)
276 palm27x_pmic_init(); 394 palm27x_pmic_init();
277 palmz72_kpc_init(); 395 palmz72_kpc_init();
278 palmz72_leds_init(); 396 palmz72_leds_init();
397 palmz72_camera_init();
279} 398}
280 399
281MACHINE_START(PALMZ72, "Palm Zire72") 400MACHINE_START(PALMZ72, "Palm Zire72")
282 .phys_io = 0x40000000,
283 .io_pg_offst = io_p2v(0x40000000),
284 .boot_params = 0xa0000100, 401 .boot_params = 0xa0000100,
285 .map_io = pxa_map_io, 402 .map_io = pxa27x_map_io,
286 .init_irq = pxa27x_init_irq, 403 .init_irq = pxa27x_init_irq,
287 .timer = &pxa_timer, 404 .timer = &pxa_timer,
288 .init_machine = palmz72_init 405 .init_machine = palmz72_init
diff --git a/arch/arm/mach-pxa/pcm027.c b/arch/arm/mach-pxa/pcm027.c
index 2190af066470..1fc8a66407ae 100644
--- a/arch/arm/mach-pxa/pcm027.c
+++ b/arch/arm/mach-pxa/pcm027.c
@@ -25,12 +25,12 @@
25#include <linux/mtd/physmap.h> 25#include <linux/mtd/physmap.h>
26#include <linux/spi/spi.h> 26#include <linux/spi/spi.h>
27#include <linux/spi/max7301.h> 27#include <linux/spi/max7301.h>
28#include <linux/spi/pxa2xx_spi.h>
28#include <linux/leds.h> 29#include <linux/leds.h>
29 30
30#include <asm/mach-types.h> 31#include <asm/mach-types.h>
31#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
32#include <mach/pxa27x.h> 33#include <mach/pxa27x.h>
33#include <mach/pxa2xx_spi.h>
34#include <mach/pcm027.h> 34#include <mach/pcm027.h>
35#include "generic.h" 35#include "generic.h"
36 36
@@ -244,7 +244,7 @@ static void __init pcm027_init(void)
244 244
245static void __init pcm027_map_io(void) 245static void __init pcm027_map_io(void)
246{ 246{
247 pxa_map_io(); 247 pxa27x_map_io();
248 248
249 /* initialize sleep mode regs (wake-up sources, etc) */ 249 /* initialize sleep mode regs (wake-up sources, etc) */
250 PGSR0 = 0x01308000; 250 PGSR0 = 0x01308000;
@@ -259,9 +259,8 @@ static void __init pcm027_map_io(void)
259MACHINE_START(PCM027, "Phytec Messtechnik GmbH phyCORE-PXA270") 259MACHINE_START(PCM027, "Phytec Messtechnik GmbH phyCORE-PXA270")
260 /* Maintainer: Pengutronix */ 260 /* Maintainer: Pengutronix */
261 .boot_params = 0xa0000100, 261 .boot_params = 0xa0000100,
262 .phys_io = 0x40000000,
263 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
264 .map_io = pcm027_map_io, 262 .map_io = pcm027_map_io,
263 .nr_irqs = PCM027_NR_IRQS,
265 .init_irq = pxa27x_init_irq, 264 .init_irq = pxa27x_init_irq,
266 .timer = &pxa_timer, 265 .timer = &pxa_timer,
267 .init_machine = pcm027_init, 266 .init_machine = pcm027_init,
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index f56ae1008759..6d5b7e062124 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -23,12 +23,12 @@
23#include <linux/irq.h> 23#include <linux/irq.h>
24#include <linux/platform_device.h> 24#include <linux/platform_device.h>
25#include <linux/i2c.h> 25#include <linux/i2c.h>
26#include <linux/i2c/pxa-i2c.h>
26#include <linux/pwm_backlight.h> 27#include <linux/pwm_backlight.h>
27 28
28#include <media/soc_camera.h> 29#include <media/soc_camera.h>
29 30
30#include <asm/gpio.h> 31#include <asm/gpio.h>
31#include <plat/i2c.h>
32#include <mach/camera.h> 32#include <mach/camera.h>
33#include <asm/mach/map.h> 33#include <asm/mach/map.h>
34#include <mach/pxa27x.h> 34#include <mach/pxa27x.h>
@@ -241,23 +241,23 @@ static struct platform_device pcm990_backlight_device = {
241 241
242static unsigned long pcm990_irq_enabled; 242static unsigned long pcm990_irq_enabled;
243 243
244static void pcm990_mask_ack_irq(unsigned int irq) 244static void pcm990_mask_ack_irq(struct irq_data *d)
245{ 245{
246 int pcm990_irq = (irq - PCM027_IRQ(0)); 246 int pcm990_irq = (d->irq - PCM027_IRQ(0));
247 PCM990_INTMSKENA = (pcm990_irq_enabled &= ~(1 << pcm990_irq)); 247 PCM990_INTMSKENA = (pcm990_irq_enabled &= ~(1 << pcm990_irq));
248} 248}
249 249
250static void pcm990_unmask_irq(unsigned int irq) 250static void pcm990_unmask_irq(struct irq_data *d)
251{ 251{
252 int pcm990_irq = (irq - PCM027_IRQ(0)); 252 int pcm990_irq = (d->irq - PCM027_IRQ(0));
253 /* the irq can be acknowledged only if deasserted, so it's done here */ 253 /* the irq can be acknowledged only if deasserted, so it's done here */
254 PCM990_INTSETCLR |= 1 << pcm990_irq; 254 PCM990_INTSETCLR |= 1 << pcm990_irq;
255 PCM990_INTMSKENA = (pcm990_irq_enabled |= (1 << pcm990_irq)); 255 PCM990_INTMSKENA = (pcm990_irq_enabled |= (1 << pcm990_irq));
256} 256}
257 257
258static struct irq_chip pcm990_irq_chip = { 258static struct irq_chip pcm990_irq_chip = {
259 .mask_ack = pcm990_mask_ack_irq, 259 .irq_mask_ack = pcm990_mask_ack_irq,
260 .unmask = pcm990_unmask_irq, 260 .irq_unmask = pcm990_unmask_irq,
261}; 261};
262 262
263static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc) 263static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)
@@ -265,7 +265,8 @@ static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)
265 unsigned long pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled; 265 unsigned long pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled;
266 266
267 do { 267 do {
268 desc->chip->ack(irq); /* clear our parent IRQ */ 268 /* clear our parent IRQ */
269 desc->irq_data.chip->irq_ack(&desc->irq_data);
269 if (likely(pending)) { 270 if (likely(pending)) {
270 irq = PCM027_IRQ(0) + __ffs(pending); 271 irq = PCM027_IRQ(0) + __ffs(pending);
271 generic_handle_irq(irq); 272 generic_handle_irq(irq);
@@ -280,16 +281,16 @@ static void __init pcm990_init_irq(void)
280 281
281 /* setup extra PCM990 irqs */ 282 /* setup extra PCM990 irqs */
282 for (irq = PCM027_IRQ(0); irq <= PCM027_IRQ(3); irq++) { 283 for (irq = PCM027_IRQ(0); irq <= PCM027_IRQ(3); irq++) {
283 set_irq_chip(irq, &pcm990_irq_chip); 284 irq_set_chip_and_handler(irq, &pcm990_irq_chip,
284 set_irq_handler(irq, handle_level_irq); 285 handle_level_irq);
285 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 286 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
286 } 287 }
287 288
288 PCM990_INTMSKENA = 0x00; /* disable all Interrupts */ 289 PCM990_INTMSKENA = 0x00; /* disable all Interrupts */
289 PCM990_INTSETCLR = 0xFF; 290 PCM990_INTSETCLR = 0xFF;
290 291
291 set_irq_chained_handler(PCM990_CTRL_INT_IRQ, pcm990_irq_handler); 292 irq_set_chained_handler(PCM990_CTRL_INT_IRQ, pcm990_irq_handler);
292 set_irq_type(PCM990_CTRL_INT_IRQ, PCM990_CTRL_INT_IRQ_EDGE); 293 irq_set_irq_type(PCM990_CTRL_INT_IRQ, PCM990_CTRL_INT_IRQ_EDGE);
293} 294}
294 295
295static int pcm990_mci_init(struct device *dev, irq_handler_t mci_detect_int, 296static int pcm990_mci_init(struct device *dev, irq_handler_t mci_detect_int,
@@ -453,7 +454,6 @@ static struct soc_camera_link iclink[] = {
453 .query_bus_param = pcm990_camera_query_bus_param, 454 .query_bus_param = pcm990_camera_query_bus_param,
454 .set_bus_param = pcm990_camera_set_bus_param, 455 .set_bus_param = pcm990_camera_set_bus_param,
455 .free_bus = pcm990_camera_free_bus, 456 .free_bus = pcm990_camera_free_bus,
456 .module_name = "mt9v022",
457 }, { 457 }, {
458 .bus_id = 0, /* Must match with the camera ID */ 458 .bus_id = 0, /* Must match with the camera ID */
459 .board_info = &pcm990_camera_i2c[1], 459 .board_info = &pcm990_camera_i2c[1],
@@ -461,7 +461,6 @@ static struct soc_camera_link iclink[] = {
461 .query_bus_param = pcm990_camera_query_bus_param, 461 .query_bus_param = pcm990_camera_query_bus_param,
462 .set_bus_param = pcm990_camera_set_bus_param, 462 .set_bus_param = pcm990_camera_set_bus_param,
463 .free_bus = pcm990_camera_free_bus, 463 .free_bus = pcm990_camera_free_bus,
464 .module_name = "mt9m001",
465 }, 464 },
466}; 465};
467 466
@@ -516,7 +515,7 @@ void __init pcm990_baseboard_init(void)
516 pcm990_init_irq(); 515 pcm990_init_irq();
517 516
518#ifndef CONFIG_PCM990_DISPLAY_NONE 517#ifndef CONFIG_PCM990_DISPLAY_NONE
519 set_pxa_fb_info(&pcm990_fbinfo); 518 pxa_set_fb_info(NULL, &pcm990_fbinfo);
520#endif 519#endif
521 platform_device_register(&pcm990_backlight_device); 520 platform_device_register(&pcm990_backlight_device);
522 521
diff --git a/arch/arm/mach-pxa/pm.c b/arch/arm/mach-pxa/pm.c
index 166c15f62916..51e1583265b2 100644
--- a/arch/arm/mach-pxa/pm.c
+++ b/arch/arm/mach-pxa/pm.c
@@ -33,7 +33,7 @@ int pxa_pm_enter(suspend_state_t state)
33#endif 33#endif
34 34
35 /* skip registers saving for standby */ 35 /* skip registers saving for standby */
36 if (state != PM_SUSPEND_STANDBY) { 36 if (state != PM_SUSPEND_STANDBY && pxa_cpu_pm_fns->save) {
37 pxa_cpu_pm_fns->save(sleep_save); 37 pxa_cpu_pm_fns->save(sleep_save);
38 /* before sleeping, calculate and save a checksum */ 38 /* before sleeping, calculate and save a checksum */
39 for (i = 0; i < pxa_cpu_pm_fns->save_count - 1; i++) 39 for (i = 0; i < pxa_cpu_pm_fns->save_count - 1; i++)
@@ -44,7 +44,7 @@ int pxa_pm_enter(suspend_state_t state)
44 pxa_cpu_pm_fns->enter(state); 44 pxa_cpu_pm_fns->enter(state);
45 cpu_init(); 45 cpu_init();
46 46
47 if (state != PM_SUSPEND_STANDBY) { 47 if (state != PM_SUSPEND_STANDBY && pxa_cpu_pm_fns->restore) {
48 /* after sleeping, validate the checksum */ 48 /* after sleeping, validate the checksum */
49 for (i = 0; i < pxa_cpu_pm_fns->save_count - 1; i++) 49 for (i = 0; i < pxa_cpu_pm_fns->save_count - 1; i++)
50 checksum += sleep_save[i]; 50 checksum += sleep_save[i];
@@ -67,11 +67,6 @@ int pxa_pm_enter(suspend_state_t state)
67 67
68EXPORT_SYMBOL_GPL(pxa_pm_enter); 68EXPORT_SYMBOL_GPL(pxa_pm_enter);
69 69
70unsigned long sleep_phys_sp(void *sp)
71{
72 return virt_to_phys(sp);
73}
74
75static int pxa_pm_valid(suspend_state_t state) 70static int pxa_pm_valid(suspend_state_t state)
76{ 71{
77 if (pxa_cpu_pm_fns) 72 if (pxa_cpu_pm_fns)
@@ -96,7 +91,7 @@ void pxa_pm_finish(void)
96 pxa_cpu_pm_fns->finish(); 91 pxa_cpu_pm_fns->finish();
97} 92}
98 93
99static struct platform_suspend_ops pxa_pm_ops = { 94static const struct platform_suspend_ops pxa_pm_ops = {
100 .valid = pxa_pm_valid, 95 .valid = pxa_pm_valid,
101 .enter = pxa_pm_enter, 96 .enter = pxa_pm_enter,
102 .prepare = pxa_pm_prepare, 97 .prepare = pxa_pm_prepare,
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index 55e8fcde0141..16d14fd79b4b 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -23,8 +23,10 @@
23#include <linux/mtd/physmap.h> 23#include <linux/mtd/physmap.h>
24#include <linux/gpio.h> 24#include <linux/gpio.h>
25#include <linux/i2c.h> 25#include <linux/i2c.h>
26#include <linux/i2c/pxa-i2c.h>
26#include <linux/spi/spi.h> 27#include <linux/spi/spi.h>
27#include <linux/spi/ads7846.h> 28#include <linux/spi/ads7846.h>
29#include <linux/spi/pxa2xx_spi.h>
28#include <linux/mtd/sharpsl.h> 30#include <linux/mtd/sharpsl.h>
29 31
30#include <mach/hardware.h> 32#include <mach/hardware.h>
@@ -43,8 +45,6 @@
43#include <mach/irda.h> 45#include <mach/irda.h>
44#include <mach/poodle.h> 46#include <mach/poodle.h>
45#include <mach/pxafb.h> 47#include <mach/pxafb.h>
46#include <mach/pxa2xx_spi.h>
47#include <plat/i2c.h>
48 48
49#include <asm/hardware/scoop.h> 49#include <asm/hardware/scoop.h>
50#include <asm/hardware/locomo.h> 50#include <asm/hardware/locomo.h>
@@ -445,8 +445,7 @@ static void __init poodle_init(void)
445 if (ret) 445 if (ret)
446 pr_warning("poodle: Unable to register LoCoMo device\n"); 446 pr_warning("poodle: Unable to register LoCoMo device\n");
447 447
448 set_pxa_fb_parent(&poodle_locomo_device.dev); 448 pxa_set_fb_info(&poodle_locomo_device.dev, &poodle_fb_info);
449 set_pxa_fb_info(&poodle_fb_info);
450 pxa_set_udc_info(&udc_info); 449 pxa_set_udc_info(&udc_info);
451 pxa_set_mci_info(&poodle_mci_platform_data); 450 pxa_set_mci_info(&poodle_mci_platform_data);
452 pxa_set_ficp_info(&poodle_ficp_platform_data); 451 pxa_set_ficp_info(&poodle_ficp_platform_data);
@@ -465,10 +464,9 @@ static void __init fixup_poodle(struct machine_desc *desc,
465} 464}
466 465
467MACHINE_START(POODLE, "SHARP Poodle") 466MACHINE_START(POODLE, "SHARP Poodle")
468 .phys_io = 0x40000000,
469 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
470 .fixup = fixup_poodle, 467 .fixup = fixup_poodle,
471 .map_io = pxa_map_io, 468 .map_io = pxa25x_map_io,
469 .nr_irqs = POODLE_NR_IRQS, /* 4 for LoCoMo */
472 .init_irq = pxa25x_init_irq, 470 .init_irq = pxa25x_init_irq,
473 .timer = &pxa_timer, 471 .timer = &pxa_timer,
474 .init_machine = poodle_init, 472 .init_machine = poodle_init,
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index de53f2e4aa39..fed363cec9c6 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -21,8 +21,10 @@
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/platform_device.h> 22#include <linux/platform_device.h>
23#include <linux/suspend.h> 23#include <linux/suspend.h>
24#include <linux/sysdev.h> 24#include <linux/syscore_ops.h>
25#include <linux/irq.h>
25 26
27#include <asm/mach/map.h>
26#include <mach/hardware.h> 28#include <mach/hardware.h>
27#include <mach/irqs.h> 29#include <mach/irqs.h>
28#include <mach/gpio.h> 30#include <mach/gpio.h>
@@ -30,6 +32,7 @@
30#include <mach/reset.h> 32#include <mach/reset.h>
31#include <mach/pm.h> 33#include <mach/pm.h>
32#include <mach/dma.h> 34#include <mach/dma.h>
35#include <mach/smemc.h>
33 36
34#include "generic.h" 37#include "generic.h"
35#include "devices.h" 38#include "devices.h"
@@ -90,23 +93,21 @@ unsigned int pxa25x_get_clk_frequency_khz(int info)
90 return (turbo & 1) ? (N/1000) : (M/1000); 93 return (turbo & 1) ? (N/1000) : (M/1000);
91} 94}
92 95
93/* 96static unsigned long clk_pxa25x_mem_getrate(struct clk *clk)
94 * Return the current memory clock frequency in units of 10kHz
95 */
96unsigned int pxa25x_get_memclk_frequency_10khz(void)
97{ 97{
98 return L_clk_mult[(CCCR >> 0) & 0x1f] * BASE_CLK / 10000; 98 return L_clk_mult[(CCCR >> 0) & 0x1f] * BASE_CLK;
99} 99}
100 100
101static unsigned long clk_pxa25x_lcd_getrate(struct clk *clk) 101static const struct clkops clk_pxa25x_mem_ops = {
102{ 102 .enable = clk_dummy_enable,
103 return pxa25x_get_memclk_frequency_10khz() * 10000; 103 .disable = clk_dummy_disable,
104} 104 .getrate = clk_pxa25x_mem_getrate,
105};
105 106
106static const struct clkops clk_pxa25x_lcd_ops = { 107static const struct clkops clk_pxa25x_lcd_ops = {
107 .enable = clk_cken_enable, 108 .enable = clk_pxa2xx_cken_enable,
108 .disable = clk_cken_disable, 109 .disable = clk_pxa2xx_cken_disable,
109 .getrate = clk_pxa25x_lcd_getrate, 110 .getrate = clk_pxa25x_mem_getrate,
110}; 111};
111 112
112static unsigned long gpio12_config_32k[] = { 113static unsigned long gpio12_config_32k[] = {
@@ -160,31 +161,30 @@ static const struct clkops clk_pxa25x_gpio11_ops = {
160 * 95.842MHz -> MMC 19.169MHz, I2C 31.949MHz, FICP 47.923MHz, USB 47.923MHz 161 * 95.842MHz -> MMC 19.169MHz, I2C 31.949MHz, FICP 47.923MHz, USB 47.923MHz
161 * 147.456MHz -> UART 14.7456MHz, AC97 12.288MHz, I2S 5.672MHz (allegedly) 162 * 147.456MHz -> UART 14.7456MHz, AC97 12.288MHz, I2S 5.672MHz (allegedly)
162 */ 163 */
163static DEFINE_CKEN(pxa25x_hwuart, HWUART, 14745600, 1);
164
165static struct clk_lookup pxa25x_hwuart_clkreg =
166 INIT_CLKREG(&clk_pxa25x_hwuart, "pxa2xx-uart.3", NULL);
167 164
168/* 165/*
169 * PXA 2xx clock declarations. 166 * PXA 2xx clock declarations.
170 */ 167 */
168static DEFINE_PXA2_CKEN(pxa25x_hwuart, HWUART, 14745600, 1);
169static DEFINE_PXA2_CKEN(pxa25x_ffuart, FFUART, 14745600, 1);
170static DEFINE_PXA2_CKEN(pxa25x_btuart, BTUART, 14745600, 1);
171static DEFINE_PXA2_CKEN(pxa25x_stuart, STUART, 14745600, 1);
172static DEFINE_PXA2_CKEN(pxa25x_usb, USB, 47923000, 5);
173static DEFINE_PXA2_CKEN(pxa25x_mmc, MMC, 19169000, 0);
174static DEFINE_PXA2_CKEN(pxa25x_i2c, I2C, 31949000, 0);
175static DEFINE_PXA2_CKEN(pxa25x_ssp, SSP, 3686400, 0);
176static DEFINE_PXA2_CKEN(pxa25x_nssp, NSSP, 3686400, 0);
177static DEFINE_PXA2_CKEN(pxa25x_assp, ASSP, 3686400, 0);
178static DEFINE_PXA2_CKEN(pxa25x_pwm0, PWM0, 3686400, 0);
179static DEFINE_PXA2_CKEN(pxa25x_pwm1, PWM1, 3686400, 0);
180static DEFINE_PXA2_CKEN(pxa25x_ac97, AC97, 24576000, 0);
181static DEFINE_PXA2_CKEN(pxa25x_i2s, I2S, 14745600, 0);
182static DEFINE_PXA2_CKEN(pxa25x_ficp, FICP, 47923000, 0);
183
171static DEFINE_CK(pxa25x_lcd, LCD, &clk_pxa25x_lcd_ops); 184static DEFINE_CK(pxa25x_lcd, LCD, &clk_pxa25x_lcd_ops);
172static DEFINE_CKEN(pxa25x_ffuart, FFUART, 14745600, 1);
173static DEFINE_CKEN(pxa25x_btuart, BTUART, 14745600, 1);
174static DEFINE_CKEN(pxa25x_stuart, STUART, 14745600, 1);
175static DEFINE_CKEN(pxa25x_usb, USB, 47923000, 5);
176static DEFINE_CLK(pxa25x_gpio11, &clk_pxa25x_gpio11_ops, 3686400, 0); 185static DEFINE_CLK(pxa25x_gpio11, &clk_pxa25x_gpio11_ops, 3686400, 0);
177static DEFINE_CLK(pxa25x_gpio12, &clk_pxa25x_gpio12_ops, 32768, 0); 186static DEFINE_CLK(pxa25x_gpio12, &clk_pxa25x_gpio12_ops, 32768, 0);
178static DEFINE_CKEN(pxa25x_mmc, MMC, 19169000, 0); 187static DEFINE_CLK(pxa25x_mem, &clk_pxa25x_mem_ops, 0, 0);
179static DEFINE_CKEN(pxa25x_i2c, I2C, 31949000, 0);
180static DEFINE_CKEN(pxa25x_ssp, SSP, 3686400, 0);
181static DEFINE_CKEN(pxa25x_nssp, NSSP, 3686400, 0);
182static DEFINE_CKEN(pxa25x_assp, ASSP, 3686400, 0);
183static DEFINE_CKEN(pxa25x_pwm0, PWM0, 3686400, 0);
184static DEFINE_CKEN(pxa25x_pwm1, PWM1, 3686400, 0);
185static DEFINE_CKEN(pxa25x_ac97, AC97, 24576000, 0);
186static DEFINE_CKEN(pxa25x_i2s, I2S, 14745600, 0);
187static DEFINE_CKEN(pxa25x_ficp, FICP, 47923000, 0);
188 188
189static struct clk_lookup pxa25x_clkregs[] = { 189static struct clk_lookup pxa25x_clkregs[] = {
190 INIT_CLKREG(&clk_pxa25x_lcd, "pxa2xx-fb", NULL), 190 INIT_CLKREG(&clk_pxa25x_lcd, "pxa2xx-fb", NULL),
@@ -205,8 +205,12 @@ static struct clk_lookup pxa25x_clkregs[] = {
205 INIT_CLKREG(&clk_pxa25x_ac97, NULL, "AC97CLK"), 205 INIT_CLKREG(&clk_pxa25x_ac97, NULL, "AC97CLK"),
206 INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"), 206 INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"),
207 INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"), 207 INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"),
208 INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL),
208}; 209};
209 210
211static struct clk_lookup pxa25x_hwuart_clkreg =
212 INIT_CLKREG(&clk_pxa25x_hwuart, "pxa2xx-uart.3", NULL);
213
210#ifdef CONFIG_PM 214#ifdef CONFIG_PM
211 215
212#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x 216#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
@@ -219,20 +223,17 @@ static struct clk_lookup pxa25x_clkregs[] = {
219 */ 223 */
220enum { 224enum {
221 SLEEP_SAVE_PSTR, 225 SLEEP_SAVE_PSTR,
222 SLEEP_SAVE_CKEN,
223 SLEEP_SAVE_COUNT 226 SLEEP_SAVE_COUNT
224}; 227};
225 228
226 229
227static void pxa25x_cpu_pm_save(unsigned long *sleep_save) 230static void pxa25x_cpu_pm_save(unsigned long *sleep_save)
228{ 231{
229 SAVE(CKEN);
230 SAVE(PSTR); 232 SAVE(PSTR);
231} 233}
232 234
233static void pxa25x_cpu_pm_restore(unsigned long *sleep_save) 235static void pxa25x_cpu_pm_restore(unsigned long *sleep_save)
234{ 236{
235 RESTORE(CKEN);
236 RESTORE(PSTR); 237 RESTORE(PSTR);
237} 238}
238 239
@@ -243,7 +244,7 @@ static void pxa25x_cpu_pm_enter(suspend_state_t state)
243 244
244 switch (state) { 245 switch (state) {
245 case PM_SUSPEND_MEM: 246 case PM_SUSPEND_MEM:
246 pxa25x_cpu_suspend(PWRMODE_SLEEP); 247 pxa25x_cpu_suspend(PWRMODE_SLEEP, PLAT_PHYS_OFFSET - PAGE_OFFSET);
247 break; 248 break;
248 } 249 }
249} 250}
@@ -251,7 +252,7 @@ static void pxa25x_cpu_pm_enter(suspend_state_t state)
251static int pxa25x_cpu_pm_prepare(void) 252static int pxa25x_cpu_pm_prepare(void)
252{ 253{
253 /* set resume return address */ 254 /* set resume return address */
254 PSPR = virt_to_phys(pxa_cpu_resume); 255 PSPR = virt_to_phys(cpu_resume);
255 return 0; 256 return 0;
256} 257}
257 258
@@ -282,15 +283,15 @@ static inline void pxa25x_init_pm(void) {}
282/* PXA25x: supports wakeup from GPIO0..GPIO15 and RTC alarm 283/* PXA25x: supports wakeup from GPIO0..GPIO15 and RTC alarm
283 */ 284 */
284 285
285static int pxa25x_set_wake(unsigned int irq, unsigned int on) 286static int pxa25x_set_wake(struct irq_data *d, unsigned int on)
286{ 287{
287 int gpio = IRQ_TO_GPIO(irq); 288 int gpio = irq_to_gpio(d->irq);
288 uint32_t mask = 0; 289 uint32_t mask = 0;
289 290
290 if (gpio >= 0 && gpio < 85) 291 if (gpio >= 0 && gpio < 85)
291 return gpio_set_wake(gpio, on); 292 return gpio_set_wake(gpio, on);
292 293
293 if (irq == IRQ_RTCAlrm) { 294 if (d->irq == IRQ_RTCAlrm) {
294 mask = PWER_RTC; 295 mask = PWER_RTC;
295 goto set_pwer; 296 goto set_pwer;
296 } 297 }
@@ -320,6 +321,22 @@ void __init pxa26x_init_irq(void)
320} 321}
321#endif 322#endif
322 323
324static struct map_desc pxa25x_io_desc[] __initdata = {
325 { /* Mem Ctl */
326 .virtual = SMEMC_VIRT,
327 .pfn = __phys_to_pfn(PXA2XX_SMEMC_BASE),
328 .length = 0x00200000,
329 .type = MT_DEVICE
330 },
331};
332
333void __init pxa25x_map_io(void)
334{
335 pxa_map_io();
336 iotable_init(ARRAY_AND_SIZE(pxa25x_io_desc));
337 pxa25x_get_clk_frequency_khz(1);
338}
339
323static struct platform_device *pxa25x_devices[] __initdata = { 340static struct platform_device *pxa25x_devices[] __initdata = {
324 &pxa25x_device_udc, 341 &pxa25x_device_udc,
325 &pxa_device_pmu, 342 &pxa_device_pmu,
@@ -330,21 +347,12 @@ static struct platform_device *pxa25x_devices[] __initdata = {
330 &pxa25x_device_assp, 347 &pxa25x_device_assp,
331 &pxa25x_device_pwm0, 348 &pxa25x_device_pwm0,
332 &pxa25x_device_pwm1, 349 &pxa25x_device_pwm1,
333}; 350 &pxa_device_asoc_platform,
334
335static struct sys_device pxa25x_sysdev[] = {
336 {
337 .cls = &pxa_irq_sysclass,
338 }, {
339 .cls = &pxa2xx_mfp_sysclass,
340 }, {
341 .cls = &pxa_gpio_sysclass,
342 },
343}; 351};
344 352
345static int __init pxa25x_init(void) 353static int __init pxa25x_init(void)
346{ 354{
347 int i, ret = 0; 355 int ret = 0;
348 356
349 if (cpu_is_pxa25x()) { 357 if (cpu_is_pxa25x()) {
350 358
@@ -357,11 +365,10 @@ static int __init pxa25x_init(void)
357 365
358 pxa25x_init_pm(); 366 pxa25x_init_pm();
359 367
360 for (i = 0; i < ARRAY_SIZE(pxa25x_sysdev); i++) { 368 register_syscore_ops(&pxa_irq_syscore_ops);
361 ret = sysdev_register(&pxa25x_sysdev[i]); 369 register_syscore_ops(&pxa2xx_mfp_syscore_ops);
362 if (ret) 370 register_syscore_ops(&pxa_gpio_syscore_ops);
363 pr_err("failed to register sysdev[%d]\n", i); 371 register_syscore_ops(&pxa2xx_clock_syscore_ops);
364 }
365 372
366 ret = platform_add_devices(pxa25x_devices, 373 ret = platform_add_devices(pxa25x_devices,
367 ARRAY_SIZE(pxa25x_devices)); 374 ARRAY_SIZE(pxa25x_devices));
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 12e5b9f01e6f..2fecbec58d88 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -16,8 +16,12 @@
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/suspend.h> 17#include <linux/suspend.h>
18#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19#include <linux/sysdev.h> 19#include <linux/syscore_ops.h>
20#include <linux/io.h>
21#include <linux/irq.h>
22#include <linux/i2c/pxa-i2c.h>
20 23
24#include <asm/mach/map.h>
21#include <mach/hardware.h> 25#include <mach/hardware.h>
22#include <asm/irq.h> 26#include <asm/irq.h>
23#include <mach/irqs.h> 27#include <mach/irqs.h>
@@ -27,7 +31,7 @@
27#include <mach/ohci.h> 31#include <mach/ohci.h>
28#include <mach/pm.h> 32#include <mach/pm.h>
29#include <mach/dma.h> 33#include <mach/dma.h>
30#include <plat/i2c.h> 34#include <mach/smemc.h>
31 35
32#include "generic.h" 36#include "generic.h"
33#include "devices.h" 37#include "devices.h"
@@ -107,10 +111,9 @@ unsigned int pxa27x_get_clk_frequency_khz(int info)
107} 111}
108 112
109/* 113/*
110 * Return the current mem clock frequency in units of 10kHz as 114 * Return the current mem clock frequency as reflected by CCCR[A], B, and L
111 * reflected by CCCR[A], B, and L
112 */ 115 */
113unsigned int pxa27x_get_memclk_frequency_10khz(void) 116static unsigned long clk_pxa27x_mem_getrate(struct clk *clk)
114{ 117{
115 unsigned long ccsr, clkcfg; 118 unsigned long ccsr, clkcfg;
116 unsigned int l, L, m, M; 119 unsigned int l, L, m, M;
@@ -129,9 +132,15 @@ unsigned int pxa27x_get_memclk_frequency_10khz(void)
129 L = l * BASE_CLK; 132 L = l * BASE_CLK;
130 M = (!cccr_a) ? (L/m) : ((b) ? L : (L/2)); 133 M = (!cccr_a) ? (L/m) : ((b) ? L : (L/2));
131 134
132 return (M / 10000); 135 return M;
133} 136}
134 137
138static const struct clkops clk_pxa27x_mem_ops = {
139 .enable = clk_dummy_enable,
140 .disable = clk_dummy_disable,
141 .getrate = clk_pxa27x_mem_getrate,
142};
143
135/* 144/*
136 * Return the current LCD clock frequency in units of 10kHz as 145 * Return the current LCD clock frequency in units of 10kHz as
137 */ 146 */
@@ -157,36 +166,38 @@ static unsigned long clk_pxa27x_lcd_getrate(struct clk *clk)
157} 166}
158 167
159static const struct clkops clk_pxa27x_lcd_ops = { 168static const struct clkops clk_pxa27x_lcd_ops = {
160 .enable = clk_cken_enable, 169 .enable = clk_pxa2xx_cken_enable,
161 .disable = clk_cken_disable, 170 .disable = clk_pxa2xx_cken_disable,
162 .getrate = clk_pxa27x_lcd_getrate, 171 .getrate = clk_pxa27x_lcd_getrate,
163}; 172};
164 173
174static DEFINE_PXA2_CKEN(pxa27x_ffuart, FFUART, 14857000, 1);
175static DEFINE_PXA2_CKEN(pxa27x_btuart, BTUART, 14857000, 1);
176static DEFINE_PXA2_CKEN(pxa27x_stuart, STUART, 14857000, 1);
177static DEFINE_PXA2_CKEN(pxa27x_i2s, I2S, 14682000, 0);
178static DEFINE_PXA2_CKEN(pxa27x_i2c, I2C, 32842000, 0);
179static DEFINE_PXA2_CKEN(pxa27x_usb, USB, 48000000, 5);
180static DEFINE_PXA2_CKEN(pxa27x_mmc, MMC, 19500000, 0);
181static DEFINE_PXA2_CKEN(pxa27x_ficp, FICP, 48000000, 0);
182static DEFINE_PXA2_CKEN(pxa27x_usbhost, USBHOST, 48000000, 0);
183static DEFINE_PXA2_CKEN(pxa27x_pwri2c, PWRI2C, 13000000, 0);
184static DEFINE_PXA2_CKEN(pxa27x_keypad, KEYPAD, 32768, 0);
185static DEFINE_PXA2_CKEN(pxa27x_ssp1, SSP1, 13000000, 0);
186static DEFINE_PXA2_CKEN(pxa27x_ssp2, SSP2, 13000000, 0);
187static DEFINE_PXA2_CKEN(pxa27x_ssp3, SSP3, 13000000, 0);
188static DEFINE_PXA2_CKEN(pxa27x_pwm0, PWM0, 13000000, 0);
189static DEFINE_PXA2_CKEN(pxa27x_pwm1, PWM1, 13000000, 0);
190static DEFINE_PXA2_CKEN(pxa27x_ac97, AC97, 24576000, 0);
191static DEFINE_PXA2_CKEN(pxa27x_ac97conf, AC97CONF, 24576000, 0);
192static DEFINE_PXA2_CKEN(pxa27x_msl, MSL, 48000000, 0);
193static DEFINE_PXA2_CKEN(pxa27x_usim, USIM, 48000000, 0);
194static DEFINE_PXA2_CKEN(pxa27x_memstk, MEMSTK, 19500000, 0);
195static DEFINE_PXA2_CKEN(pxa27x_im, IM, 0, 0);
196static DEFINE_PXA2_CKEN(pxa27x_memc, MEMC, 0, 0);
197
165static DEFINE_CK(pxa27x_lcd, LCD, &clk_pxa27x_lcd_ops); 198static DEFINE_CK(pxa27x_lcd, LCD, &clk_pxa27x_lcd_ops);
166static DEFINE_CK(pxa27x_camera, CAMERA, &clk_pxa27x_lcd_ops); 199static DEFINE_CK(pxa27x_camera, CAMERA, &clk_pxa27x_lcd_ops);
167static DEFINE_CKEN(pxa27x_ffuart, FFUART, 14857000, 1); 200static DEFINE_CLK(pxa27x_mem, &clk_pxa27x_mem_ops, 0, 0);
168static DEFINE_CKEN(pxa27x_btuart, BTUART, 14857000, 1);
169static DEFINE_CKEN(pxa27x_stuart, STUART, 14857000, 1);
170static DEFINE_CKEN(pxa27x_i2s, I2S, 14682000, 0);
171static DEFINE_CKEN(pxa27x_i2c, I2C, 32842000, 0);
172static DEFINE_CKEN(pxa27x_usb, USB, 48000000, 5);
173static DEFINE_CKEN(pxa27x_mmc, MMC, 19500000, 0);
174static DEFINE_CKEN(pxa27x_ficp, FICP, 48000000, 0);
175static DEFINE_CKEN(pxa27x_usbhost, USBHOST, 48000000, 0);
176static DEFINE_CKEN(pxa27x_pwri2c, PWRI2C, 13000000, 0);
177static DEFINE_CKEN(pxa27x_keypad, KEYPAD, 32768, 0);
178static DEFINE_CKEN(pxa27x_ssp1, SSP1, 13000000, 0);
179static DEFINE_CKEN(pxa27x_ssp2, SSP2, 13000000, 0);
180static DEFINE_CKEN(pxa27x_ssp3, SSP3, 13000000, 0);
181static DEFINE_CKEN(pxa27x_pwm0, PWM0, 13000000, 0);
182static DEFINE_CKEN(pxa27x_pwm1, PWM1, 13000000, 0);
183static DEFINE_CKEN(pxa27x_ac97, AC97, 24576000, 0);
184static DEFINE_CKEN(pxa27x_ac97conf, AC97CONF, 24576000, 0);
185static DEFINE_CKEN(pxa27x_msl, MSL, 48000000, 0);
186static DEFINE_CKEN(pxa27x_usim, USIM, 48000000, 0);
187static DEFINE_CKEN(pxa27x_memstk, MEMSTK, 19500000, 0);
188static DEFINE_CKEN(pxa27x_im, IM, 0, 0);
189static DEFINE_CKEN(pxa27x_memc, MEMC, 0, 0);
190 201
191static struct clk_lookup pxa27x_clkregs[] = { 202static struct clk_lookup pxa27x_clkregs[] = {
192 INIT_CLKREG(&clk_pxa27x_lcd, "pxa2xx-fb", NULL), 203 INIT_CLKREG(&clk_pxa27x_lcd, "pxa2xx-fb", NULL),
@@ -215,6 +226,7 @@ static struct clk_lookup pxa27x_clkregs[] = {
215 INIT_CLKREG(&clk_pxa27x_memstk, NULL, "MSTKCLK"), 226 INIT_CLKREG(&clk_pxa27x_memstk, NULL, "MSTKCLK"),
216 INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"), 227 INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"),
217 INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"), 228 INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"),
229 INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL),
218}; 230};
219 231
220#ifdef CONFIG_PM 232#ifdef CONFIG_PM
@@ -246,7 +258,6 @@ int __init pxa27x_set_pwrmode(unsigned int mode)
246 */ 258 */
247enum { 259enum {
248 SLEEP_SAVE_PSTR, 260 SLEEP_SAVE_PSTR,
249 SLEEP_SAVE_CKEN,
250 SLEEP_SAVE_MDREFR, 261 SLEEP_SAVE_MDREFR,
251 SLEEP_SAVE_PCFR, 262 SLEEP_SAVE_PCFR,
252 SLEEP_SAVE_COUNT 263 SLEEP_SAVE_COUNT
@@ -254,21 +265,19 @@ enum {
254 265
255void pxa27x_cpu_pm_save(unsigned long *sleep_save) 266void pxa27x_cpu_pm_save(unsigned long *sleep_save)
256{ 267{
257 SAVE(MDREFR); 268 sleep_save[SLEEP_SAVE_MDREFR] = __raw_readl(MDREFR);
258 SAVE(PCFR); 269 SAVE(PCFR);
259 270
260 SAVE(CKEN);
261 SAVE(PSTR); 271 SAVE(PSTR);
262} 272}
263 273
264void pxa27x_cpu_pm_restore(unsigned long *sleep_save) 274void pxa27x_cpu_pm_restore(unsigned long *sleep_save)
265{ 275{
266 RESTORE(MDREFR); 276 __raw_writel(sleep_save[SLEEP_SAVE_MDREFR], MDREFR);
267 RESTORE(PCFR); 277 RESTORE(PCFR);
268 278
269 PSSR = PSSR_RDH | PSSR_PH; 279 PSSR = PSSR_RDH | PSSR_PH;
270 280
271 RESTORE(CKEN);
272 RESTORE(PSTR); 281 RESTORE(PSTR);
273} 282}
274 283
@@ -290,7 +299,7 @@ void pxa27x_cpu_pm_enter(suspend_state_t state)
290 pxa_cpu_standby(); 299 pxa_cpu_standby();
291 break; 300 break;
292 case PM_SUSPEND_MEM: 301 case PM_SUSPEND_MEM:
293 pxa27x_cpu_suspend(pwrmode); 302 pxa27x_cpu_suspend(pwrmode, PLAT_PHYS_OFFSET - PAGE_OFFSET);
294 break; 303 break;
295 } 304 }
296} 305}
@@ -303,7 +312,7 @@ static int pxa27x_cpu_pm_valid(suspend_state_t state)
303static int pxa27x_cpu_pm_prepare(void) 312static int pxa27x_cpu_pm_prepare(void)
304{ 313{
305 /* set resume return address */ 314 /* set resume return address */
306 PSPR = virt_to_phys(pxa_cpu_resume); 315 PSPR = virt_to_phys(cpu_resume);
307 return 0; 316 return 0;
308} 317}
309 318
@@ -334,18 +343,18 @@ static inline void pxa27x_init_pm(void) {}
334/* PXA27x: Various gpios can issue wakeup events. This logic only 343/* PXA27x: Various gpios can issue wakeup events. This logic only
335 * handles the simple cases, not the WEMUX2 and WEMUX3 options 344 * handles the simple cases, not the WEMUX2 and WEMUX3 options
336 */ 345 */
337static int pxa27x_set_wake(unsigned int irq, unsigned int on) 346static int pxa27x_set_wake(struct irq_data *d, unsigned int on)
338{ 347{
339 int gpio = IRQ_TO_GPIO(irq); 348 int gpio = irq_to_gpio(d->irq);
340 uint32_t mask; 349 uint32_t mask;
341 350
342 if (gpio >= 0 && gpio < 128) 351 if (gpio >= 0 && gpio < 128)
343 return gpio_set_wake(gpio, on); 352 return gpio_set_wake(gpio, on);
344 353
345 if (irq == IRQ_KEYPAD) 354 if (d->irq == IRQ_KEYPAD)
346 return keypad_set_wake(on); 355 return keypad_set_wake(on);
347 356
348 switch (irq) { 357 switch (d->irq) {
349 case IRQ_RTCAlrm: 358 case IRQ_RTCAlrm:
350 mask = PWER_RTC; 359 mask = PWER_RTC;
351 break; 360 break;
@@ -370,6 +379,27 @@ void __init pxa27x_init_irq(void)
370 pxa_init_gpio(IRQ_GPIO_2_x, 2, 120, pxa27x_set_wake); 379 pxa_init_gpio(IRQ_GPIO_2_x, 2, 120, pxa27x_set_wake);
371} 380}
372 381
382static struct map_desc pxa27x_io_desc[] __initdata = {
383 { /* Mem Ctl */
384 .virtual = SMEMC_VIRT,
385 .pfn = __phys_to_pfn(PXA2XX_SMEMC_BASE),
386 .length = 0x00200000,
387 .type = MT_DEVICE
388 }, { /* IMem ctl */
389 .virtual = 0xfe000000,
390 .pfn = __phys_to_pfn(0x58000000),
391 .length = 0x00100000,
392 .type = MT_DEVICE
393 },
394};
395
396void __init pxa27x_map_io(void)
397{
398 pxa_map_io();
399 iotable_init(ARRAY_AND_SIZE(pxa27x_io_desc));
400 pxa27x_get_clk_frequency_khz(1);
401}
402
373/* 403/*
374 * device registration specific to PXA27x. 404 * device registration specific to PXA27x.
375 */ 405 */
@@ -385,6 +415,10 @@ static struct platform_device *devices[] __initdata = {
385 &pxa27x_device_udc, 415 &pxa27x_device_udc,
386 &pxa_device_pmu, 416 &pxa_device_pmu,
387 &pxa_device_i2s, 417 &pxa_device_i2s,
418 &pxa_device_asoc_ssp1,
419 &pxa_device_asoc_ssp2,
420 &pxa_device_asoc_ssp3,
421 &pxa_device_asoc_platform,
388 &sa1100_device_rtc, 422 &sa1100_device_rtc,
389 &pxa_device_rtc, 423 &pxa_device_rtc,
390 &pxa27x_device_ssp1, 424 &pxa27x_device_ssp1,
@@ -394,19 +428,9 @@ static struct platform_device *devices[] __initdata = {
394 &pxa27x_device_pwm1, 428 &pxa27x_device_pwm1,
395}; 429};
396 430
397static struct sys_device pxa27x_sysdev[] = {
398 {
399 .cls = &pxa_irq_sysclass,
400 }, {
401 .cls = &pxa2xx_mfp_sysclass,
402 }, {
403 .cls = &pxa_gpio_sysclass,
404 },
405};
406
407static int __init pxa27x_init(void) 431static int __init pxa27x_init(void)
408{ 432{
409 int i, ret = 0; 433 int ret = 0;
410 434
411 if (cpu_is_pxa27x()) { 435 if (cpu_is_pxa27x()) {
412 436
@@ -419,11 +443,10 @@ static int __init pxa27x_init(void)
419 443
420 pxa27x_init_pm(); 444 pxa27x_init_pm();
421 445
422 for (i = 0; i < ARRAY_SIZE(pxa27x_sysdev); i++) { 446 register_syscore_ops(&pxa_irq_syscore_ops);
423 ret = sysdev_register(&pxa27x_sysdev[i]); 447 register_syscore_ops(&pxa2xx_mfp_syscore_ops);
424 if (ret) 448 register_syscore_ops(&pxa_gpio_syscore_ops);
425 pr_err("failed to register sysdev[%d]\n", i); 449 register_syscore_ops(&pxa2xx_clock_syscore_ops);
426 }
427 450
428 ret = platform_add_devices(devices, ARRAY_SIZE(devices)); 451 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
429 } 452 }
diff --git a/arch/arm/mach-pxa/pxa3xx-ulpi.c b/arch/arm/mach-pxa/pxa3xx-ulpi.c
new file mode 100644
index 000000000000..ce7168b233e2
--- /dev/null
+++ b/arch/arm/mach-pxa/pxa3xx-ulpi.c
@@ -0,0 +1,400 @@
1/*
2 * linux/arch/arm/mach-pxa/pxa3xx-ulpi.c
3 *
4 * code specific to pxa3xx aka Monahans
5 *
6 * Copyright (C) 2010 CompuLab Ltd.
7 *
8 * 2010-13-07: Igor Grinberg <grinberg@compulab.co.il>
9 * initial version: pxa310 USB Host mode support
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/module.h>
17#include <linux/kernel.h>
18#include <linux/slab.h>
19#include <linux/device.h>
20#include <linux/platform_device.h>
21#include <linux/err.h>
22#include <linux/io.h>
23#include <linux/delay.h>
24#include <linux/clk.h>
25#include <linux/usb.h>
26#include <linux/usb/otg.h>
27
28#include <mach/hardware.h>
29#include <mach/regs-u2d.h>
30#include <mach/pxa3xx-u2d.h>
31
32struct pxa3xx_u2d_ulpi {
33 struct clk *clk;
34 void __iomem *mmio_base;
35
36 struct otg_transceiver *otg;
37 unsigned int ulpi_mode;
38};
39
40static struct pxa3xx_u2d_ulpi *u2d;
41
42static inline u32 u2d_readl(u32 reg)
43{
44 return __raw_readl(u2d->mmio_base + reg);
45}
46
47static inline void u2d_writel(u32 reg, u32 val)
48{
49 __raw_writel(val, u2d->mmio_base + reg);
50}
51
52#if defined(CONFIG_PXA310_ULPI)
53enum u2d_ulpi_phy_mode {
54 SYNCH = 0,
55 CARKIT = (1 << 0),
56 SER_3PIN = (1 << 1),
57 SER_6PIN = (1 << 2),
58 LOWPOWER = (1 << 3),
59};
60
61static inline enum u2d_ulpi_phy_mode pxa310_ulpi_get_phymode(void)
62{
63 return (u2d_readl(U2DOTGUSR) >> 28) & 0xF;
64}
65
66static int pxa310_ulpi_poll(void)
67{
68 int timeout = 50000;
69
70 while (timeout--) {
71 if (!(u2d_readl(U2DOTGUCR) & U2DOTGUCR_RUN))
72 return 0;
73
74 cpu_relax();
75 }
76
77 pr_warning("%s: ULPI access timed out!\n", __func__);
78
79 return -ETIMEDOUT;
80}
81
82static int pxa310_ulpi_read(struct otg_transceiver *otg, u32 reg)
83{
84 int err;
85
86 if (pxa310_ulpi_get_phymode() != SYNCH) {
87 pr_warning("%s: PHY is not in SYNCH mode!\n", __func__);
88 return -EBUSY;
89 }
90
91 u2d_writel(U2DOTGUCR, U2DOTGUCR_RUN | U2DOTGUCR_RNW | (reg << 16));
92 msleep(5);
93
94 err = pxa310_ulpi_poll();
95 if (err)
96 return err;
97
98 return u2d_readl(U2DOTGUCR) & U2DOTGUCR_RDATA;
99}
100
101static int pxa310_ulpi_write(struct otg_transceiver *otg, u32 val, u32 reg)
102{
103 if (pxa310_ulpi_get_phymode() != SYNCH) {
104 pr_warning("%s: PHY is not in SYNCH mode!\n", __func__);
105 return -EBUSY;
106 }
107
108 u2d_writel(U2DOTGUCR, U2DOTGUCR_RUN | (reg << 16) | (val << 8));
109 msleep(5);
110
111 return pxa310_ulpi_poll();
112}
113
114struct otg_io_access_ops pxa310_ulpi_access_ops = {
115 .read = pxa310_ulpi_read,
116 .write = pxa310_ulpi_write,
117};
118
119static void pxa310_otg_transceiver_rtsm(void)
120{
121 u32 u2dotgcr;
122
123 /* put PHY to sync mode */
124 u2dotgcr = u2d_readl(U2DOTGCR);
125 u2dotgcr |= U2DOTGCR_RTSM | U2DOTGCR_UTMID;
126 u2d_writel(U2DOTGCR, u2dotgcr);
127 msleep(10);
128
129 /* setup OTG sync mode */
130 u2dotgcr = u2d_readl(U2DOTGCR);
131 u2dotgcr |= U2DOTGCR_ULAF;
132 u2dotgcr &= ~(U2DOTGCR_SMAF | U2DOTGCR_CKAF);
133 u2d_writel(U2DOTGCR, u2dotgcr);
134}
135
136static int pxa310_start_otg_host_transcvr(struct usb_bus *host)
137{
138 int err;
139
140 pxa310_otg_transceiver_rtsm();
141
142 err = otg_init(u2d->otg);
143 if (err) {
144 pr_err("OTG transceiver init failed");
145 return err;
146 }
147
148 err = otg_set_vbus(u2d->otg, 1);
149 if (err) {
150 pr_err("OTG transceiver VBUS set failed");
151 return err;
152 }
153
154 err = otg_set_host(u2d->otg, host);
155 if (err)
156 pr_err("OTG transceiver Host mode set failed");
157
158 return err;
159}
160
161static int pxa310_start_otg_hc(struct usb_bus *host)
162{
163 u32 u2dotgcr;
164 int err;
165
166 /* disable USB device controller */
167 u2d_writel(U2DCR, u2d_readl(U2DCR) & ~U2DCR_UDE);
168 u2d_writel(U2DOTGCR, u2d_readl(U2DOTGCR) | U2DOTGCR_UTMID);
169 u2d_writel(U2DOTGICR, u2d_readl(U2DOTGICR) & ~0x37F7F);
170
171 err = pxa310_start_otg_host_transcvr(host);
172 if (err)
173 return err;
174
175 /* set xceiver mode */
176 if (u2d->ulpi_mode & ULPI_IC_6PIN_SERIAL)
177 u2d_writel(U2DP3CR, u2d_readl(U2DP3CR) & ~U2DP3CR_P2SS);
178 else if (u2d->ulpi_mode & ULPI_IC_3PIN_SERIAL)
179 u2d_writel(U2DP3CR, u2d_readl(U2DP3CR) | U2DP3CR_P2SS);
180
181 /* start OTG host controller */
182 u2dotgcr = u2d_readl(U2DOTGCR) | U2DOTGCR_SMAF;
183 u2d_writel(U2DOTGCR, u2dotgcr & ~(U2DOTGCR_ULAF | U2DOTGCR_CKAF));
184
185 return 0;
186}
187
188static void pxa310_stop_otg_hc(void)
189{
190 pxa310_otg_transceiver_rtsm();
191
192 otg_set_host(u2d->otg, NULL);
193 otg_set_vbus(u2d->otg, 0);
194 otg_shutdown(u2d->otg);
195}
196
197static void pxa310_u2d_setup_otg_hc(void)
198{
199 u32 u2dotgcr;
200
201 u2dotgcr = u2d_readl(U2DOTGCR);
202 u2dotgcr |= U2DOTGCR_ULAF | U2DOTGCR_UTMID;
203 u2dotgcr &= ~(U2DOTGCR_SMAF | U2DOTGCR_CKAF);
204 u2d_writel(U2DOTGCR, u2dotgcr);
205 msleep(5);
206 u2d_writel(U2DOTGCR, u2dotgcr | U2DOTGCR_ULE);
207 msleep(5);
208 u2d_writel(U2DOTGICR, u2d_readl(U2DOTGICR) & ~0x37F7F);
209}
210
211static int pxa310_otg_init(struct pxa3xx_u2d_platform_data *pdata)
212{
213 unsigned int ulpi_mode = ULPI_OTG_DRVVBUS;
214
215 if (pdata) {
216 if (pdata->ulpi_mode & ULPI_SER_6PIN)
217 ulpi_mode |= ULPI_IC_6PIN_SERIAL;
218 else if (pdata->ulpi_mode & ULPI_SER_3PIN)
219 ulpi_mode |= ULPI_IC_3PIN_SERIAL;
220 }
221
222 u2d->ulpi_mode = ulpi_mode;
223
224 u2d->otg = otg_ulpi_create(&pxa310_ulpi_access_ops, ulpi_mode);
225 if (!u2d->otg)
226 return -ENOMEM;
227
228 u2d->otg->io_priv = u2d->mmio_base;
229
230 return 0;
231}
232
233static void pxa310_otg_exit(void)
234{
235 kfree(u2d->otg);
236}
237#else
238static inline void pxa310_u2d_setup_otg_hc(void) {}
239static inline int pxa310_start_otg_hc(struct usb_bus *host)
240{
241 return 0;
242}
243static inline void pxa310_stop_otg_hc(void) {}
244static inline int pxa310_otg_init(struct pxa3xx_u2d_platform_data *pdata)
245{
246 return 0;
247}
248static inline void pxa310_otg_exit(void) {}
249#endif /* CONFIG_PXA310_ULPI */
250
251int pxa3xx_u2d_start_hc(struct usb_bus *host)
252{
253 int err = 0;
254
255 /* In case the PXA3xx ULPI isn't used, do nothing. */
256 if (!u2d)
257 return 0;
258
259 clk_enable(u2d->clk);
260
261 if (cpu_is_pxa310()) {
262 pxa310_u2d_setup_otg_hc();
263 err = pxa310_start_otg_hc(host);
264 }
265
266 return err;
267}
268
269void pxa3xx_u2d_stop_hc(struct usb_bus *host)
270{
271 /* In case the PXA3xx ULPI isn't used, do nothing. */
272 if (!u2d)
273 return;
274
275 if (cpu_is_pxa310())
276 pxa310_stop_otg_hc();
277
278 clk_disable(u2d->clk);
279}
280
281static int pxa3xx_u2d_probe(struct platform_device *pdev)
282{
283 struct pxa3xx_u2d_platform_data *pdata = pdev->dev.platform_data;
284 struct resource *r;
285 int err;
286
287 u2d = kzalloc(sizeof(struct pxa3xx_u2d_ulpi), GFP_KERNEL);
288 if (!u2d) {
289 dev_err(&pdev->dev, "failed to allocate memory\n");
290 return -ENOMEM;
291 }
292
293 u2d->clk = clk_get(&pdev->dev, NULL);
294 if (IS_ERR(u2d->clk)) {
295 dev_err(&pdev->dev, "failed to get u2d clock\n");
296 err = PTR_ERR(u2d->clk);
297 goto err_free_mem;
298 }
299
300 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
301 if (!r) {
302 dev_err(&pdev->dev, "no IO memory resource defined\n");
303 err = -ENODEV;
304 goto err_put_clk;
305 }
306
307 r = request_mem_region(r->start, resource_size(r), pdev->name);
308 if (!r) {
309 dev_err(&pdev->dev, "failed to request memory resource\n");
310 err = -EBUSY;
311 goto err_put_clk;
312 }
313
314 u2d->mmio_base = ioremap(r->start, resource_size(r));
315 if (!u2d->mmio_base) {
316 dev_err(&pdev->dev, "ioremap() failed\n");
317 err = -ENODEV;
318 goto err_free_res;
319 }
320
321 if (pdata->init) {
322 err = pdata->init(&pdev->dev);
323 if (err)
324 goto err_free_io;
325 }
326
327 /* Only PXA310 U2D has OTG functionality */
328 if (cpu_is_pxa310()) {
329 err = pxa310_otg_init(pdata);
330 if (err)
331 goto err_free_plat;
332 }
333
334 platform_set_drvdata(pdev, &u2d);
335
336 return 0;
337
338err_free_plat:
339 if (pdata->exit)
340 pdata->exit(&pdev->dev);
341err_free_io:
342 iounmap(u2d->mmio_base);
343err_free_res:
344 release_mem_region(r->start, resource_size(r));
345err_put_clk:
346 clk_put(u2d->clk);
347err_free_mem:
348 kfree(u2d);
349 return err;
350}
351
352static int pxa3xx_u2d_remove(struct platform_device *pdev)
353{
354 struct pxa3xx_u2d_platform_data *pdata = pdev->dev.platform_data;
355 struct resource *r;
356
357 if (cpu_is_pxa310()) {
358 pxa310_stop_otg_hc();
359 pxa310_otg_exit();
360 }
361
362 if (pdata->exit)
363 pdata->exit(&pdev->dev);
364
365 platform_set_drvdata(pdev, NULL);
366 iounmap(u2d->mmio_base);
367 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
368 release_mem_region(r->start, resource_size(r));
369
370 clk_put(u2d->clk);
371
372 kfree(u2d);
373
374 return 0;
375}
376
377static struct platform_driver pxa3xx_u2d_ulpi_driver = {
378 .driver = {
379 .name = "pxa3xx-u2d",
380 .owner = THIS_MODULE,
381 },
382 .probe = pxa3xx_u2d_probe,
383 .remove = pxa3xx_u2d_remove,
384};
385
386static int pxa3xx_u2d_ulpi_init(void)
387{
388 return platform_driver_register(&pxa3xx_u2d_ulpi_driver);
389}
390module_init(pxa3xx_u2d_ulpi_init);
391
392static void __exit pxa3xx_u2d_ulpi_exit(void)
393{
394 platform_driver_unregister(&pxa3xx_u2d_ulpi_driver);
395}
396module_exit(pxa3xx_u2d_ulpi_exit);
397
398MODULE_DESCRIPTION("PXA3xx U2D ULPI driver");
399MODULE_AUTHOR("Igor Grinberg");
400MODULE_LICENSE("GPL v2");
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index fa0014847c71..8521d7d6f1da 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -20,8 +20,10 @@
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <linux/irq.h> 21#include <linux/irq.h>
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/sysdev.h> 23#include <linux/syscore_ops.h>
24#include <linux/i2c/pxa-i2c.h>
24 25
26#include <asm/mach/map.h>
25#include <mach/hardware.h> 27#include <mach/hardware.h>
26#include <mach/gpio.h> 28#include <mach/gpio.h>
27#include <mach/pxa3xx-regs.h> 29#include <mach/pxa3xx-regs.h>
@@ -30,210 +32,15 @@
30#include <mach/pm.h> 32#include <mach/pm.h>
31#include <mach/dma.h> 33#include <mach/dma.h>
32#include <mach/regs-intc.h> 34#include <mach/regs-intc.h>
33#include <plat/i2c.h> 35#include <mach/smemc.h>
34 36
35#include "generic.h" 37#include "generic.h"
36#include "devices.h" 38#include "devices.h"
37#include "clock.h" 39#include "clock.h"
38 40
39/* Crystal clock: 13MHz */
40#define BASE_CLK 13000000
41
42/* Ring Oscillator Clock: 60MHz */
43#define RO_CLK 60000000
44
45#define ACCR_D0CS (1 << 26)
46#define ACCR_PCCE (1 << 11)
47
48#define PECR_IE(n) ((1 << ((n) * 2)) << 28) 41#define PECR_IE(n) ((1 << ((n) * 2)) << 28)
49#define PECR_IS(n) ((1 << ((n) * 2)) << 29) 42#define PECR_IS(n) ((1 << ((n) * 2)) << 29)
50 43
51/* crystal frequency to static memory controller multiplier (SMCFS) */
52static unsigned char smcfs_mult[8] = { 6, 0, 8, 0, 0, 16, };
53
54/* crystal frequency to HSIO bus frequency multiplier (HSS) */
55static unsigned char hss_mult[4] = { 8, 12, 16, 24 };
56
57/*
58 * Get the clock frequency as reflected by CCSR and the turbo flag.
59 * We assume these values have been applied via a fcs.
60 * If info is not 0 we also display the current settings.
61 */
62unsigned int pxa3xx_get_clk_frequency_khz(int info)
63{
64 unsigned long acsr, xclkcfg;
65 unsigned int t, xl, xn, hss, ro, XL, XN, CLK, HSS;
66
67 /* Read XCLKCFG register turbo bit */
68 __asm__ __volatile__("mrc\tp14, 0, %0, c6, c0, 0" : "=r"(xclkcfg));
69 t = xclkcfg & 0x1;
70
71 acsr = ACSR;
72
73 xl = acsr & 0x1f;
74 xn = (acsr >> 8) & 0x7;
75 hss = (acsr >> 14) & 0x3;
76
77 XL = xl * BASE_CLK;
78 XN = xn * XL;
79
80 ro = acsr & ACCR_D0CS;
81
82 CLK = (ro) ? RO_CLK : ((t) ? XN : XL);
83 HSS = (ro) ? RO_CLK : hss_mult[hss] * BASE_CLK;
84
85 if (info) {
86 pr_info("RO Mode clock: %d.%02dMHz (%sactive)\n",
87 RO_CLK / 1000000, (RO_CLK % 1000000) / 10000,
88 (ro) ? "" : "in");
89 pr_info("Run Mode clock: %d.%02dMHz (*%d)\n",
90 XL / 1000000, (XL % 1000000) / 10000, xl);
91 pr_info("Turbo Mode clock: %d.%02dMHz (*%d, %sactive)\n",
92 XN / 1000000, (XN % 1000000) / 10000, xn,
93 (t) ? "" : "in");
94 pr_info("HSIO bus clock: %d.%02dMHz\n",
95 HSS / 1000000, (HSS % 1000000) / 10000);
96 }
97
98 return CLK / 1000;
99}
100
101/*
102 * Return the current static memory controller clock frequency
103 * in units of 10kHz
104 */
105unsigned int pxa3xx_get_memclk_frequency_10khz(void)
106{
107 unsigned long acsr;
108 unsigned int smcfs, clk = 0;
109
110 acsr = ACSR;
111
112 smcfs = (acsr >> 23) & 0x7;
113 clk = (acsr & ACCR_D0CS) ? RO_CLK : smcfs_mult[smcfs] * BASE_CLK;
114
115 return (clk / 10000);
116}
117
118void pxa3xx_clear_reset_status(unsigned int mask)
119{
120 /* RESET_STATUS_* has a 1:1 mapping with ARSR */
121 ARSR = mask;
122}
123
124/*
125 * Return the current AC97 clock frequency.
126 */
127static unsigned long clk_pxa3xx_ac97_getrate(struct clk *clk)
128{
129 unsigned long rate = 312000000;
130 unsigned long ac97_div;
131
132 ac97_div = AC97_DIV;
133
134 /* This may loose precision for some rates but won't for the
135 * standard 24.576MHz.
136 */
137 rate /= (ac97_div >> 12) & 0x7fff;
138 rate *= (ac97_div & 0xfff);
139
140 return rate;
141}
142
143/*
144 * Return the current HSIO bus clock frequency
145 */
146static unsigned long clk_pxa3xx_hsio_getrate(struct clk *clk)
147{
148 unsigned long acsr;
149 unsigned int hss, hsio_clk;
150
151 acsr = ACSR;
152
153 hss = (acsr >> 14) & 0x3;
154 hsio_clk = (acsr & ACCR_D0CS) ? RO_CLK : hss_mult[hss] * BASE_CLK;
155
156 return hsio_clk;
157}
158
159void clk_pxa3xx_cken_enable(struct clk *clk)
160{
161 unsigned long mask = 1ul << (clk->cken & 0x1f);
162
163 if (clk->cken < 32)
164 CKENA |= mask;
165 else
166 CKENB |= mask;
167}
168
169void clk_pxa3xx_cken_disable(struct clk *clk)
170{
171 unsigned long mask = 1ul << (clk->cken & 0x1f);
172
173 if (clk->cken < 32)
174 CKENA &= ~mask;
175 else
176 CKENB &= ~mask;
177}
178
179const struct clkops clk_pxa3xx_cken_ops = {
180 .enable = clk_pxa3xx_cken_enable,
181 .disable = clk_pxa3xx_cken_disable,
182};
183
184static const struct clkops clk_pxa3xx_hsio_ops = {
185 .enable = clk_pxa3xx_cken_enable,
186 .disable = clk_pxa3xx_cken_disable,
187 .getrate = clk_pxa3xx_hsio_getrate,
188};
189
190static const struct clkops clk_pxa3xx_ac97_ops = {
191 .enable = clk_pxa3xx_cken_enable,
192 .disable = clk_pxa3xx_cken_disable,
193 .getrate = clk_pxa3xx_ac97_getrate,
194};
195
196static void clk_pout_enable(struct clk *clk)
197{
198 OSCC |= OSCC_PEN;
199}
200
201static void clk_pout_disable(struct clk *clk)
202{
203 OSCC &= ~OSCC_PEN;
204}
205
206static const struct clkops clk_pout_ops = {
207 .enable = clk_pout_enable,
208 .disable = clk_pout_disable,
209};
210
211static void clk_dummy_enable(struct clk *clk)
212{
213}
214
215static void clk_dummy_disable(struct clk *clk)
216{
217}
218
219static const struct clkops clk_dummy_ops = {
220 .enable = clk_dummy_enable,
221 .disable = clk_dummy_disable,
222};
223
224static struct clk clk_pxa3xx_pout = {
225 .ops = &clk_pout_ops,
226 .rate = 13000000,
227 .delay = 70,
228};
229
230static struct clk clk_dummy = {
231 .ops = &clk_dummy_ops,
232};
233
234static DEFINE_PXA3_CK(pxa3xx_lcd, LCD, &clk_pxa3xx_hsio_ops);
235static DEFINE_PXA3_CK(pxa3xx_camera, CAMERA, &clk_pxa3xx_hsio_ops);
236static DEFINE_PXA3_CK(pxa3xx_ac97, AC97, &clk_pxa3xx_ac97_ops);
237static DEFINE_PXA3_CKEN(pxa3xx_ffuart, FFUART, 14857000, 1); 44static DEFINE_PXA3_CKEN(pxa3xx_ffuart, FFUART, 14857000, 1);
238static DEFINE_PXA3_CKEN(pxa3xx_btuart, BTUART, 14857000, 1); 45static DEFINE_PXA3_CKEN(pxa3xx_btuart, BTUART, 14857000, 1);
239static DEFINE_PXA3_CKEN(pxa3xx_stuart, STUART, 14857000, 1); 46static DEFINE_PXA3_CKEN(pxa3xx_stuart, STUART, 14857000, 1);
@@ -251,6 +58,12 @@ static DEFINE_PXA3_CKEN(pxa3xx_pwm1, PWM1, 13000000, 0);
251static DEFINE_PXA3_CKEN(pxa3xx_mmc1, MMC1, 19500000, 0); 58static DEFINE_PXA3_CKEN(pxa3xx_mmc1, MMC1, 19500000, 0);
252static DEFINE_PXA3_CKEN(pxa3xx_mmc2, MMC2, 19500000, 0); 59static DEFINE_PXA3_CKEN(pxa3xx_mmc2, MMC2, 19500000, 0);
253 60
61static DEFINE_CK(pxa3xx_lcd, LCD, &clk_pxa3xx_hsio_ops);
62static DEFINE_CK(pxa3xx_smemc, SMC, &clk_pxa3xx_smemc_ops);
63static DEFINE_CK(pxa3xx_camera, CAMERA, &clk_pxa3xx_hsio_ops);
64static DEFINE_CK(pxa3xx_ac97, AC97, &clk_pxa3xx_ac97_ops);
65static DEFINE_CLK(pxa3xx_pout, &clk_pxa3xx_pout_ops, 13000000, 70);
66
254static struct clk_lookup pxa3xx_clkregs[] = { 67static struct clk_lookup pxa3xx_clkregs[] = {
255 INIT_CLKREG(&clk_pxa3xx_pout, NULL, "CLK_POUT"), 68 INIT_CLKREG(&clk_pxa3xx_pout, NULL, "CLK_POUT"),
256 /* Power I2C clock is always on */ 69 /* Power I2C clock is always on */
@@ -265,7 +78,7 @@ static struct clk_lookup pxa3xx_clkregs[] = {
265 INIT_CLKREG(&clk_pxa3xx_i2c, "pxa2xx-i2c.0", NULL), 78 INIT_CLKREG(&clk_pxa3xx_i2c, "pxa2xx-i2c.0", NULL),
266 INIT_CLKREG(&clk_pxa3xx_udc, "pxa27x-udc", NULL), 79 INIT_CLKREG(&clk_pxa3xx_udc, "pxa27x-udc", NULL),
267 INIT_CLKREG(&clk_pxa3xx_usbh, "pxa27x-ohci", NULL), 80 INIT_CLKREG(&clk_pxa3xx_usbh, "pxa27x-ohci", NULL),
268 INIT_CLKREG(&clk_pxa3xx_u2d, NULL, "U2DCLK"), 81 INIT_CLKREG(&clk_pxa3xx_u2d, "pxa3xx-u2d", NULL),
269 INIT_CLKREG(&clk_pxa3xx_keypad, "pxa27x-keypad", NULL), 82 INIT_CLKREG(&clk_pxa3xx_keypad, "pxa27x-keypad", NULL),
270 INIT_CLKREG(&clk_pxa3xx_ssp1, "pxa27x-ssp.0", NULL), 83 INIT_CLKREG(&clk_pxa3xx_ssp1, "pxa27x-ssp.0", NULL),
271 INIT_CLKREG(&clk_pxa3xx_ssp2, "pxa27x-ssp.1", NULL), 84 INIT_CLKREG(&clk_pxa3xx_ssp2, "pxa27x-ssp.1", NULL),
@@ -275,6 +88,7 @@ static struct clk_lookup pxa3xx_clkregs[] = {
275 INIT_CLKREG(&clk_pxa3xx_pwm1, "pxa27x-pwm.1", NULL), 88 INIT_CLKREG(&clk_pxa3xx_pwm1, "pxa27x-pwm.1", NULL),
276 INIT_CLKREG(&clk_pxa3xx_mmc1, "pxa2xx-mci.0", NULL), 89 INIT_CLKREG(&clk_pxa3xx_mmc1, "pxa2xx-mci.0", NULL),
277 INIT_CLKREG(&clk_pxa3xx_mmc2, "pxa2xx-mci.1", NULL), 90 INIT_CLKREG(&clk_pxa3xx_mmc2, "pxa2xx-mci.1", NULL),
91 INIT_CLKREG(&clk_pxa3xx_smemc, "pxa2xx-pcmcia", NULL),
278}; 92};
279 93
280#ifdef CONFIG_PM 94#ifdef CONFIG_PM
@@ -285,30 +99,6 @@ static struct clk_lookup pxa3xx_clkregs[] = {
285static void __iomem *sram; 99static void __iomem *sram;
286static unsigned long wakeup_src; 100static unsigned long wakeup_src;
287 101
288#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
289#define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
290
291enum { SLEEP_SAVE_CKENA,
292 SLEEP_SAVE_CKENB,
293 SLEEP_SAVE_ACCR,
294
295 SLEEP_SAVE_COUNT,
296};
297
298static void pxa3xx_cpu_pm_save(unsigned long *sleep_save)
299{
300 SAVE(CKENA);
301 SAVE(CKENB);
302 SAVE(ACCR);
303}
304
305static void pxa3xx_cpu_pm_restore(unsigned long *sleep_save)
306{
307 RESTORE(ACCR);
308 RESTORE(CKENA);
309 RESTORE(CKENB);
310}
311
312/* 102/*
313 * Enter a standby mode (S0D1C2 or S0D2C2). Upon wakeup, the dynamic 103 * Enter a standby mode (S0D1C2 or S0D2C2). Upon wakeup, the dynamic
314 * memory controller has to be reinitialised, so we place some code 104 * memory controller has to be reinitialised, so we place some code
@@ -352,8 +142,7 @@ static void pxa3xx_cpu_pm_suspend(void)
352 volatile unsigned long *p = (volatile void *)0xc0000000; 142 volatile unsigned long *p = (volatile void *)0xc0000000;
353 unsigned long saved_data = *p; 143 unsigned long saved_data = *p;
354 144
355 extern void pxa3xx_cpu_suspend(void); 145 extern void pxa3xx_cpu_suspend(long);
356 extern void pxa3xx_cpu_resume(void);
357 146
358 /* resuming from D2 requires the HSIO2/BOOT/TPM clocks enabled */ 147 /* resuming from D2 requires the HSIO2/BOOT/TPM clocks enabled */
359 CKENA |= (1 << CKEN_BOOT) | (1 << CKEN_TPM); 148 CKENA |= (1 << CKEN_BOOT) | (1 << CKEN_TPM);
@@ -371,9 +160,9 @@ static void pxa3xx_cpu_pm_suspend(void)
371 PSPR = 0x5c014000; 160 PSPR = 0x5c014000;
372 161
373 /* overwrite with the resume address */ 162 /* overwrite with the resume address */
374 *p = virt_to_phys(pxa3xx_cpu_resume); 163 *p = virt_to_phys(cpu_resume);
375 164
376 pxa3xx_cpu_suspend(); 165 pxa3xx_cpu_suspend(PLAT_PHYS_OFFSET - PAGE_OFFSET);
377 166
378 *p = saved_data; 167 *p = saved_data;
379 168
@@ -407,9 +196,6 @@ static int pxa3xx_cpu_pm_valid(suspend_state_t state)
407} 196}
408 197
409static struct pxa_cpu_pm_fns pxa3xx_cpu_pm_fns = { 198static struct pxa_cpu_pm_fns pxa3xx_cpu_pm_fns = {
410 .save_count = SLEEP_SAVE_COUNT,
411 .save = pxa3xx_cpu_pm_save,
412 .restore = pxa3xx_cpu_pm_restore,
413 .valid = pxa3xx_cpu_pm_valid, 199 .valid = pxa3xx_cpu_pm_valid,
414 .enter = pxa3xx_cpu_pm_enter, 200 .enter = pxa3xx_cpu_pm_enter,
415}; 201};
@@ -442,11 +228,11 @@ static void __init pxa3xx_init_pm(void)
442 pxa_cpu_pm_fns = &pxa3xx_cpu_pm_fns; 228 pxa_cpu_pm_fns = &pxa3xx_cpu_pm_fns;
443} 229}
444 230
445static int pxa3xx_set_wake(unsigned int irq, unsigned int on) 231static int pxa3xx_set_wake(struct irq_data *d, unsigned int on)
446{ 232{
447 unsigned long flags, mask = 0; 233 unsigned long flags, mask = 0;
448 234
449 switch (irq) { 235 switch (d->irq) {
450 case IRQ_SSP3: 236 case IRQ_SSP3:
451 mask = ADXER_MFP_WSSP3; 237 mask = ADXER_MFP_WSSP3;
452 break; 238 break;
@@ -535,40 +321,40 @@ static inline void pxa3xx_init_pm(void) {}
535#define pxa3xx_set_wake NULL 321#define pxa3xx_set_wake NULL
536#endif 322#endif
537 323
538static void pxa_ack_ext_wakeup(unsigned int irq) 324static void pxa_ack_ext_wakeup(struct irq_data *d)
539{ 325{
540 PECR |= PECR_IS(irq - IRQ_WAKEUP0); 326 PECR |= PECR_IS(d->irq - IRQ_WAKEUP0);
541} 327}
542 328
543static void pxa_mask_ext_wakeup(unsigned int irq) 329static void pxa_mask_ext_wakeup(struct irq_data *d)
544{ 330{
545 ICMR2 &= ~(1 << ((irq - PXA_IRQ(0)) & 0x1f)); 331 ICMR2 &= ~(1 << ((d->irq - PXA_IRQ(0)) & 0x1f));
546 PECR &= ~PECR_IE(irq - IRQ_WAKEUP0); 332 PECR &= ~PECR_IE(d->irq - IRQ_WAKEUP0);
547} 333}
548 334
549static void pxa_unmask_ext_wakeup(unsigned int irq) 335static void pxa_unmask_ext_wakeup(struct irq_data *d)
550{ 336{
551 ICMR2 |= 1 << ((irq - PXA_IRQ(0)) & 0x1f); 337 ICMR2 |= 1 << ((d->irq - PXA_IRQ(0)) & 0x1f);
552 PECR |= PECR_IE(irq - IRQ_WAKEUP0); 338 PECR |= PECR_IE(d->irq - IRQ_WAKEUP0);
553} 339}
554 340
555static int pxa_set_ext_wakeup_type(unsigned int irq, unsigned int flow_type) 341static int pxa_set_ext_wakeup_type(struct irq_data *d, unsigned int flow_type)
556{ 342{
557 if (flow_type & IRQ_TYPE_EDGE_RISING) 343 if (flow_type & IRQ_TYPE_EDGE_RISING)
558 PWER |= 1 << (irq - IRQ_WAKEUP0); 344 PWER |= 1 << (d->irq - IRQ_WAKEUP0);
559 345
560 if (flow_type & IRQ_TYPE_EDGE_FALLING) 346 if (flow_type & IRQ_TYPE_EDGE_FALLING)
561 PWER |= 1 << (irq - IRQ_WAKEUP0 + 2); 347 PWER |= 1 << (d->irq - IRQ_WAKEUP0 + 2);
562 348
563 return 0; 349 return 0;
564} 350}
565 351
566static struct irq_chip pxa_ext_wakeup_chip = { 352static struct irq_chip pxa_ext_wakeup_chip = {
567 .name = "WAKEUP", 353 .name = "WAKEUP",
568 .ack = pxa_ack_ext_wakeup, 354 .irq_ack = pxa_ack_ext_wakeup,
569 .mask = pxa_mask_ext_wakeup, 355 .irq_mask = pxa_mask_ext_wakeup,
570 .unmask = pxa_unmask_ext_wakeup, 356 .irq_unmask = pxa_unmask_ext_wakeup,
571 .set_type = pxa_set_ext_wakeup_type, 357 .irq_set_type = pxa_set_ext_wakeup_type,
572}; 358};
573 359
574static void __init pxa_init_ext_wakeup_irq(set_wake_t fn) 360static void __init pxa_init_ext_wakeup_irq(set_wake_t fn)
@@ -576,12 +362,12 @@ static void __init pxa_init_ext_wakeup_irq(set_wake_t fn)
576 int irq; 362 int irq;
577 363
578 for (irq = IRQ_WAKEUP0; irq <= IRQ_WAKEUP1; irq++) { 364 for (irq = IRQ_WAKEUP0; irq <= IRQ_WAKEUP1; irq++) {
579 set_irq_chip(irq, &pxa_ext_wakeup_chip); 365 irq_set_chip_and_handler(irq, &pxa_ext_wakeup_chip,
580 set_irq_handler(irq, handle_edge_irq); 366 handle_edge_irq);
581 set_irq_flags(irq, IRQF_VALID); 367 set_irq_flags(irq, IRQF_VALID);
582 } 368 }
583 369
584 pxa_ext_wakeup_chip.set_wake = fn; 370 pxa_ext_wakeup_chip.irq_set_wake = fn;
585} 371}
586 372
587void __init pxa3xx_init_irq(void) 373void __init pxa3xx_init_irq(void)
@@ -597,6 +383,22 @@ void __init pxa3xx_init_irq(void)
597 pxa_init_gpio(IRQ_GPIO_2_x, 2, 127, NULL); 383 pxa_init_gpio(IRQ_GPIO_2_x, 2, 127, NULL);
598} 384}
599 385
386static struct map_desc pxa3xx_io_desc[] __initdata = {
387 { /* Mem Ctl */
388 .virtual = SMEMC_VIRT,
389 .pfn = __phys_to_pfn(PXA3XX_SMEMC_BASE),
390 .length = 0x00200000,
391 .type = MT_DEVICE
392 }
393};
394
395void __init pxa3xx_map_io(void)
396{
397 pxa_map_io();
398 iotable_init(ARRAY_AND_SIZE(pxa3xx_io_desc));
399 pxa3xx_get_clk_frequency_khz(1);
400}
401
600/* 402/*
601 * device registration specific to PXA3xx. 403 * device registration specific to PXA3xx.
602 */ 404 */
@@ -610,6 +412,11 @@ static struct platform_device *devices[] __initdata = {
610 &pxa27x_device_udc, 412 &pxa27x_device_udc,
611 &pxa_device_pmu, 413 &pxa_device_pmu,
612 &pxa_device_i2s, 414 &pxa_device_i2s,
415 &pxa_device_asoc_ssp1,
416 &pxa_device_asoc_ssp2,
417 &pxa_device_asoc_ssp3,
418 &pxa_device_asoc_ssp4,
419 &pxa_device_asoc_platform,
613 &sa1100_device_rtc, 420 &sa1100_device_rtc,
614 &pxa_device_rtc, 421 &pxa_device_rtc,
615 &pxa27x_device_ssp1, 422 &pxa27x_device_ssp1,
@@ -620,19 +427,9 @@ static struct platform_device *devices[] __initdata = {
620 &pxa27x_device_pwm1, 427 &pxa27x_device_pwm1,
621}; 428};
622 429
623static struct sys_device pxa3xx_sysdev[] = {
624 {
625 .cls = &pxa_irq_sysclass,
626 }, {
627 .cls = &pxa3xx_mfp_sysclass,
628 }, {
629 .cls = &pxa_gpio_sysclass,
630 },
631};
632
633static int __init pxa3xx_init(void) 430static int __init pxa3xx_init(void)
634{ 431{
635 int i, ret = 0; 432 int ret = 0;
636 433
637 if (cpu_is_pxa3xx()) { 434 if (cpu_is_pxa3xx()) {
638 435
@@ -653,11 +450,10 @@ static int __init pxa3xx_init(void)
653 450
654 pxa3xx_init_pm(); 451 pxa3xx_init_pm();
655 452
656 for (i = 0; i < ARRAY_SIZE(pxa3xx_sysdev); i++) { 453 register_syscore_ops(&pxa_irq_syscore_ops);
657 ret = sysdev_register(&pxa3xx_sysdev[i]); 454 register_syscore_ops(&pxa3xx_mfp_syscore_ops);
658 if (ret) 455 register_syscore_ops(&pxa_gpio_syscore_ops);
659 pr_err("failed to register sysdev[%d]\n", i); 456 register_syscore_ops(&pxa3xx_clock_syscore_ops);
660 }
661 457
662 ret = platform_add_devices(devices, ARRAY_SIZE(devices)); 458 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
663 } 459 }
diff --git a/arch/arm/mach-pxa/pxa930.c b/arch/arm/mach-pxa/pxa930.c
index 064292008288..8aeacf908784 100644
--- a/arch/arm/mach-pxa/pxa930.c
+++ b/arch/arm/mach-pxa/pxa930.c
@@ -192,7 +192,7 @@ static struct mfp_addr_map pxa935_mfp_addr_map[] __initdata = {
192 192
193static int __init pxa930_init(void) 193static int __init pxa930_init(void)
194{ 194{
195 if (cpu_is_pxa930() || cpu_is_pxa935()) { 195 if (cpu_is_pxa93x()) {
196 mfp_init_base(io_p2v(MFPR_BASE)); 196 mfp_init_base(io_p2v(MFPR_BASE));
197 mfp_init_addr(pxa930_mfp_addr_map); 197 mfp_init_addr(pxa930_mfp_addr_map);
198 } 198 }
diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c
new file mode 100644
index 000000000000..ecc82a330fad
--- /dev/null
+++ b/arch/arm/mach-pxa/pxa95x.c
@@ -0,0 +1,296 @@
1/*
2 * linux/arch/arm/mach-pxa/pxa95x.c
3 *
4 * code specific to PXA95x aka MGx
5 *
6 * Copyright (C) 2009-2010 Marvell International Ltd.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/pm.h>
17#include <linux/platform_device.h>
18#include <linux/i2c/pxa-i2c.h>
19#include <linux/irq.h>
20#include <linux/io.h>
21#include <linux/syscore_ops.h>
22
23#include <mach/hardware.h>
24#include <mach/gpio.h>
25#include <mach/pxa3xx-regs.h>
26#include <mach/pxa930.h>
27#include <mach/reset.h>
28#include <mach/pm.h>
29#include <mach/dma.h>
30#include <mach/regs-intc.h>
31
32#include "generic.h"
33#include "devices.h"
34#include "clock.h"
35
36static struct mfp_addr_map pxa95x_mfp_addr_map[] __initdata = {
37
38 MFP_ADDR(GPIO0, 0x02e0),
39 MFP_ADDR(GPIO1, 0x02dc),
40 MFP_ADDR(GPIO2, 0x02e8),
41 MFP_ADDR(GPIO3, 0x02d8),
42 MFP_ADDR(GPIO4, 0x02e4),
43 MFP_ADDR(GPIO5, 0x02ec),
44 MFP_ADDR(GPIO6, 0x02f8),
45 MFP_ADDR(GPIO7, 0x02fc),
46 MFP_ADDR(GPIO8, 0x0300),
47 MFP_ADDR(GPIO9, 0x02d4),
48 MFP_ADDR(GPIO10, 0x02f4),
49 MFP_ADDR(GPIO11, 0x02f0),
50 MFP_ADDR(GPIO12, 0x0304),
51 MFP_ADDR(GPIO13, 0x0310),
52 MFP_ADDR(GPIO14, 0x0308),
53 MFP_ADDR(GPIO15, 0x030c),
54 MFP_ADDR(GPIO16, 0x04e8),
55 MFP_ADDR(GPIO17, 0x04f4),
56 MFP_ADDR(GPIO18, 0x04f8),
57 MFP_ADDR(GPIO19, 0x04fc),
58 MFP_ADDR(GPIO20, 0x0518),
59 MFP_ADDR(GPIO21, 0x051c),
60 MFP_ADDR(GPIO22, 0x04ec),
61 MFP_ADDR(GPIO23, 0x0500),
62 MFP_ADDR(GPIO24, 0x04f0),
63 MFP_ADDR(GPIO25, 0x0504),
64 MFP_ADDR(GPIO26, 0x0510),
65 MFP_ADDR(GPIO27, 0x0514),
66 MFP_ADDR(GPIO28, 0x0520),
67 MFP_ADDR(GPIO29, 0x0600),
68 MFP_ADDR(GPIO30, 0x0618),
69 MFP_ADDR(GPIO31, 0x0610),
70 MFP_ADDR(GPIO32, 0x060c),
71 MFP_ADDR(GPIO33, 0x061c),
72 MFP_ADDR(GPIO34, 0x0620),
73 MFP_ADDR(GPIO35, 0x0628),
74 MFP_ADDR(GPIO36, 0x062c),
75 MFP_ADDR(GPIO37, 0x0630),
76 MFP_ADDR(GPIO38, 0x0634),
77 MFP_ADDR(GPIO39, 0x0638),
78 MFP_ADDR(GPIO40, 0x063c),
79 MFP_ADDR(GPIO41, 0x0614),
80 MFP_ADDR(GPIO42, 0x0624),
81 MFP_ADDR(GPIO43, 0x0608),
82 MFP_ADDR(GPIO44, 0x0604),
83 MFP_ADDR(GPIO45, 0x050c),
84 MFP_ADDR(GPIO46, 0x0508),
85 MFP_ADDR(GPIO47, 0x02bc),
86 MFP_ADDR(GPIO48, 0x02b4),
87 MFP_ADDR(GPIO49, 0x02b8),
88 MFP_ADDR(GPIO50, 0x02c8),
89 MFP_ADDR(GPIO51, 0x02c0),
90 MFP_ADDR(GPIO52, 0x02c4),
91 MFP_ADDR(GPIO53, 0x02d0),
92 MFP_ADDR(GPIO54, 0x02cc),
93 MFP_ADDR(GPIO55, 0x029c),
94 MFP_ADDR(GPIO56, 0x02a0),
95 MFP_ADDR(GPIO57, 0x0294),
96 MFP_ADDR(GPIO58, 0x0298),
97 MFP_ADDR(GPIO59, 0x02a4),
98 MFP_ADDR(GPIO60, 0x02a8),
99 MFP_ADDR(GPIO61, 0x02b0),
100 MFP_ADDR(GPIO62, 0x02ac),
101 MFP_ADDR(GPIO63, 0x0640),
102 MFP_ADDR(GPIO64, 0x065c),
103 MFP_ADDR(GPIO65, 0x0648),
104 MFP_ADDR(GPIO66, 0x0644),
105 MFP_ADDR(GPIO67, 0x0674),
106 MFP_ADDR(GPIO68, 0x0658),
107 MFP_ADDR(GPIO69, 0x0654),
108 MFP_ADDR(GPIO70, 0x0660),
109 MFP_ADDR(GPIO71, 0x0668),
110 MFP_ADDR(GPIO72, 0x0664),
111 MFP_ADDR(GPIO73, 0x0650),
112 MFP_ADDR(GPIO74, 0x066c),
113 MFP_ADDR(GPIO75, 0x064c),
114 MFP_ADDR(GPIO76, 0x0670),
115 MFP_ADDR(GPIO77, 0x0678),
116 MFP_ADDR(GPIO78, 0x067c),
117 MFP_ADDR(GPIO79, 0x0694),
118 MFP_ADDR(GPIO80, 0x069c),
119 MFP_ADDR(GPIO81, 0x06a0),
120 MFP_ADDR(GPIO82, 0x06a4),
121 MFP_ADDR(GPIO83, 0x0698),
122 MFP_ADDR(GPIO84, 0x06bc),
123 MFP_ADDR(GPIO85, 0x06b4),
124 MFP_ADDR(GPIO86, 0x06b0),
125 MFP_ADDR(GPIO87, 0x06c0),
126 MFP_ADDR(GPIO88, 0x06c4),
127 MFP_ADDR(GPIO89, 0x06ac),
128 MFP_ADDR(GPIO90, 0x0680),
129 MFP_ADDR(GPIO91, 0x0684),
130 MFP_ADDR(GPIO92, 0x0688),
131 MFP_ADDR(GPIO93, 0x0690),
132 MFP_ADDR(GPIO94, 0x068c),
133 MFP_ADDR(GPIO95, 0x06a8),
134 MFP_ADDR(GPIO96, 0x06b8),
135 MFP_ADDR(GPIO97, 0x0410),
136 MFP_ADDR(GPIO98, 0x0418),
137 MFP_ADDR(GPIO99, 0x041c),
138 MFP_ADDR(GPIO100, 0x0414),
139 MFP_ADDR(GPIO101, 0x0408),
140 MFP_ADDR(GPIO102, 0x0324),
141 MFP_ADDR(GPIO103, 0x040c),
142 MFP_ADDR(GPIO104, 0x0400),
143 MFP_ADDR(GPIO105, 0x0328),
144 MFP_ADDR(GPIO106, 0x0404),
145
146 MFP_ADDR(GPIO159, 0x0524),
147 MFP_ADDR(GPIO163, 0x0534),
148 MFP_ADDR(GPIO167, 0x0544),
149 MFP_ADDR(GPIO168, 0x0548),
150 MFP_ADDR(GPIO169, 0x054c),
151 MFP_ADDR(GPIO170, 0x0550),
152 MFP_ADDR(GPIO171, 0x0554),
153 MFP_ADDR(GPIO172, 0x0558),
154 MFP_ADDR(GPIO173, 0x055c),
155
156 MFP_ADDR(nXCVREN, 0x0204),
157 MFP_ADDR(DF_CLE_nOE, 0x020c),
158 MFP_ADDR(DF_nADV1_ALE, 0x0218),
159 MFP_ADDR(DF_SCLK_E, 0x0214),
160 MFP_ADDR(DF_SCLK_S, 0x0210),
161 MFP_ADDR(nBE0, 0x021c),
162 MFP_ADDR(nBE1, 0x0220),
163 MFP_ADDR(DF_nADV2_ALE, 0x0224),
164 MFP_ADDR(DF_INT_RnB, 0x0228),
165 MFP_ADDR(DF_nCS0, 0x022c),
166 MFP_ADDR(DF_nCS1, 0x0230),
167 MFP_ADDR(nLUA, 0x0254),
168 MFP_ADDR(nLLA, 0x0258),
169 MFP_ADDR(DF_nWE, 0x0234),
170 MFP_ADDR(DF_nRE_nOE, 0x0238),
171 MFP_ADDR(DF_ADDR0, 0x024c),
172 MFP_ADDR(DF_ADDR1, 0x0250),
173 MFP_ADDR(DF_ADDR2, 0x025c),
174 MFP_ADDR(DF_ADDR3, 0x0260),
175 MFP_ADDR(DF_IO0, 0x023c),
176 MFP_ADDR(DF_IO1, 0x0240),
177 MFP_ADDR(DF_IO2, 0x0244),
178 MFP_ADDR(DF_IO3, 0x0248),
179 MFP_ADDR(DF_IO4, 0x0264),
180 MFP_ADDR(DF_IO5, 0x0268),
181 MFP_ADDR(DF_IO6, 0x026c),
182 MFP_ADDR(DF_IO7, 0x0270),
183 MFP_ADDR(DF_IO8, 0x0274),
184 MFP_ADDR(DF_IO9, 0x0278),
185 MFP_ADDR(DF_IO10, 0x027c),
186 MFP_ADDR(DF_IO11, 0x0280),
187 MFP_ADDR(DF_IO12, 0x0284),
188 MFP_ADDR(DF_IO13, 0x0288),
189 MFP_ADDR(DF_IO14, 0x028c),
190 MFP_ADDR(DF_IO15, 0x0290),
191
192 MFP_ADDR(GSIM_UIO, 0x0314),
193 MFP_ADDR(GSIM_UCLK, 0x0318),
194 MFP_ADDR(GSIM_UDET, 0x031c),
195 MFP_ADDR(GSIM_nURST, 0x0320),
196
197 MFP_ADDR(PMIC_INT, 0x06c8),
198
199 MFP_ADDR(RDY, 0x0200),
200
201 MFP_ADDR_END,
202};
203
204static DEFINE_CK(pxa95x_lcd, LCD, &clk_pxa3xx_hsio_ops);
205static DEFINE_CLK(pxa95x_pout, &clk_pxa3xx_pout_ops, 13000000, 70);
206static DEFINE_PXA3_CKEN(pxa95x_ffuart, FFUART, 14857000, 1);
207static DEFINE_PXA3_CKEN(pxa95x_btuart, BTUART, 14857000, 1);
208static DEFINE_PXA3_CKEN(pxa95x_stuart, STUART, 14857000, 1);
209static DEFINE_PXA3_CKEN(pxa95x_i2c, I2C, 32842000, 0);
210static DEFINE_PXA3_CKEN(pxa95x_keypad, KEYPAD, 32768, 0);
211static DEFINE_PXA3_CKEN(pxa95x_ssp1, SSP1, 13000000, 0);
212static DEFINE_PXA3_CKEN(pxa95x_ssp2, SSP2, 13000000, 0);
213static DEFINE_PXA3_CKEN(pxa95x_ssp3, SSP3, 13000000, 0);
214static DEFINE_PXA3_CKEN(pxa95x_ssp4, SSP4, 13000000, 0);
215static DEFINE_PXA3_CKEN(pxa95x_pwm0, PWM0, 13000000, 0);
216static DEFINE_PXA3_CKEN(pxa95x_pwm1, PWM1, 13000000, 0);
217
218static struct clk_lookup pxa95x_clkregs[] = {
219 INIT_CLKREG(&clk_pxa95x_pout, NULL, "CLK_POUT"),
220 /* Power I2C clock is always on */
221 INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL),
222 INIT_CLKREG(&clk_pxa95x_lcd, "pxa2xx-fb", NULL),
223 INIT_CLKREG(&clk_pxa95x_ffuart, "pxa2xx-uart.0", NULL),
224 INIT_CLKREG(&clk_pxa95x_btuart, "pxa2xx-uart.1", NULL),
225 INIT_CLKREG(&clk_pxa95x_stuart, "pxa2xx-uart.2", NULL),
226 INIT_CLKREG(&clk_pxa95x_stuart, "pxa2xx-ir", "UARTCLK"),
227 INIT_CLKREG(&clk_pxa95x_i2c, "pxa2xx-i2c.0", NULL),
228 INIT_CLKREG(&clk_pxa95x_keypad, "pxa27x-keypad", NULL),
229 INIT_CLKREG(&clk_pxa95x_ssp1, "pxa27x-ssp.0", NULL),
230 INIT_CLKREG(&clk_pxa95x_ssp2, "pxa27x-ssp.1", NULL),
231 INIT_CLKREG(&clk_pxa95x_ssp3, "pxa27x-ssp.2", NULL),
232 INIT_CLKREG(&clk_pxa95x_ssp4, "pxa27x-ssp.3", NULL),
233 INIT_CLKREG(&clk_pxa95x_pwm0, "pxa27x-pwm.0", NULL),
234 INIT_CLKREG(&clk_pxa95x_pwm1, "pxa27x-pwm.1", NULL),
235};
236
237void __init pxa95x_init_irq(void)
238{
239 pxa_init_irq(96, NULL);
240 pxa_init_gpio(IRQ_GPIO_2_x, 2, 127, NULL);
241}
242
243/*
244 * device registration specific to PXA93x.
245 */
246
247void __init pxa95x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
248{
249 pxa_register_device(&pxa3xx_device_i2c_power, info);
250}
251
252static struct platform_device *devices[] __initdata = {
253 &sa1100_device_rtc,
254 &pxa_device_rtc,
255 &pxa27x_device_ssp1,
256 &pxa27x_device_ssp2,
257 &pxa27x_device_ssp3,
258 &pxa3xx_device_ssp4,
259 &pxa27x_device_pwm0,
260 &pxa27x_device_pwm1,
261};
262
263static int __init pxa95x_init(void)
264{
265 int ret = 0, i;
266
267 if (cpu_is_pxa95x()) {
268 mfp_init_base(io_p2v(MFPR_BASE));
269 mfp_init_addr(pxa95x_mfp_addr_map);
270
271 reset_status = ARSR;
272
273 /*
274 * clear RDH bit every time after reset
275 *
276 * Note: the last 3 bits DxS are write-1-to-clear so carefully
277 * preserve them here in case they will be referenced later
278 */
279 ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S);
280
281 clkdev_add_table(pxa95x_clkregs, ARRAY_SIZE(pxa95x_clkregs));
282
283 if ((ret = pxa_init_dma(IRQ_DMA, 32)))
284 return ret;
285
286 register_syscore_ops(&pxa_irq_syscore_ops);
287 register_syscore_ops(&pxa_gpio_syscore_ops);
288 register_syscore_ops(&pxa3xx_clock_syscore_ops);
289
290 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
291 }
292
293 return ret;
294}
295
296postcore_initcall(pxa95x_init);
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c
index 67e04f4e07c1..2f37d43f51b6 100644
--- a/arch/arm/mach-pxa/raumfeld.c
+++ b/arch/arm/mach-pxa/raumfeld.c
@@ -18,7 +18,6 @@
18 18
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/kernel.h> 20#include <linux/kernel.h>
21#include <linux/sysdev.h>
22#include <linux/platform_device.h> 21#include <linux/platform_device.h>
23#include <linux/interrupt.h> 22#include <linux/interrupt.h>
24#include <linux/gpio.h> 23#include <linux/gpio.h>
@@ -32,6 +31,7 @@
32#include <linux/sched.h> 31#include <linux/sched.h>
33#include <linux/pwm_backlight.h> 32#include <linux/pwm_backlight.h>
34#include <linux/i2c.h> 33#include <linux/i2c.h>
34#include <linux/i2c/pxa-i2c.h>
35#include <linux/spi/spi.h> 35#include <linux/spi/spi.h>
36#include <linux/spi/spi_gpio.h> 36#include <linux/spi/spi_gpio.h>
37#include <linux/lis3lv02d.h> 37#include <linux/lis3lv02d.h>
@@ -53,7 +53,6 @@
53#include <mach/ohci.h> 53#include <mach/ohci.h>
54#include <mach/pxafb.h> 54#include <mach/pxafb.h>
55#include <mach/mmc.h> 55#include <mach/mmc.h>
56#include <plat/i2c.h>
57#include <plat/pxa3xx_nand.h> 56#include <plat/pxa3xx_nand.h>
58 57
59#include "generic.h" 58#include "generic.h"
@@ -574,10 +573,10 @@ static struct pxafb_mode_info sharp_lq043t3dx02_mode = {
574 .xres = 480, 573 .xres = 480,
575 .yres = 272, 574 .yres = 272,
576 .bpp = 16, 575 .bpp = 16,
577 .hsync_len = 4, 576 .hsync_len = 41,
578 .left_margin = 2, 577 .left_margin = 2,
579 .right_margin = 1, 578 .right_margin = 1,
580 .vsync_len = 1, 579 .vsync_len = 10,
581 .upper_margin = 3, 580 .upper_margin = 3,
582 .lower_margin = 1, 581 .lower_margin = 1,
583 .sync = 0, 582 .sync = 0,
@@ -588,34 +587,41 @@ static struct pxafb_mach_info raumfeld_sharp_lcd_info = {
588 .num_modes = 1, 587 .num_modes = 1,
589 .video_mem_size = 0x400000, 588 .video_mem_size = 0x400000,
590 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, 589 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
590#ifdef CONFIG_PXA3XX_GCU
591 .acceleration_enabled = 1,
592#endif
591}; 593};
592 594
593static void __init raumfeld_lcd_init(void) 595static void __init raumfeld_lcd_init(void)
594{ 596{
595 int ret; 597 int ret;
596 598
597 set_pxa_fb_info(&raumfeld_sharp_lcd_info);
598
599 /* Earlier devices had the backlight regulator controlled
600 * via PWM, later versions use another controller for that */
601 if ((system_rev & 0xff) < 2) {
602 mfp_cfg_t raumfeld_pwm_pin_config = GPIO17_PWM0_OUT;
603 pxa3xx_mfp_config(&raumfeld_pwm_pin_config, 1);
604 platform_device_register(&raumfeld_pwm_backlight_device);
605 } else
606 platform_device_register(&raumfeld_lt3593_device);
607
608 ret = gpio_request(GPIO_TFT_VA_EN, "display VA enable"); 599 ret = gpio_request(GPIO_TFT_VA_EN, "display VA enable");
609 if (ret < 0) 600 if (ret < 0)
610 pr_warning("Unable to request GPIO_TFT_VA_EN\n"); 601 pr_warning("Unable to request GPIO_TFT_VA_EN\n");
611 else 602 else
612 gpio_direction_output(GPIO_TFT_VA_EN, 1); 603 gpio_direction_output(GPIO_TFT_VA_EN, 1);
613 604
605 msleep(100);
606
614 ret = gpio_request(GPIO_DISPLAY_ENABLE, "display enable"); 607 ret = gpio_request(GPIO_DISPLAY_ENABLE, "display enable");
615 if (ret < 0) 608 if (ret < 0)
616 pr_warning("Unable to request GPIO_DISPLAY_ENABLE\n"); 609 pr_warning("Unable to request GPIO_DISPLAY_ENABLE\n");
617 else 610 else
618 gpio_direction_output(GPIO_DISPLAY_ENABLE, 1); 611 gpio_direction_output(GPIO_DISPLAY_ENABLE, 1);
612
613 /* Hardware revision 2 has the backlight regulator controlled
614 * by an LT3593, earlier and later devices use PWM for that. */
615 if ((system_rev & 0xff) == 2) {
616 platform_device_register(&raumfeld_lt3593_device);
617 } else {
618 mfp_cfg_t raumfeld_pwm_pin_config = GPIO17_PWM0_OUT;
619 pxa3xx_mfp_config(&raumfeld_pwm_pin_config, 1);
620 platform_device_register(&raumfeld_pwm_backlight_device);
621 }
622
623 pxa_set_fb_info(NULL, &raumfeld_sharp_lcd_info);
624 platform_device_register(&pxa3xx_device_gcu);
619} 625}
620 626
621/** 627/**
@@ -653,10 +659,10 @@ static struct lis3lv02d_platform_data lis3_pdata = {
653 659
654#define SPI_AK4104 \ 660#define SPI_AK4104 \
655{ \ 661{ \
656 .modalias = "ak4104", \ 662 .modalias = "ak4104-codec", \
657 .max_speed_hz = 10000, \ 663 .max_speed_hz = 10000, \
658 .bus_num = 0, \ 664 .bus_num = 0, \
659 .chip_select = 0, \ 665 .chip_select = 0, \
660 .controller_data = (void *) GPIO_SPDIF_CS, \ 666 .controller_data = (void *) GPIO_SPDIF_CS, \
661} 667}
662 668
@@ -1083,11 +1089,9 @@ static void __init raumfeld_speaker_init(void)
1083 1089
1084#ifdef CONFIG_MACH_RAUMFELD_RC 1090#ifdef CONFIG_MACH_RAUMFELD_RC
1085MACHINE_START(RAUMFELD_RC, "Raumfeld Controller") 1091MACHINE_START(RAUMFELD_RC, "Raumfeld Controller")
1086 .phys_io = 0x40000000,
1087 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
1088 .boot_params = RAUMFELD_SDRAM_BASE + 0x100, 1092 .boot_params = RAUMFELD_SDRAM_BASE + 0x100,
1089 .init_machine = raumfeld_controller_init, 1093 .init_machine = raumfeld_controller_init,
1090 .map_io = pxa_map_io, 1094 .map_io = pxa3xx_map_io,
1091 .init_irq = pxa3xx_init_irq, 1095 .init_irq = pxa3xx_init_irq,
1092 .timer = &pxa_timer, 1096 .timer = &pxa_timer,
1093MACHINE_END 1097MACHINE_END
@@ -1095,11 +1099,9 @@ MACHINE_END
1095 1099
1096#ifdef CONFIG_MACH_RAUMFELD_CONNECTOR 1100#ifdef CONFIG_MACH_RAUMFELD_CONNECTOR
1097MACHINE_START(RAUMFELD_CONNECTOR, "Raumfeld Connector") 1101MACHINE_START(RAUMFELD_CONNECTOR, "Raumfeld Connector")
1098 .phys_io = 0x40000000,
1099 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
1100 .boot_params = RAUMFELD_SDRAM_BASE + 0x100, 1102 .boot_params = RAUMFELD_SDRAM_BASE + 0x100,
1101 .init_machine = raumfeld_connector_init, 1103 .init_machine = raumfeld_connector_init,
1102 .map_io = pxa_map_io, 1104 .map_io = pxa3xx_map_io,
1103 .init_irq = pxa3xx_init_irq, 1105 .init_irq = pxa3xx_init_irq,
1104 .timer = &pxa_timer, 1106 .timer = &pxa_timer,
1105MACHINE_END 1107MACHINE_END
@@ -1107,11 +1109,9 @@ MACHINE_END
1107 1109
1108#ifdef CONFIG_MACH_RAUMFELD_SPEAKER 1110#ifdef CONFIG_MACH_RAUMFELD_SPEAKER
1109MACHINE_START(RAUMFELD_SPEAKER, "Raumfeld Speaker") 1111MACHINE_START(RAUMFELD_SPEAKER, "Raumfeld Speaker")
1110 .phys_io = 0x40000000,
1111 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
1112 .boot_params = RAUMFELD_SDRAM_BASE + 0x100, 1112 .boot_params = RAUMFELD_SDRAM_BASE + 0x100,
1113 .init_machine = raumfeld_speaker_init, 1113 .init_machine = raumfeld_speaker_init,
1114 .map_io = pxa_map_io, 1114 .map_io = pxa3xx_map_io,
1115 .init_irq = pxa3xx_init_irq, 1115 .init_irq = pxa3xx_init_irq,
1116 .timer = &pxa_timer, 1116 .timer = &pxa_timer,
1117MACHINE_END 1117MACHINE_END
diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c
index 115b6f234bdd..fee97a935122 100644
--- a/arch/arm/mach-pxa/saar.c
+++ b/arch/arm/mach-pxa/saar.c
@@ -20,6 +20,7 @@
20#include <linux/delay.h> 20#include <linux/delay.h>
21#include <linux/fb.h> 21#include <linux/fb.h>
22#include <linux/i2c.h> 22#include <linux/i2c.h>
23#include <linux/i2c/pxa-i2c.h>
23#include <linux/smc91x.h> 24#include <linux/smc91x.h>
24#include <linux/mfd/da903x.h> 25#include <linux/mfd/da903x.h>
25#include <linux/mtd/mtd.h> 26#include <linux/mtd/mtd.h>
@@ -31,7 +32,6 @@
31#include <asm/mach/flash.h> 32#include <asm/mach/flash.h>
32 33
33#include <mach/pxa930.h> 34#include <mach/pxa930.h>
34#include <plat/i2c.h>
35#include <mach/pxafb.h> 35#include <mach/pxafb.h>
36 36
37#include "devices.h" 37#include "devices.h"
@@ -116,7 +116,7 @@ static struct platform_device smc91x_device = {
116 }, 116 },
117}; 117};
118 118
119#if defined(CONFIG_FB_PXA) || (CONFIG_FB_PXA_MODULE) 119#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
120static uint16_t lcd_power_on[] = { 120static uint16_t lcd_power_on[] = {
121 /* single frame */ 121 /* single frame */
122 SMART_CMD_NOOP, 122 SMART_CMD_NOOP,
@@ -473,7 +473,7 @@ static struct pxafb_mach_info saar_lcd_info = {
473 473
474static void __init saar_init_lcd(void) 474static void __init saar_init_lcd(void)
475{ 475{
476 set_pxa_fb_info(&saar_lcd_info); 476 pxa_set_fb_info(NULL, &saar_lcd_info);
477} 477}
478#else 478#else
479static inline void saar_init_lcd(void) {} 479static inline void saar_init_lcd(void) {}
@@ -596,10 +596,8 @@ static void __init saar_init(void)
596 596
597MACHINE_START(SAAR, "PXA930 Handheld Platform (aka SAAR)") 597MACHINE_START(SAAR, "PXA930 Handheld Platform (aka SAAR)")
598 /* Maintainer: Eric Miao <eric.miao@marvell.com> */ 598 /* Maintainer: Eric Miao <eric.miao@marvell.com> */
599 .phys_io = 0x40000000,
600 .boot_params = 0xa0000100, 599 .boot_params = 0xa0000100,
601 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, 600 .map_io = pxa3xx_map_io,
602 .map_io = pxa_map_io,
603 .init_irq = pxa3xx_init_irq, 601 .init_irq = pxa3xx_init_irq,
604 .timer = &pxa_timer, 602 .timer = &pxa_timer,
605 .init_machine = saar_init, 603 .init_machine = saar_init,
diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c
new file mode 100644
index 000000000000..9322fe527c7f
--- /dev/null
+++ b/arch/arm/mach-pxa/saarb.c
@@ -0,0 +1,113 @@
1/*
2 * linux/arch/arm/mach-pxa/saarb.c
3 *
4 * Support for the Marvell Handheld Platform (aka SAARB)
5 *
6 * Copyright (C) 2007-2010 Marvell International Ltd.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * publishhed by the Free Software Foundation.
11 */
12
13#include <linux/init.h>
14#include <linux/kernel.h>
15#include <linux/i2c.h>
16#include <linux/i2c/pxa-i2c.h>
17#include <linux/mfd/88pm860x.h>
18
19#include <asm/mach-types.h>
20#include <asm/mach/arch.h>
21
22#include <mach/irqs.h>
23#include <mach/hardware.h>
24#include <mach/mfp.h>
25#include <mach/mfp-pxa930.h>
26#include <mach/gpio.h>
27
28#include "generic.h"
29
30#define SAARB_NR_IRQS (IRQ_BOARD_START + 40)
31
32static struct pm860x_touch_pdata saarb_touch = {
33 .gpadc_prebias = 1,
34 .slot_cycle = 1,
35 .tsi_prebias = 6,
36 .pen_prebias = 16,
37 .pen_prechg = 2,
38 .res_x = 300,
39};
40
41static struct pm860x_backlight_pdata saarb_backlight[] = {
42 {
43 .id = PM8606_ID_BACKLIGHT,
44 .iset = PM8606_WLED_CURRENT(24),
45 .flags = PM8606_BACKLIGHT1,
46 },
47 {},
48};
49
50static struct pm860x_led_pdata saarb_led[] = {
51 {
52 .id = PM8606_ID_LED,
53 .iset = PM8606_LED_CURRENT(12),
54 .flags = PM8606_LED1_RED,
55 }, {
56 .id = PM8606_ID_LED,
57 .iset = PM8606_LED_CURRENT(12),
58 .flags = PM8606_LED1_GREEN,
59 }, {
60 .id = PM8606_ID_LED,
61 .iset = PM8606_LED_CURRENT(12),
62 .flags = PM8606_LED1_BLUE,
63 }, {
64 .id = PM8606_ID_LED,
65 .iset = PM8606_LED_CURRENT(12),
66 .flags = PM8606_LED2_RED,
67 }, {
68 .id = PM8606_ID_LED,
69 .iset = PM8606_LED_CURRENT(12),
70 .flags = PM8606_LED2_GREEN,
71 }, {
72 .id = PM8606_ID_LED,
73 .iset = PM8606_LED_CURRENT(12),
74 .flags = PM8606_LED2_BLUE,
75 },
76};
77
78static struct pm860x_platform_data saarb_pm8607_info = {
79 .touch = &saarb_touch,
80 .backlight = &saarb_backlight[0],
81 .led = &saarb_led[0],
82 .companion_addr = 0x10,
83 .irq_mode = 0,
84 .irq_base = IRQ_BOARD_START,
85
86 .i2c_port = GI2C_PORT,
87};
88
89static struct i2c_board_info saarb_i2c_info[] = {
90 {
91 .type = "88PM860x",
92 .addr = 0x34,
93 .platform_data = &saarb_pm8607_info,
94 .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO83)),
95 },
96};
97
98static void __init saarb_init(void)
99{
100 pxa_set_ffuart_info(NULL);
101 pxa_set_i2c_info(NULL);
102 i2c_register_board_info(0, ARRAY_AND_SIZE(saarb_i2c_info));
103}
104
105MACHINE_START(SAARB, "PXA955 Handheld Platform (aka SAARB)")
106 .boot_params = 0xa0000100,
107 .map_io = pxa_map_io,
108 .nr_irqs = SAARB_NR_IRQS,
109 .init_irq = pxa95x_init_irq,
110 .timer = &pxa_timer,
111 .init_machine = saarb_init,
112MACHINE_END
113
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c
index 8fed027b12dc..785880f67b60 100644
--- a/arch/arm/mach-pxa/sharpsl_pm.c
+++ b/arch/arm/mach-pxa/sharpsl_pm.c
@@ -579,7 +579,8 @@ static int sharpsl_ac_check(void)
579static int sharpsl_pm_suspend(struct platform_device *pdev, pm_message_t state) 579static int sharpsl_pm_suspend(struct platform_device *pdev, pm_message_t state)
580{ 580{
581 sharpsl_pm.flags |= SHARPSL_SUSPENDED; 581 sharpsl_pm.flags |= SHARPSL_SUSPENDED;
582 flush_scheduled_work(); 582 flush_delayed_work_sync(&toggle_charger);
583 flush_delayed_work_sync(&sharpsl_bat);
583 584
584 if (sharpsl_pm.charge_mode == CHRG_ON) 585 if (sharpsl_pm.charge_mode == CHRG_ON)
585 sharpsl_pm.flags |= SHARPSL_DO_OFFLINE_CHRG; 586 sharpsl_pm.flags |= SHARPSL_DO_OFFLINE_CHRG;
@@ -868,7 +869,7 @@ static void sharpsl_apm_get_power_status(struct apm_power_info *info)
868} 869}
869 870
870#ifdef CONFIG_PM 871#ifdef CONFIG_PM
871static struct platform_suspend_ops sharpsl_pm_ops = { 872static const struct platform_suspend_ops sharpsl_pm_ops = {
872 .prepare = pxa_pm_prepare, 873 .prepare = pxa_pm_prepare,
873 .finish = pxa_pm_finish, 874 .finish = pxa_pm_finish,
874 .enter = corgi_pxa_pm_enter, 875 .enter = corgi_pxa_pm_enter,
diff --git a/arch/arm/mach-pxa/sleep.S b/arch/arm/mach-pxa/sleep.S
index 52c30b01a671..6f5368899d84 100644
--- a/arch/arm/mach-pxa/sleep.S
+++ b/arch/arm/mach-pxa/sleep.S
@@ -14,7 +14,7 @@
14#include <linux/linkage.h> 14#include <linux/linkage.h>
15#include <asm/assembler.h> 15#include <asm/assembler.h>
16#include <mach/hardware.h> 16#include <mach/hardware.h>
17 17#include <mach/smemc.h>
18#include <mach/pxa2xx-regs.h> 18#include <mach/pxa2xx-regs.h>
19 19
20#define MDREFR_KDIV 0x200a4000 // all banks 20#define MDREFR_KDIV 0x200a4000 // all banks
@@ -22,133 +22,26 @@
22 22
23 .text 23 .text
24 24
25pxa_cpu_save_cp:
26 @ get coprocessor registers
27 mrc p14, 0, r3, c6, c0, 0 @ clock configuration, for turbo mode
28 mrc p15, 0, r4, c15, c1, 0 @ CP access reg
29 mrc p15, 0, r5, c13, c0, 0 @ PID
30 mrc p15, 0, r6, c3, c0, 0 @ domain ID
31 mrc p15, 0, r7, c2, c0, 0 @ translation table base addr
32 mrc p15, 0, r8, c1, c1, 0 @ auxiliary control reg
33 mrc p15, 0, r9, c1, c0, 0 @ control reg
34
35 bic r3, r3, #2 @ clear frequency change bit
36
37 @ store them plus current virtual stack ptr on stack
38 mov r10, sp
39 stmfd sp!, {r3 - r10}
40
41 mov pc, lr
42
43pxa_cpu_save_sp:
44 @ preserve phys address of stack
45 mov r0, sp
46 str lr, [sp, #-4]!
47 bl sleep_phys_sp
48 ldr r1, =sleep_save_sp
49 str r0, [r1]
50 ldr pc, [sp], #4
51
52#ifdef CONFIG_PXA3xx 25#ifdef CONFIG_PXA3xx
53/* 26/*
54 * pxa3xx_cpu_suspend() - forces CPU into sleep state (S2D3C4) 27 * pxa3xx_cpu_suspend() - forces CPU into sleep state (S2D3C4)
55 * 28 *
56 * NOTE: unfortunately, pxa_cpu_save_cp can not be reused here since 29 * r0 = v:p offset
57 * the auxiliary control register address is different between pxa3xx
58 * and pxa{25x,27x}
59 */ 30 */
60
61ENTRY(pxa3xx_cpu_suspend) 31ENTRY(pxa3xx_cpu_suspend)
62 32
63#ifndef CONFIG_IWMMXT 33#ifndef CONFIG_IWMMXT
64 mra r2, r3, acc0 34 mra r2, r3, acc0
65#endif 35#endif
66 stmfd sp!, {r2 - r12, lr} @ save registers on stack 36 stmfd sp!, {r2 - r12, lr} @ save registers on stack
67 37 mov r1, r0
68 mrc p14, 0, r3, c6, c0, 0 @ clock configuration, for turbo mode 38 ldr r3, =pxa_cpu_resume @ resume function
69 mrc p15, 0, r4, c15, c1, 0 @ CP access reg 39 bl cpu_suspend
70 mrc p15, 0, r5, c13, c0, 0 @ PID
71 mrc p15, 0, r6, c3, c0, 0 @ domain ID
72 mrc p15, 0, r7, c2, c0, 0 @ translation table base addr
73 mrc p15, 0, r8, c1, c0, 1 @ auxiliary control reg
74 mrc p15, 0, r9, c1, c0, 0 @ control reg
75
76 bic r3, r3, #2 @ clear frequency change bit
77
78 @ store them plus current virtual stack ptr on stack
79 mov r10, sp
80 stmfd sp!, {r3 - r10}
81
82 @ store physical address of stack pointer
83 mov r0, sp
84 bl sleep_phys_sp
85 ldr r1, =sleep_save_sp
86 str r0, [r1]
87
88 @ clean data cache
89 bl xsc3_flush_kern_cache_all
90 40
91 mov r0, #0x06 @ S2D3C4 mode 41 mov r0, #0x06 @ S2D3C4 mode
92 mcr p14, 0, r0, c7, c0, 0 @ enter sleep 42 mcr p14, 0, r0, c7, c0, 0 @ enter sleep
93 43
9420: b 20b @ waiting for sleep 4420: b 20b @ waiting for sleep
95
96 .data
97 .align 5
98/*
99 * pxa3xx_cpu_resume
100 */
101
102ENTRY(pxa3xx_cpu_resume)
103
104 mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE @ set SVC, irqs off
105 msr cpsr_c, r0
106
107 ldr r0, sleep_save_sp @ stack phys addr
108 ldmfd r0, {r3 - r9, sp} @ CP regs + virt stack ptr
109
110 mov r1, #0
111 mcr p15, 0, r1, c7, c7, 0 @ invalidate I & D caches, BTB
112 mcr p15, 0, r1, c7, c10, 4 @ drain write (&fill) buffer
113 mcr p15, 0, r1, c7, c5, 4 @ flush prefetch buffer
114 mcr p15, 0, r1, c8, c7, 0 @ invalidate I & D TLBs
115
116 mcr p14, 0, r3, c6, c0, 0 @ clock configuration, turbo mode.
117 mcr p15, 0, r4, c15, c1, 0 @ CP access reg
118 mcr p15, 0, r5, c13, c0, 0 @ PID
119 mcr p15, 0, r6, c3, c0, 0 @ domain ID
120 mcr p15, 0, r7, c2, c0, 0 @ translation table base addr
121 mcr p15, 0, r8, c1, c0, 1 @ auxiliary control reg
122
123 @ temporarily map resume_turn_on_mmu into the page table,
124 @ otherwise prefetch abort occurs after MMU is turned on
125 mov r1, r7
126 bic r1, r1, #0x00ff
127 bic r1, r1, #0x3f00
128 ldr r2, =0x542e
129
130 adr r3, resume_turn_on_mmu
131 mov r3, r3, lsr #20
132 orr r4, r2, r3, lsl #20
133 ldr r5, [r1, r3, lsl #2]
134 str r4, [r1, r3, lsl #2]
135
136 @ Mapping page table address in the page table
137 mov r6, r1, lsr #20
138 orr r7, r2, r6, lsl #20
139 ldr r8, [r1, r6, lsl #2]
140 str r7, [r1, r6, lsl #2]
141
142 ldr r2, =pxa3xx_resume_after_mmu @ absolute virtual address
143 b resume_turn_on_mmu @ cache align execution
144
145 .text
146pxa3xx_resume_after_mmu:
147 /* restore the temporary mapping */
148 str r5, [r1, r3, lsl #2]
149 str r8, [r1, r6, lsl #2]
150 b resume_after_mmu
151
152#endif /* CONFIG_PXA3xx */ 45#endif /* CONFIG_PXA3xx */
153 46
154#ifdef CONFIG_PXA27x 47#ifdef CONFIG_PXA27x
@@ -158,28 +51,23 @@ pxa3xx_resume_after_mmu:
158 * Forces CPU into sleep state. 51 * Forces CPU into sleep state.
159 * 52 *
160 * r0 = value for PWRMODE M field for desired sleep state 53 * r0 = value for PWRMODE M field for desired sleep state
54 * r1 = v:p offset
161 */ 55 */
162
163ENTRY(pxa27x_cpu_suspend) 56ENTRY(pxa27x_cpu_suspend)
164 57
165#ifndef CONFIG_IWMMXT 58#ifndef CONFIG_IWMMXT
166 mra r2, r3, acc0 59 mra r2, r3, acc0
167#endif 60#endif
168 stmfd sp!, {r2 - r12, lr} @ save registers on stack 61 stmfd sp!, {r2 - r12, lr} @ save registers on stack
169 62 mov r4, r0 @ save sleep mode
170 bl pxa_cpu_save_cp 63 ldr r3, =pxa_cpu_resume @ resume function
171 64 bl cpu_suspend
172 mov r5, r0 @ save sleep mode
173 bl pxa_cpu_save_sp
174
175 @ clean data cache
176 bl xscale_flush_kern_cache_all
177 65
178 @ Put the processor to sleep 66 @ Put the processor to sleep
179 @ (also workaround for sighting 28071) 67 @ (also workaround for sighting 28071)
180 68
181 @ prepare value for sleep mode 69 @ prepare value for sleep mode
182 mov r1, r5 @ sleep mode 70 mov r1, r4 @ sleep mode
183 71
184 @ prepare pointer to physical address 0 (virtual mapping in generic.c) 72 @ prepare pointer to physical address 0 (virtual mapping in generic.c)
185 mov r2, #UNCACHED_PHYS_0 73 mov r2, #UNCACHED_PHYS_0
@@ -216,21 +104,16 @@ ENTRY(pxa27x_cpu_suspend)
216 * Forces CPU into sleep state. 104 * Forces CPU into sleep state.
217 * 105 *
218 * r0 = value for PWRMODE M field for desired sleep state 106 * r0 = value for PWRMODE M field for desired sleep state
107 * r1 = v:p offset
219 */ 108 */
220 109
221ENTRY(pxa25x_cpu_suspend) 110ENTRY(pxa25x_cpu_suspend)
222 stmfd sp!, {r2 - r12, lr} @ save registers on stack 111 stmfd sp!, {r2 - r12, lr} @ save registers on stack
223 112 mov r4, r0 @ save sleep mode
224 bl pxa_cpu_save_cp 113 ldr r3, =pxa_cpu_resume @ resume function
225 114 bl cpu_suspend
226 mov r5, r0 @ save sleep mode
227 bl pxa_cpu_save_sp
228
229 @ clean data cache
230 bl xscale_flush_kern_cache_all
231
232 @ prepare value for sleep mode 115 @ prepare value for sleep mode
233 mov r1, r5 @ sleep mode 116 mov r1, r4 @ sleep mode
234 117
235 @ prepare pointer to physical address 0 (virtual mapping in generic.c) 118 @ prepare pointer to physical address 0 (virtual mapping in generic.c)
236 mov r2, #UNCACHED_PHYS_0 119 mov r2, #UNCACHED_PHYS_0
@@ -317,53 +200,9 @@ pxa_cpu_do_suspend:
317 * pxa_cpu_resume() 200 * pxa_cpu_resume()
318 * 201 *
319 * entry point from bootloader into kernel during resume 202 * entry point from bootloader into kernel during resume
320 *
321 * Note: Yes, part of the following code is located into the .data section.
322 * This is to allow sleep_save_sp to be accessed with a relative load
323 * while we can't rely on any MMU translation. We could have put
324 * sleep_save_sp in the .text section as well, but some setups might
325 * insist on it to be truly read-only.
326 */ 203 */
327
328 .data
329 .align 5
330ENTRY(pxa_cpu_resume)
331 mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE @ set SVC, irqs off
332 msr cpsr_c, r0
333
334 ldr r0, sleep_save_sp @ stack phys addr
335 ldr r2, =resume_after_mmu @ its absolute virtual address
336 ldmfd r0, {r3 - r9, sp} @ CP regs + virt stack ptr
337
338 mov r1, #0
339 mcr p15, 0, r1, c8, c7, 0 @ invalidate I & D TLBs
340 mcr p15, 0, r1, c7, c7, 0 @ invalidate I & D caches, BTB
341
342 mcr p14, 0, r3, c6, c0, 0 @ clock configuration, turbo mode.
343 mcr p15, 0, r4, c15, c1, 0 @ CP access reg
344 mcr p15, 0, r5, c13, c0, 0 @ PID
345 mcr p15, 0, r6, c3, c0, 0 @ domain ID
346 mcr p15, 0, r7, c2, c0, 0 @ translation table base addr
347 mcr p15, 0, r8, c1, c1, 0 @ auxiliary control reg
348 b resume_turn_on_mmu @ cache align execution
349
350 .align 5 204 .align 5
351resume_turn_on_mmu: 205pxa_cpu_resume:
352 mcr p15, 0, r9, c1, c0, 0 @ turn on MMU, caches, etc.
353
354 @ Let us ensure we jump to resume_after_mmu only when the mcr above
355 @ actually took effect. They call it the "cpwait" operation.
356 mrc p15, 0, r1, c2, c0, 0 @ queue a dependency on CP15
357 sub pc, r2, r1, lsr #32 @ jump to virtual addr
358 nop
359 nop
360 nop
361
362sleep_save_sp:
363 .word 0 @ preserve stack phys ptr here
364
365 .text
366resume_after_mmu:
367 ldmfd sp!, {r2, r3} 206 ldmfd sp!, {r2, r3}
368#ifndef CONFIG_IWMMXT 207#ifndef CONFIG_IWMMXT
369 mar acc0, r2, r3 208 mar acc0, r2, r3
diff --git a/arch/arm/mach-pxa/smemc.c b/arch/arm/mach-pxa/smemc.c
index d6f6904132a6..79923058d10f 100644
--- a/arch/arm/mach-pxa/smemc.c
+++ b/arch/arm/mach-pxa/smemc.c
@@ -6,85 +6,53 @@
6#include <linux/kernel.h> 6#include <linux/kernel.h>
7#include <linux/init.h> 7#include <linux/init.h>
8#include <linux/io.h> 8#include <linux/io.h>
9#include <linux/sysdev.h> 9#include <linux/syscore_ops.h>
10 10
11#include <mach/hardware.h> 11#include <mach/hardware.h>
12 12#include <mach/smemc.h>
13#define SMEMC_PHYS_BASE (0x4A000000)
14#define SMEMC_PHYS_SIZE (0x90)
15
16#define MSC0 (0x08) /* Static Memory Controller Register 0 */
17#define MSC1 (0x0C) /* Static Memory Controller Register 1 */
18#define SXCNFG (0x1C) /* Synchronous Static Memory Control Register */
19#define MEMCLKCFG (0x68) /* Clock Configuration */
20#define CSADRCFG0 (0x80) /* Address Configuration Register for CS0 */
21#define CSADRCFG1 (0x84) /* Address Configuration Register for CS1 */
22#define CSADRCFG2 (0x88) /* Address Configuration Register for CS2 */
23#define CSADRCFG3 (0x8C) /* Address Configuration Register for CS3 */
24 13
25#ifdef CONFIG_PM 14#ifdef CONFIG_PM
26static void __iomem *smemc_mmio_base;
27
28static unsigned long msc[2]; 15static unsigned long msc[2];
29static unsigned long sxcnfg, memclkcfg; 16static unsigned long sxcnfg, memclkcfg;
30static unsigned long csadrcfg[4]; 17static unsigned long csadrcfg[4];
31 18
32static int pxa3xx_smemc_suspend(struct sys_device *dev, pm_message_t state) 19static int pxa3xx_smemc_suspend(void)
33{ 20{
34 msc[0] = __raw_readl(smemc_mmio_base + MSC0); 21 msc[0] = __raw_readl(MSC0);
35 msc[1] = __raw_readl(smemc_mmio_base + MSC1); 22 msc[1] = __raw_readl(MSC1);
36 sxcnfg = __raw_readl(smemc_mmio_base + SXCNFG); 23 sxcnfg = __raw_readl(SXCNFG);
37 memclkcfg = __raw_readl(smemc_mmio_base + MEMCLKCFG); 24 memclkcfg = __raw_readl(MEMCLKCFG);
38 csadrcfg[0] = __raw_readl(smemc_mmio_base + CSADRCFG0); 25 csadrcfg[0] = __raw_readl(CSADRCFG0);
39 csadrcfg[1] = __raw_readl(smemc_mmio_base + CSADRCFG1); 26 csadrcfg[1] = __raw_readl(CSADRCFG1);
40 csadrcfg[2] = __raw_readl(smemc_mmio_base + CSADRCFG2); 27 csadrcfg[2] = __raw_readl(CSADRCFG2);
41 csadrcfg[3] = __raw_readl(smemc_mmio_base + CSADRCFG3); 28 csadrcfg[3] = __raw_readl(CSADRCFG3);
42 29
43 return 0; 30 return 0;
44} 31}
45 32
46static int pxa3xx_smemc_resume(struct sys_device *dev) 33static void pxa3xx_smemc_resume(void)
47{ 34{
48 __raw_writel(msc[0], smemc_mmio_base + MSC0); 35 __raw_writel(msc[0], MSC0);
49 __raw_writel(msc[1], smemc_mmio_base + MSC1); 36 __raw_writel(msc[1], MSC1);
50 __raw_writel(sxcnfg, smemc_mmio_base + SXCNFG); 37 __raw_writel(sxcnfg, SXCNFG);
51 __raw_writel(memclkcfg, smemc_mmio_base + MEMCLKCFG); 38 __raw_writel(memclkcfg, MEMCLKCFG);
52 __raw_writel(csadrcfg[0], smemc_mmio_base + CSADRCFG0); 39 __raw_writel(csadrcfg[0], CSADRCFG0);
53 __raw_writel(csadrcfg[1], smemc_mmio_base + CSADRCFG1); 40 __raw_writel(csadrcfg[1], CSADRCFG1);
54 __raw_writel(csadrcfg[2], smemc_mmio_base + CSADRCFG2); 41 __raw_writel(csadrcfg[2], CSADRCFG2);
55 __raw_writel(csadrcfg[3], smemc_mmio_base + CSADRCFG3); 42 __raw_writel(csadrcfg[3], CSADRCFG3);
56
57 return 0;
58} 43}
59 44
60static struct sysdev_class smemc_sysclass = { 45static struct syscore_ops smemc_syscore_ops = {
61 .name = "smemc",
62 .suspend = pxa3xx_smemc_suspend, 46 .suspend = pxa3xx_smemc_suspend,
63 .resume = pxa3xx_smemc_resume, 47 .resume = pxa3xx_smemc_resume,
64}; 48};
65 49
66static struct sys_device smemc_sysdev = {
67 .id = 0,
68 .cls = &smemc_sysclass,
69};
70
71static int __init smemc_init(void) 50static int __init smemc_init(void)
72{ 51{
73 int ret = 0; 52 if (cpu_is_pxa3xx())
74 53 register_syscore_ops(&smemc_syscore_ops);
75 if (cpu_is_pxa3xx()) {
76 smemc_mmio_base = ioremap(SMEMC_PHYS_BASE, SMEMC_PHYS_SIZE);
77 if (smemc_mmio_base == NULL)
78 return -ENODEV;
79
80 ret = sysdev_class_register(&smemc_sysclass);
81 if (ret)
82 return ret;
83 54
84 ret = sysdev_register(&smemc_sysdev); 55 return 0;
85 }
86
87 return ret;
88} 56}
89subsys_initcall(smemc_init); 57subsys_initcall(smemc_init);
90#endif 58#endif
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 1cd99cb87bb1..01c576963e94 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -19,14 +19,17 @@
19#include <linux/gpio.h> 19#include <linux/gpio.h>
20#include <linux/leds.h> 20#include <linux/leds.h>
21#include <linux/i2c.h> 21#include <linux/i2c.h>
22#include <linux/i2c/pxa-i2c.h>
22#include <linux/i2c/pca953x.h> 23#include <linux/i2c/pca953x.h>
23#include <linux/spi/spi.h> 24#include <linux/spi/spi.h>
24#include <linux/spi/ads7846.h> 25#include <linux/spi/ads7846.h>
25#include <linux/spi/corgi_lcd.h> 26#include <linux/spi/corgi_lcd.h>
26#include <linux/mtd/physmap.h> 27#include <linux/spi/pxa2xx_spi.h>
27#include <linux/mtd/sharpsl.h> 28#include <linux/mtd/sharpsl.h>
29#include <linux/mtd/physmap.h>
28#include <linux/input/matrix_keypad.h> 30#include <linux/input/matrix_keypad.h>
29#include <linux/regulator/machine.h> 31#include <linux/regulator/machine.h>
32#include <linux/io.h>
30 33
31#include <asm/setup.h> 34#include <asm/setup.h>
32#include <asm/mach-types.h> 35#include <asm/mach-types.h>
@@ -41,11 +44,9 @@
41#include <mach/mmc.h> 44#include <mach/mmc.h>
42#include <mach/ohci.h> 45#include <mach/ohci.h>
43#include <mach/pxafb.h> 46#include <mach/pxafb.h>
44#include <mach/pxa2xx_spi.h>
45#include <mach/spitz.h> 47#include <mach/spitz.h>
46#include <mach/sharpsl_pm.h> 48#include <mach/sharpsl_pm.h>
47 49#include <mach/smemc.h>
48#include <plat/i2c.h>
49 50
50#include "generic.h" 51#include "generic.h"
51#include "devices.h" 52#include "devices.h"
@@ -723,7 +724,7 @@ static struct pxafb_mach_info spitz_pxafb_info = {
723 724
724static void __init spitz_lcd_init(void) 725static void __init spitz_lcd_init(void)
725{ 726{
726 set_pxa_fb_info(&spitz_pxafb_info); 727 pxa_set_fb_info(NULL, &spitz_pxafb_info);
727} 728}
728#else 729#else
729static inline void spitz_lcd_init(void) {} 730static inline void spitz_lcd_init(void) {}
@@ -929,9 +930,10 @@ static void spitz_poweroff(void)
929 930
930static void spitz_restart(char mode, const char *cmd) 931static void spitz_restart(char mode, const char *cmd)
931{ 932{
933 uint32_t msc0 = __raw_readl(MSC0);
932 /* Bootloader magic for a reboot */ 934 /* Bootloader magic for a reboot */
933 if ((MSC0 & 0xffff0000) == 0x7ff00000) 935 if ((msc0 & 0xffff0000) == 0x7ff00000)
934 MSC0 = (MSC0 & 0xffff) | 0x7ee00000; 936 __raw_writel((msc0 & 0xffff) | 0x7ee00000, MSC0);
935 937
936 spitz_poweroff(); 938 spitz_poweroff();
937} 939}
@@ -979,10 +981,8 @@ static void __init spitz_fixup(struct machine_desc *desc,
979 981
980#ifdef CONFIG_MACH_SPITZ 982#ifdef CONFIG_MACH_SPITZ
981MACHINE_START(SPITZ, "SHARP Spitz") 983MACHINE_START(SPITZ, "SHARP Spitz")
982 .phys_io = 0x40000000,
983 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
984 .fixup = spitz_fixup, 984 .fixup = spitz_fixup,
985 .map_io = pxa_map_io, 985 .map_io = pxa27x_map_io,
986 .init_irq = pxa27x_init_irq, 986 .init_irq = pxa27x_init_irq,
987 .init_machine = spitz_init, 987 .init_machine = spitz_init,
988 .timer = &pxa_timer, 988 .timer = &pxa_timer,
@@ -991,10 +991,8 @@ MACHINE_END
991 991
992#ifdef CONFIG_MACH_BORZOI 992#ifdef CONFIG_MACH_BORZOI
993MACHINE_START(BORZOI, "SHARP Borzoi") 993MACHINE_START(BORZOI, "SHARP Borzoi")
994 .phys_io = 0x40000000,
995 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
996 .fixup = spitz_fixup, 994 .fixup = spitz_fixup,
997 .map_io = pxa_map_io, 995 .map_io = pxa27x_map_io,
998 .init_irq = pxa27x_init_irq, 996 .init_irq = pxa27x_init_irq,
999 .init_machine = spitz_init, 997 .init_machine = spitz_init,
1000 .timer = &pxa_timer, 998 .timer = &pxa_timer,
@@ -1003,10 +1001,8 @@ MACHINE_END
1003 1001
1004#ifdef CONFIG_MACH_AKITA 1002#ifdef CONFIG_MACH_AKITA
1005MACHINE_START(AKITA, "SHARP Akita") 1003MACHINE_START(AKITA, "SHARP Akita")
1006 .phys_io = 0x40000000,
1007 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
1008 .fixup = spitz_fixup, 1004 .fixup = spitz_fixup,
1009 .map_io = pxa_map_io, 1005 .map_io = pxa27x_map_io,
1010 .init_irq = pxa27x_init_irq, 1006 .init_irq = pxa27x_init_irq,
1011 .init_machine = spitz_init, 1007 .init_machine = spitz_init,
1012 .timer = &pxa_timer, 1008 .timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c
index 7fe74067d85f..094279aefe9c 100644
--- a/arch/arm/mach-pxa/spitz_pm.c
+++ b/arch/arm/mach-pxa/spitz_pm.c
@@ -14,6 +14,7 @@
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/delay.h> 16#include <linux/delay.h>
17#include <linux/gpio.h>
17#include <linux/interrupt.h> 18#include <linux/interrupt.h>
18#include <linux/platform_device.h> 19#include <linux/platform_device.h>
19#include <linux/apm-emulation.h> 20#include <linux/apm-emulation.h>
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c
index a654d1e6b38a..cb5611daf5fe 100644
--- a/arch/arm/mach-pxa/stargate2.c
+++ b/arch/arm/mach-pxa/stargate2.c
@@ -25,6 +25,7 @@
25#include <linux/mtd/plat-ram.h> 25#include <linux/mtd/plat-ram.h>
26#include <linux/mtd/partitions.h> 26#include <linux/mtd/partitions.h>
27 27
28#include <linux/i2c/pxa-i2c.h>
28#include <linux/i2c/pcf857x.h> 29#include <linux/i2c/pcf857x.h>
29#include <linux/i2c/at24.h> 30#include <linux/i2c/at24.h>
30#include <linux/smc91x.h> 31#include <linux/smc91x.h>
@@ -43,19 +44,21 @@
43#include <asm/mach/flash.h> 44#include <asm/mach/flash.h>
44 45
45#include <mach/pxa27x.h> 46#include <mach/pxa27x.h>
46#include <plat/i2c.h>
47#include <mach/mmc.h> 47#include <mach/mmc.h>
48#include <mach/udc.h> 48#include <mach/udc.h>
49#include <mach/pxa2xx_spi.h>
50#include <mach/pxa27x-udc.h> 49#include <mach/pxa27x-udc.h>
50#include <mach/smemc.h>
51 51
52#include <linux/spi/spi.h> 52#include <linux/spi/spi.h>
53#include <linux/spi/pxa2xx_spi.h>
53#include <linux/mfd/da903x.h> 54#include <linux/mfd/da903x.h>
54#include <linux/sht15.h> 55#include <linux/sht15.h>
55 56
56#include "devices.h" 57#include "devices.h"
57#include "generic.h" 58#include "generic.h"
58 59
60#define STARGATE_NR_IRQS (IRQ_BOARD_START + 8)
61
59/* Bluetooth */ 62/* Bluetooth */
60#define SG2_BT_RESET 81 63#define SG2_BT_RESET 81
61 64
@@ -974,7 +977,7 @@ static void __init stargate2_init(void)
974{ 977{
975 /* This is probably a board specific hack as this must be set 978 /* This is probably a board specific hack as this must be set
976 prior to connecting the MFP stuff up. */ 979 prior to connecting the MFP stuff up. */
977 MECR &= ~MECR_NOS; 980 __raw_writel(__raw_readl(MECR) & ~MECR_NOS, MECR);
978 981
979 pxa2xx_mfp_config(ARRAY_AND_SIZE(stargate2_pin_config)); 982 pxa2xx_mfp_config(ARRAY_AND_SIZE(stargate2_pin_config));
980 983
@@ -996,9 +999,7 @@ static void __init stargate2_init(void)
996 999
997#ifdef CONFIG_MACH_INTELMOTE2 1000#ifdef CONFIG_MACH_INTELMOTE2
998MACHINE_START(INTELMOTE2, "IMOTE 2") 1001MACHINE_START(INTELMOTE2, "IMOTE 2")
999 .phys_io = 0x40000000, 1002 .map_io = pxa27x_map_io,
1000 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
1001 .map_io = pxa_map_io,
1002 .init_irq = pxa27x_init_irq, 1003 .init_irq = pxa27x_init_irq,
1003 .timer = &pxa_timer, 1004 .timer = &pxa_timer,
1004 .init_machine = imote2_init, 1005 .init_machine = imote2_init,
@@ -1008,9 +1009,8 @@ MACHINE_END
1008 1009
1009#ifdef CONFIG_MACH_STARGATE2 1010#ifdef CONFIG_MACH_STARGATE2
1010MACHINE_START(STARGATE2, "Stargate 2") 1011MACHINE_START(STARGATE2, "Stargate 2")
1011 .phys_io = 0x40000000, 1012 .map_io = pxa27x_map_io,
1012 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, 1013 .nr_irqs = STARGATE_NR_IRQS,
1013 .map_io = pxa_map_io,
1014 .init_irq = pxa27x_init_irq, 1014 .init_irq = pxa27x_init_irq,
1015 .timer = &pxa_timer, 1015 .timer = &pxa_timer,
1016 .init_machine = stargate2_init, 1016 .init_machine = stargate2_init,
diff --git a/arch/arm/mach-pxa/tavorevb.c b/arch/arm/mach-pxa/tavorevb.c
index f02dcb5b4e97..53d4a472b699 100644
--- a/arch/arm/mach-pxa/tavorevb.c
+++ b/arch/arm/mach-pxa/tavorevb.c
@@ -25,7 +25,7 @@
25 25
26#include <mach/pxa930.h> 26#include <mach/pxa930.h>
27#include <mach/pxafb.h> 27#include <mach/pxafb.h>
28#include <mach/pxa27x_keypad.h> 28#include <plat/pxa27x_keypad.h>
29 29
30#include "devices.h" 30#include "devices.h"
31#include "generic.h" 31#include "generic.h"
@@ -466,7 +466,7 @@ static void __init tavorevb_init_lcd(void)
466{ 466{
467 platform_device_register(&tavorevb_backlight_devices[0]); 467 platform_device_register(&tavorevb_backlight_devices[0]);
468 platform_device_register(&tavorevb_backlight_devices[1]); 468 platform_device_register(&tavorevb_backlight_devices[1]);
469 set_pxa_fb_info(&tavorevb_lcd_info); 469 pxa_set_fb_info(NULL, &tavorevb_lcd_info);
470} 470}
471#else 471#else
472static inline void tavorevb_init_lcd(void) {} 472static inline void tavorevb_init_lcd(void) {}
@@ -489,10 +489,8 @@ static void __init tavorevb_init(void)
489 489
490MACHINE_START(TAVOREVB, "PXA930 Evaluation Board (aka TavorEVB)") 490MACHINE_START(TAVOREVB, "PXA930 Evaluation Board (aka TavorEVB)")
491 /* Maintainer: Eric Miao <eric.miao@marvell.com> */ 491 /* Maintainer: Eric Miao <eric.miao@marvell.com> */
492 .phys_io = 0x40000000,
493 .boot_params = 0xa0000100, 492 .boot_params = 0xa0000100,
494 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, 493 .map_io = pxa3xx_map_io,
495 .map_io = pxa_map_io,
496 .init_irq = pxa3xx_init_irq, 494 .init_irq = pxa3xx_init_irq,
497 .timer = &pxa_timer, 495 .timer = &pxa_timer,
498 .init_machine = tavorevb_init, 496 .init_machine = tavorevb_init,
diff --git a/arch/arm/mach-pxa/tavorevb3.c b/arch/arm/mach-pxa/tavorevb3.c
new file mode 100644
index 000000000000..79f4422f12f4
--- /dev/null
+++ b/arch/arm/mach-pxa/tavorevb3.c
@@ -0,0 +1,134 @@
1/*
2 * linux/arch/arm/mach-pxa/tavorevb3.c
3 *
4 * Support for the Marvell EVB3 Development Platform.
5 *
6 * Copyright: (C) Copyright 2008-2010 Marvell International Ltd.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * publishhed by the Free Software Foundation.
11 */
12
13#include <linux/init.h>
14#include <linux/kernel.h>
15#include <linux/platform_device.h>
16#include <linux/interrupt.h>
17#include <linux/i2c.h>
18#include <linux/i2c/pxa-i2c.h>
19#include <linux/gpio.h>
20#include <linux/mfd/88pm860x.h>
21
22#include <asm/mach-types.h>
23#include <asm/mach/arch.h>
24
25#include <mach/pxa930.h>
26
27#include "devices.h"
28#include "generic.h"
29
30#define TAVOREVB3_NR_IRQS (IRQ_BOARD_START + 24)
31
32static mfp_cfg_t evb3_mfp_cfg[] __initdata = {
33 /* UART */
34 GPIO53_UART1_TXD,
35 GPIO54_UART1_RXD,
36
37 /* PMIC */
38 PMIC_INT_GPIO83,
39};
40
41#if defined(CONFIG_I2C_PXA) || defined(CONFIG_I2C_PXA_MODULE)
42static struct pm860x_touch_pdata evb3_touch = {
43 .gpadc_prebias = 1,
44 .slot_cycle = 1,
45 .tsi_prebias = 6,
46 .pen_prebias = 16,
47 .pen_prechg = 2,
48 .res_x = 300,
49};
50
51static struct pm860x_backlight_pdata evb3_backlight[] = {
52 {
53 .id = PM8606_ID_BACKLIGHT,
54 .iset = PM8606_WLED_CURRENT(24),
55 .flags = PM8606_BACKLIGHT1,
56 },
57 {},
58};
59
60static struct pm860x_led_pdata evb3_led[] = {
61 {
62 .id = PM8606_ID_LED,
63 .iset = PM8606_LED_CURRENT(12),
64 .flags = PM8606_LED1_RED,
65 }, {
66 .id = PM8606_ID_LED,
67 .iset = PM8606_LED_CURRENT(12),
68 .flags = PM8606_LED1_GREEN,
69 }, {
70 .id = PM8606_ID_LED,
71 .iset = PM8606_LED_CURRENT(12),
72 .flags = PM8606_LED1_BLUE,
73 }, {
74 .id = PM8606_ID_LED,
75 .iset = PM8606_LED_CURRENT(12),
76 .flags = PM8606_LED2_RED,
77 }, {
78 .id = PM8606_ID_LED,
79 .iset = PM8606_LED_CURRENT(12),
80 .flags = PM8606_LED2_GREEN,
81 }, {
82 .id = PM8606_ID_LED,
83 .iset = PM8606_LED_CURRENT(12),
84 .flags = PM8606_LED2_BLUE,
85 },
86};
87
88static struct pm860x_platform_data evb3_pm8607_info = {
89 .touch = &evb3_touch,
90 .backlight = &evb3_backlight[0],
91 .led = &evb3_led[0],
92 .companion_addr = 0x10,
93 .irq_mode = 0,
94 .irq_base = IRQ_BOARD_START,
95
96 .i2c_port = GI2C_PORT,
97};
98
99static struct i2c_board_info evb3_i2c_info[] = {
100 {
101 .type = "88PM860x",
102 .addr = 0x34,
103 .platform_data = &evb3_pm8607_info,
104 .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO83)),
105 },
106};
107
108static void __init evb3_init_i2c(void)
109{
110 pxa_set_i2c_info(NULL);
111 i2c_register_board_info(0, ARRAY_AND_SIZE(evb3_i2c_info));
112}
113#else
114static inline void evb3_init_i2c(void) {}
115#endif
116
117static void __init evb3_init(void)
118{
119 /* initialize MFP configurations */
120 pxa3xx_mfp_config(ARRAY_AND_SIZE(evb3_mfp_cfg));
121
122 pxa_set_ffuart_info(NULL);
123
124 evb3_init_i2c();
125}
126
127MACHINE_START(TAVOREVB3, "PXA950 Evaluation Board (aka TavorEVB3)")
128 .boot_params = 0xa0000100,
129 .map_io = pxa3xx_map_io,
130 .nr_irqs = TAVOREVB3_NR_IRQS,
131 .init_irq = pxa3xx_init_irq,
132 .timer = &pxa_timer,
133 .init_machine = evb3_init,
134MACHINE_END
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index 293e40aeaf29..de684701449c 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -17,11 +17,11 @@
17#include <linux/interrupt.h> 17#include <linux/interrupt.h>
18#include <linux/clockchips.h> 18#include <linux/clockchips.h>
19#include <linux/sched.h> 19#include <linux/sched.h>
20#include <linux/cnt32_to_63.h>
21 20
22#include <asm/div64.h> 21#include <asm/div64.h>
23#include <asm/mach/irq.h> 22#include <asm/mach/irq.h>
24#include <asm/mach/time.h> 23#include <asm/mach/time.h>
24#include <asm/sched_clock.h>
25#include <mach/regs-ost.h> 25#include <mach/regs-ost.h>
26 26
27/* 27/*
@@ -32,29 +32,18 @@
32 * long as there is always less than 582 seconds between successive 32 * long as there is always less than 582 seconds between successive
33 * calls to sched_clock() which should always be the case in practice. 33 * calls to sched_clock() which should always be the case in practice.
34 */ 34 */
35static DEFINE_CLOCK_DATA(cd);
35 36
36#define OSCR2NS_SCALE_FACTOR 10 37unsigned long long notrace sched_clock(void)
37
38static unsigned long oscr2ns_scale;
39
40static void __init set_oscr2ns_scale(unsigned long oscr_rate)
41{ 38{
42 unsigned long long v = 1000000000ULL << OSCR2NS_SCALE_FACTOR; 39 u32 cyc = OSCR;
43 do_div(v, oscr_rate); 40 return cyc_to_sched_clock(&cd, cyc, (u32)~0);
44 oscr2ns_scale = v;
45 /*
46 * We want an even value to automatically clear the top bit
47 * returned by cnt32_to_63() without an additional run time
48 * instruction. So if the LSB is 1 then round it up.
49 */
50 if (oscr2ns_scale & 1)
51 oscr2ns_scale++;
52} 41}
53 42
54unsigned long long sched_clock(void) 43static void notrace pxa_update_sched_clock(void)
55{ 44{
56 unsigned long long v = cnt32_to_63(OSCR); 45 u32 cyc = OSCR;
57 return (v * oscr2ns_scale) >> OSCR2NS_SCALE_FACTOR; 46 update_sched_clock(&cd, cyc, (u32)~0);
58} 47}
59 48
60 49
@@ -111,26 +100,11 @@ pxa_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *dev)
111static struct clock_event_device ckevt_pxa_osmr0 = { 100static struct clock_event_device ckevt_pxa_osmr0 = {
112 .name = "osmr0", 101 .name = "osmr0",
113 .features = CLOCK_EVT_FEAT_ONESHOT, 102 .features = CLOCK_EVT_FEAT_ONESHOT,
114 .shift = 32,
115 .rating = 200, 103 .rating = 200,
116 .set_next_event = pxa_osmr0_set_next_event, 104 .set_next_event = pxa_osmr0_set_next_event,
117 .set_mode = pxa_osmr0_set_mode, 105 .set_mode = pxa_osmr0_set_mode,
118}; 106};
119 107
120static cycle_t pxa_read_oscr(struct clocksource *cs)
121{
122 return OSCR;
123}
124
125static struct clocksource cksrc_pxa_oscr0 = {
126 .name = "oscr0",
127 .rating = 200,
128 .read = pxa_read_oscr,
129 .mask = CLOCKSOURCE_MASK(32),
130 .shift = 20,
131 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
132};
133
134static struct irqaction pxa_ost0_irq = { 108static struct irqaction pxa_ost0_irq = {
135 .name = "ost0", 109 .name = "ost0",
136 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, 110 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
@@ -145,22 +119,19 @@ static void __init pxa_timer_init(void)
145 OIER = 0; 119 OIER = 0;
146 OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3; 120 OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3;
147 121
148 set_oscr2ns_scale(clock_tick_rate); 122 init_sched_clock(&cd, pxa_update_sched_clock, 32, clock_tick_rate);
149 123
150 ckevt_pxa_osmr0.mult = 124 clockevents_calc_mult_shift(&ckevt_pxa_osmr0, clock_tick_rate, 4);
151 div_sc(clock_tick_rate, NSEC_PER_SEC, ckevt_pxa_osmr0.shift);
152 ckevt_pxa_osmr0.max_delta_ns = 125 ckevt_pxa_osmr0.max_delta_ns =
153 clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0); 126 clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0);
154 ckevt_pxa_osmr0.min_delta_ns = 127 ckevt_pxa_osmr0.min_delta_ns =
155 clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_pxa_osmr0) + 1; 128 clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_pxa_osmr0) + 1;
156 ckevt_pxa_osmr0.cpumask = cpumask_of(0); 129 ckevt_pxa_osmr0.cpumask = cpumask_of(0);
157 130
158 cksrc_pxa_oscr0.mult =
159 clocksource_hz2mult(clock_tick_rate, cksrc_pxa_oscr0.shift);
160
161 setup_irq(IRQ_OST0, &pxa_ost0_irq); 131 setup_irq(IRQ_OST0, &pxa_ost0_irq);
162 132
163 clocksource_register(&cksrc_pxa_oscr0); 133 clocksource_mmio_init(&OSCR, "oscr0", clock_tick_rate, 200, 32,
134 clocksource_mmio_readl_up);
164 clockevents_register_device(&ckevt_pxa_osmr0); 135 clockevents_register_device(&ckevt_pxa_osmr0);
165} 136}
166 137
diff --git a/arch/arm/mach-pxa/tosa-bt.c b/arch/arm/mach-pxa/tosa-bt.c
index c31e601eb49c..b9b1e5c2b290 100644
--- a/arch/arm/mach-pxa/tosa-bt.c
+++ b/arch/arm/mach-pxa/tosa-bt.c
@@ -81,8 +81,6 @@ static int tosa_bt_probe(struct platform_device *dev)
81 goto err_rfk_alloc; 81 goto err_rfk_alloc;
82 } 82 }
83 83
84 rfkill_set_led_trigger_name(rfk, "tosa-bt");
85
86 rc = rfkill_register(rfk); 84 rc = rfkill_register(rfk);
87 if (rc) 85 if (rc)
88 goto err_rfkill; 86 goto err_rfkill;
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 83cc3a18c2e9..5fa145778e7d 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -32,7 +32,10 @@
32#include <linux/gpio.h> 32#include <linux/gpio.h>
33#include <linux/pda_power.h> 33#include <linux/pda_power.h>
34#include <linux/spi/spi.h> 34#include <linux/spi/spi.h>
35#include <linux/spi/pxa2xx_spi.h>
35#include <linux/input/matrix_keypad.h> 36#include <linux/input/matrix_keypad.h>
37#include <linux/i2c/pxa-i2c.h>
38#include <linux/usb/gpio_vbus.h>
36 39
37#include <asm/setup.h> 40#include <asm/setup.h>
38#include <asm/mach-types.h> 41#include <asm/mach-types.h>
@@ -40,12 +43,11 @@
40#include <mach/pxa25x.h> 43#include <mach/pxa25x.h>
41#include <mach/reset.h> 44#include <mach/reset.h>
42#include <mach/irda.h> 45#include <mach/irda.h>
43#include <plat/i2c.h>
44#include <mach/mmc.h> 46#include <mach/mmc.h>
45#include <mach/udc.h> 47#include <mach/udc.h>
46#include <mach/tosa_bt.h> 48#include <mach/tosa_bt.h>
47#include <mach/pxa2xx_spi.h>
48#include <mach/audio.h> 49#include <mach/audio.h>
50#include <mach/smemc.h>
49 51
50#include <asm/mach/arch.h> 52#include <asm/mach/arch.h>
51#include <mach/tosa.h> 53#include <mach/tosa.h>
@@ -239,12 +241,20 @@ static struct scoop_pcmcia_config tosa_pcmcia_config = {
239/* 241/*
240 * USB Device Controller 242 * USB Device Controller
241 */ 243 */
242static struct pxa2xx_udc_mach_info udc_info __initdata = { 244static struct gpio_vbus_mach_info tosa_udc_info = {
243 .gpio_pullup = TOSA_GPIO_USB_PULLUP, 245 .gpio_pullup = TOSA_GPIO_USB_PULLUP,
244 .gpio_vbus = TOSA_GPIO_USB_IN, 246 .gpio_vbus = TOSA_GPIO_USB_IN,
245 .gpio_vbus_inverted = 1, 247 .gpio_vbus_inverted = 1,
246}; 248};
247 249
250static struct platform_device tosa_gpio_vbus = {
251 .name = "gpio-vbus",
252 .id = -1,
253 .dev = {
254 .platform_data = &tosa_udc_info,
255 },
256};
257
248/* 258/*
249 * MMC/SD Device 259 * MMC/SD Device
250 */ 260 */
@@ -874,6 +884,11 @@ static struct platform_device sharpsl_rom_device = {
874 .dev.platform_data = &sharpsl_rom_data, 884 .dev.platform_data = &sharpsl_rom_data,
875}; 885};
876 886
887static struct platform_device wm9712_device = {
888 .name = "wm9712-codec",
889 .id = -1,
890};
891
877static struct platform_device *devices[] __initdata = { 892static struct platform_device *devices[] __initdata = {
878 &tosascoop_device, 893 &tosascoop_device,
879 &tosascoop_jc_device, 894 &tosascoop_jc_device,
@@ -884,6 +899,8 @@ static struct platform_device *devices[] __initdata = {
884 &tosaled_device, 899 &tosaled_device,
885 &tosa_bt_device, 900 &tosa_bt_device,
886 &sharpsl_rom_device, 901 &sharpsl_rom_device,
902 &wm9712_device,
903 &tosa_gpio_vbus,
887}; 904};
888 905
889static void tosa_poweroff(void) 906static void tosa_poweroff(void)
@@ -893,9 +910,11 @@ static void tosa_poweroff(void)
893 910
894static void tosa_restart(char mode, const char *cmd) 911static void tosa_restart(char mode, const char *cmd)
895{ 912{
913 uint32_t msc0 = __raw_readl(MSC0);
914
896 /* Bootloader magic for a reboot */ 915 /* Bootloader magic for a reboot */
897 if((MSC0 & 0xffff0000) == 0x7ff00000) 916 if((msc0 & 0xffff0000) == 0x7ff00000)
898 MSC0 = (MSC0 & 0xffff) | 0x7ee00000; 917 __raw_writel((msc0 & 0xffff) | 0x7ee00000, MSC0);
899 918
900 tosa_poweroff(); 919 tosa_poweroff();
901} 920}
@@ -928,7 +947,6 @@ static void __init tosa_init(void)
928 dummy = gpiochip_reserve(TOSA_TC6393XB_GPIO_BASE, 16); 947 dummy = gpiochip_reserve(TOSA_TC6393XB_GPIO_BASE, 16);
929 948
930 pxa_set_mci_info(&tosa_mci_platform_data); 949 pxa_set_mci_info(&tosa_mci_platform_data);
931 pxa_set_udc_info(&udc_info);
932 pxa_set_ficp_info(&tosa_ficp_platform_data); 950 pxa_set_ficp_info(&tosa_ficp_platform_data);
933 pxa_set_i2c_info(NULL); 951 pxa_set_i2c_info(NULL);
934 pxa_set_ac97_info(NULL); 952 pxa_set_ac97_info(NULL);
@@ -952,10 +970,9 @@ static void __init fixup_tosa(struct machine_desc *desc,
952} 970}
953 971
954MACHINE_START(TOSA, "SHARP Tosa") 972MACHINE_START(TOSA, "SHARP Tosa")
955 .phys_io = 0x40000000,
956 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
957 .fixup = fixup_tosa, 973 .fixup = fixup_tosa,
958 .map_io = pxa_map_io, 974 .map_io = pxa25x_map_io,
975 .nr_irqs = TOSA_NR_IRQS,
959 .init_irq = pxa25x_init_irq, 976 .init_irq = pxa25x_init_irq,
960 .init_machine = tosa_init, 977 .init_machine = tosa_init,
961 .timer = &pxa_timer, 978 .timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c
index 0acff172ef22..687417a93698 100644
--- a/arch/arm/mach-pxa/trizeps4.c
+++ b/arch/arm/mach-pxa/trizeps4.c
@@ -15,7 +15,6 @@
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/kernel.h> 16#include <linux/kernel.h>
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/sysdev.h>
19#include <linux/interrupt.h> 18#include <linux/interrupt.h>
20#include <linux/sched.h> 19#include <linux/sched.h>
21#include <linux/bitops.h> 20#include <linux/bitops.h>
@@ -26,6 +25,7 @@
26#include <linux/dm9000.h> 25#include <linux/dm9000.h>
27#include <linux/mtd/physmap.h> 26#include <linux/mtd/physmap.h>
28#include <linux/mtd/partitions.h> 27#include <linux/mtd/partitions.h>
28#include <linux/i2c/pxa-i2c.h>
29 29
30#include <asm/types.h> 30#include <asm/types.h>
31#include <asm/setup.h> 31#include <asm/setup.h>
@@ -40,14 +40,13 @@
40#include <asm/mach/flash.h> 40#include <asm/mach/flash.h>
41 41
42#include <mach/pxa27x.h> 42#include <mach/pxa27x.h>
43#include <mach/pxa2xx_spi.h>
44#include <mach/trizeps4.h> 43#include <mach/trizeps4.h>
45#include <mach/audio.h> 44#include <mach/audio.h>
46#include <mach/pxafb.h> 45#include <mach/pxafb.h>
47#include <mach/mmc.h> 46#include <mach/mmc.h>
48#include <mach/irda.h> 47#include <mach/irda.h>
49#include <mach/ohci.h> 48#include <mach/ohci.h>
50#include <plat/i2c.h> 49#include <mach/smemc.h>
51 50
52#include "generic.h" 51#include "generic.h"
53#include "devices.h" 52#include "devices.h"
@@ -516,9 +515,9 @@ static void __init trizeps4_init(void)
516 pxa_set_stuart_info(NULL); 515 pxa_set_stuart_info(NULL);
517 516
518 if (0) /* dont know how to determine LCD */ 517 if (0) /* dont know how to determine LCD */
519 set_pxa_fb_info(&sharp_lcd); 518 pxa_set_fb_info(NULL, &sharp_lcd);
520 else 519 else
521 set_pxa_fb_info(&toshiba_lcd); 520 pxa_set_fb_info(NULL, &toshiba_lcd);
522 521
523 pxa_set_mci_info(&trizeps4_mci_platform_data); 522 pxa_set_mci_info(&trizeps4_mci_platform_data);
524#ifndef STATUS_LEDS_ON_STUART_PINS 523#ifndef STATUS_LEDS_ON_STUART_PINS
@@ -539,10 +538,10 @@ static void __init trizeps4_init(void)
539 538
540static void __init trizeps4_map_io(void) 539static void __init trizeps4_map_io(void)
541{ 540{
542 pxa_map_io(); 541 pxa27x_map_io();
543 iotable_init(trizeps4_io_desc, ARRAY_SIZE(trizeps4_io_desc)); 542 iotable_init(trizeps4_io_desc, ARRAY_SIZE(trizeps4_io_desc));
544 543
545 if ((MSC0 & 0x8) && (BOOT_DEF & 0x1)) { 544 if ((__raw_readl(MSC0) & 0x8) && (__raw_readl(BOOT_DEF) & 0x1)) {
546 /* if flash is 16 bit wide its a Trizeps4 WL */ 545 /* if flash is 16 bit wide its a Trizeps4 WL */
547 __machine_arch_type = MACH_TYPE_TRIZEPS4WL; 546 __machine_arch_type = MACH_TYPE_TRIZEPS4WL;
548 trizeps4_flash_data[0].width = 2; 547 trizeps4_flash_data[0].width = 2;
@@ -555,8 +554,6 @@ static void __init trizeps4_map_io(void)
555 554
556MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module") 555MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module")
557 /* MAINTAINER("Jürgen Schindele") */ 556 /* MAINTAINER("Jürgen Schindele") */
558 .phys_io = 0x40000000,
559 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
560 .boot_params = TRIZEPS4_SDRAM_BASE + 0x100, 557 .boot_params = TRIZEPS4_SDRAM_BASE + 0x100,
561 .init_machine = trizeps4_init, 558 .init_machine = trizeps4_init,
562 .map_io = trizeps4_map_io, 559 .map_io = trizeps4_map_io,
@@ -566,8 +563,6 @@ MACHINE_END
566 563
567MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module") 564MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module")
568 /* MAINTAINER("Jürgen Schindele") */ 565 /* MAINTAINER("Jürgen Schindele") */
569 .phys_io = 0x40000000,
570 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
571 .boot_params = TRIZEPS4_SDRAM_BASE + 0x100, 566 .boot_params = TRIZEPS4_SDRAM_BASE + 0x100,
572 .init_machine = trizeps4_init, 567 .init_machine = trizeps4_init,
573 .map_io = trizeps4_map_io, 568 .map_io = trizeps4_map_io,
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index e90114a7e246..903218eab56d 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -36,6 +36,7 @@
36#include <linux/gpio.h> 36#include <linux/gpio.h>
37#include <linux/jiffies.h> 37#include <linux/jiffies.h>
38#include <linux/i2c-gpio.h> 38#include <linux/i2c-gpio.h>
39#include <linux/i2c/pxa-i2c.h>
39#include <linux/serial_8250.h> 40#include <linux/serial_8250.h>
40#include <linux/smc91x.h> 41#include <linux/smc91x.h>
41#include <linux/pwm_backlight.h> 42#include <linux/pwm_backlight.h>
@@ -43,11 +44,11 @@
43#include <linux/mtd/mtd.h> 44#include <linux/mtd/mtd.h>
44#include <linux/mtd/partitions.h> 45#include <linux/mtd/partitions.h>
45#include <linux/mtd/physmap.h> 46#include <linux/mtd/physmap.h>
47#include <linux/syscore_ops.h>
46 48
47#include <mach/pxa25x.h> 49#include <mach/pxa25x.h>
48#include <mach/audio.h> 50#include <mach/audio.h>
49#include <mach/pxafb.h> 51#include <mach/pxafb.h>
50#include <plat/i2c.h>
51#include <mach/regs-uart.h> 52#include <mach/regs-uart.h>
52#include <mach/arcom-pcmcia.h> 53#include <mach/arcom-pcmcia.h>
53#include <mach/viper.h> 54#include <mach/viper.h>
@@ -130,20 +131,19 @@ static u8 viper_hw_version(void)
130 return v1; 131 return v1;
131} 132}
132 133
133/* CPU sysdev */ 134/* CPU system core operations. */
134static int viper_cpu_suspend(struct sys_device *sysdev, pm_message_t state) 135static int viper_cpu_suspend(void)
135{ 136{
136 viper_icr_set_bit(VIPER_ICR_R_DIS); 137 viper_icr_set_bit(VIPER_ICR_R_DIS);
137 return 0; 138 return 0;
138} 139}
139 140
140static int viper_cpu_resume(struct sys_device *sysdev) 141static void viper_cpu_resume(void)
141{ 142{
142 viper_icr_clear_bit(VIPER_ICR_R_DIS); 143 viper_icr_clear_bit(VIPER_ICR_R_DIS);
143 return 0;
144} 144}
145 145
146static struct sysdev_driver viper_cpu_sysdev_driver = { 146static struct syscore_ops viper_cpu_syscore_ops = {
147 .suspend = viper_cpu_suspend, 147 .suspend = viper_cpu_suspend,
148 .resume = viper_cpu_resume, 148 .resume = viper_cpu_resume,
149}; 149};
@@ -249,9 +249,9 @@ static inline int viper_bit_to_irq(int bit)
249 return viper_isa_irqs[bit] + PXA_ISA_IRQ(0); 249 return viper_isa_irqs[bit] + PXA_ISA_IRQ(0);
250} 250}
251 251
252static void viper_ack_irq(unsigned int irq) 252static void viper_ack_irq(struct irq_data *d)
253{ 253{
254 int viper_irq = viper_irq_to_bitmask(irq); 254 int viper_irq = viper_irq_to_bitmask(d->irq);
255 255
256 if (viper_irq & 0xff) 256 if (viper_irq & 0xff)
257 VIPER_LO_IRQ_STATUS = viper_irq; 257 VIPER_LO_IRQ_STATUS = viper_irq;
@@ -259,14 +259,14 @@ static void viper_ack_irq(unsigned int irq)
259 VIPER_HI_IRQ_STATUS = (viper_irq >> 8); 259 VIPER_HI_IRQ_STATUS = (viper_irq >> 8);
260} 260}
261 261
262static void viper_mask_irq(unsigned int irq) 262static void viper_mask_irq(struct irq_data *d)
263{ 263{
264 viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(irq)); 264 viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(d->irq));
265} 265}
266 266
267static void viper_unmask_irq(unsigned int irq) 267static void viper_unmask_irq(struct irq_data *d)
268{ 268{
269 viper_irq_enabled_mask |= viper_irq_to_bitmask(irq); 269 viper_irq_enabled_mask |= viper_irq_to_bitmask(d->irq);
270} 270}
271 271
272static inline unsigned long viper_irq_pending(void) 272static inline unsigned long viper_irq_pending(void)
@@ -283,7 +283,7 @@ static void viper_irq_handler(unsigned int irq, struct irq_desc *desc)
283 do { 283 do {
284 /* we're in a chained irq handler, 284 /* we're in a chained irq handler,
285 * so ack the interrupt by hand */ 285 * so ack the interrupt by hand */
286 desc->chip->ack(irq); 286 desc->irq_data.chip->irq_ack(&desc->irq_data);
287 287
288 if (likely(pending)) { 288 if (likely(pending)) {
289 irq = viper_bit_to_irq(__ffs(pending)); 289 irq = viper_bit_to_irq(__ffs(pending));
@@ -294,10 +294,10 @@ static void viper_irq_handler(unsigned int irq, struct irq_desc *desc)
294} 294}
295 295
296static struct irq_chip viper_irq_chip = { 296static struct irq_chip viper_irq_chip = {
297 .name = "ISA", 297 .name = "ISA",
298 .ack = viper_ack_irq, 298 .irq_ack = viper_ack_irq,
299 .mask = viper_mask_irq, 299 .irq_mask = viper_mask_irq,
300 .unmask = viper_unmask_irq 300 .irq_unmask = viper_unmask_irq
301}; 301};
302 302
303static void __init viper_init_irq(void) 303static void __init viper_init_irq(void)
@@ -310,14 +310,14 @@ static void __init viper_init_irq(void)
310 /* setup ISA IRQs */ 310 /* setup ISA IRQs */
311 for (level = 0; level < ARRAY_SIZE(viper_isa_irqs); level++) { 311 for (level = 0; level < ARRAY_SIZE(viper_isa_irqs); level++) {
312 isa_irq = viper_bit_to_irq(level); 312 isa_irq = viper_bit_to_irq(level);
313 set_irq_chip(isa_irq, &viper_irq_chip); 313 irq_set_chip_and_handler(isa_irq, &viper_irq_chip,
314 set_irq_handler(isa_irq, handle_edge_irq); 314 handle_edge_irq);
315 set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE); 315 set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE);
316 } 316 }
317 317
318 set_irq_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO), 318 irq_set_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO),
319 viper_irq_handler); 319 viper_irq_handler);
320 set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH); 320 irq_set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH);
321} 321}
322 322
323/* Flat Panel */ 323/* Flat Panel */
@@ -932,7 +932,7 @@ static void __init viper_init(void)
932 /* Wake-up serial console */ 932 /* Wake-up serial console */
933 viper_init_serial_gpio(); 933 viper_init_serial_gpio();
934 934
935 set_pxa_fb_info(&fb_info); 935 pxa_set_fb_info(NULL, &fb_info);
936 936
937 /* v1 hardware cannot use the datacs line */ 937 /* v1 hardware cannot use the datacs line */
938 version = viper_hw_version(); 938 version = viper_hw_version();
@@ -945,7 +945,7 @@ static void __init viper_init(void)
945 viper_init_vcore_gpios(); 945 viper_init_vcore_gpios();
946 viper_init_cpufreq(); 946 viper_init_cpufreq();
947 947
948 sysdev_driver_register(&cpu_sysdev_class, &viper_cpu_sysdev_driver); 948 register_syscore_ops(&viper_cpu_syscore_ops);
949 949
950 if (version) { 950 if (version) {
951 pr_info("viper: hardware v%di%d detected. " 951 pr_info("viper: hardware v%di%d detected. "
@@ -983,7 +983,7 @@ static struct map_desc viper_io_desc[] __initdata = {
983 983
984static void __init viper_map_io(void) 984static void __init viper_map_io(void)
985{ 985{
986 pxa_map_io(); 986 pxa25x_map_io();
987 987
988 iotable_init(viper_io_desc, ARRAY_SIZE(viper_io_desc)); 988 iotable_init(viper_io_desc, ARRAY_SIZE(viper_io_desc));
989 989
@@ -992,8 +992,6 @@ static void __init viper_map_io(void)
992 992
993MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC") 993MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC")
994 /* Maintainer: Marc Zyngier <maz@misterjones.org> */ 994 /* Maintainer: Marc Zyngier <maz@misterjones.org> */
995 .phys_io = 0x40000000,
996 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
997 .boot_params = 0xa0000100, 995 .boot_params = 0xa0000100,
998 .map_io = viper_map_io, 996 .map_io = viper_map_io,
999 .init_irq = viper_init_irq, 997 .init_irq = viper_init_irq,
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c
index 37d6173bbb66..67bd41488bf8 100644
--- a/arch/arm/mach-pxa/vpac270.c
+++ b/arch/arm/mach-pxa/vpac270.c
@@ -16,7 +16,6 @@
16#include <linux/gpio_keys.h> 16#include <linux/gpio_keys.h>
17#include <linux/input.h> 17#include <linux/input.h>
18#include <linux/gpio.h> 18#include <linux/gpio.h>
19#include <linux/sysdev.h>
20#include <linux/usb/gpio_vbus.h> 19#include <linux/usb/gpio_vbus.h>
21#include <linux/mtd/mtd.h> 20#include <linux/mtd/mtd.h>
22#include <linux/mtd/partitions.h> 21#include <linux/mtd/partitions.h>
@@ -26,6 +25,7 @@
26#include <linux/ucb1400.h> 25#include <linux/ucb1400.h>
27#include <linux/ata_platform.h> 26#include <linux/ata_platform.h>
28#include <linux/regulator/max1586.h> 27#include <linux/regulator/max1586.h>
28#include <linux/i2c/pxa-i2c.h>
29 29
30#include <asm/mach-types.h> 30#include <asm/mach-types.h>
31#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
@@ -40,8 +40,6 @@
40#include <mach/udc.h> 40#include <mach/udc.h>
41#include <mach/pata_pxa.h> 41#include <mach/pata_pxa.h>
42 42
43#include <plat/i2c.h>
44
45#include "generic.h" 43#include "generic.h"
46#include "devices.h" 44#include "devices.h"
47 45
@@ -573,7 +571,7 @@ static void __init vpac270_lcd_init(void)
573 } 571 }
574 572
575 vpac270_lcd_screen.pxafb_lcd_power = vpac270_lcd_power; 573 vpac270_lcd_screen.pxafb_lcd_power = vpac270_lcd_power;
576 set_pxa_fb_info(&vpac270_lcd_screen); 574 pxa_set_fb_info(NULL, &vpac270_lcd_screen);
577 return; 575 return;
578 576
579err2: 577err2:
@@ -718,10 +716,8 @@ static void __init vpac270_init(void)
718} 716}
719 717
720MACHINE_START(VPAC270, "Voipac PXA270") 718MACHINE_START(VPAC270, "Voipac PXA270")
721 .phys_io = 0x40000000,
722 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
723 .boot_params = 0xa0000100, 719 .boot_params = 0xa0000100,
724 .map_io = pxa_map_io, 720 .map_io = pxa27x_map_io,
725 .init_irq = pxa27x_init_irq, 721 .init_irq = pxa27x_init_irq,
726 .timer = &pxa_timer, 722 .timer = &pxa_timer,
727 .init_machine = vpac270_init 723 .init_machine = vpac270_init
diff --git a/arch/arm/mach-pxa/xcep.c b/arch/arm/mach-pxa/xcep.c
index d3b4e3f2e033..f55f8f2e0db3 100644
--- a/arch/arm/mach-pxa/xcep.c
+++ b/arch/arm/mach-pxa/xcep.c
@@ -16,6 +16,7 @@
16 16
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/i2c.h> 18#include <linux/i2c.h>
19#include <linux/i2c/pxa-i2c.h>
19#include <linux/smc91x.h> 20#include <linux/smc91x.h>
20#include <linux/mtd/mtd.h> 21#include <linux/mtd/mtd.h>
21#include <linux/mtd/partitions.h> 22#include <linux/mtd/partitions.h>
@@ -26,11 +27,10 @@
26#include <asm/mach/irq.h> 27#include <asm/mach/irq.h>
27#include <asm/mach/map.h> 28#include <asm/mach/map.h>
28 29
29#include <plat/i2c.h>
30
31#include <mach/hardware.h> 30#include <mach/hardware.h>
32#include <mach/pxa2xx-regs.h> 31#include <mach/pxa2xx-regs.h>
33#include <mach/mfp-pxa25x.h> 32#include <mach/mfp-pxa25x.h>
33#include <mach/smemc.h>
34 34
35#include "generic.h" 35#include "generic.h"
36 36
@@ -172,20 +172,18 @@ static void __init xcep_init(void)
172 172
173 /* See Intel XScale Developer's Guide for details */ 173 /* See Intel XScale Developer's Guide for details */
174 /* Set RDF and RDN to appropriate values (chip select 3 (smc91x)) */ 174 /* Set RDF and RDN to appropriate values (chip select 3 (smc91x)) */
175 MSC1 = (MSC1 & 0xffff) | 0xD5540000; 175 __raw_writel((__raw_readl(MSC1) & 0xffff) | 0xD5540000, MSC1);
176 /* Set RDF and RDN to appropriate values (chip select 5 (fpga)) */ 176 /* Set RDF and RDN to appropriate values (chip select 5 (fpga)) */
177 MSC2 = (MSC2 & 0xffff) | 0x72A00000; 177 __raw_writel((__raw_readl(MSC2) & 0xffff) | 0x72A00000, MSC2);
178 178
179 platform_add_devices(ARRAY_AND_SIZE(devices)); 179 platform_add_devices(ARRAY_AND_SIZE(devices));
180 pxa_set_i2c_info(&xcep_i2c_platform_data); 180 pxa_set_i2c_info(&xcep_i2c_platform_data);
181} 181}
182 182
183MACHINE_START(XCEP, "Iskratel XCEP") 183MACHINE_START(XCEP, "Iskratel XCEP")
184 .phys_io = 0x40000000,
185 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
186 .boot_params = 0xa0000100, 184 .boot_params = 0xa0000100,
187 .init_machine = xcep_init, 185 .init_machine = xcep_init,
188 .map_io = pxa_map_io, 186 .map_io = pxa25x_map_io,
189 .init_irq = pxa25x_init_irq, 187 .init_irq = pxa25x_init_irq,
190 .timer = &pxa_timer, 188 .timer = &pxa_timer,
191MACHINE_END 189MACHINE_END
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c
index f0d02288b4ca..fbe9e02e2f9f 100644
--- a/arch/arm/mach-pxa/z2.c
+++ b/arch/arm/mach-pxa/z2.c
@@ -20,6 +20,7 @@
20#include <linux/z2_battery.h> 20#include <linux/z2_battery.h>
21#include <linux/dma-mapping.h> 21#include <linux/dma-mapping.h>
22#include <linux/spi/spi.h> 22#include <linux/spi/spi.h>
23#include <linux/spi/pxa2xx_spi.h>
23#include <linux/spi/libertas_spi.h> 24#include <linux/spi/libertas_spi.h>
24#include <linux/spi/lms283gf05.h> 25#include <linux/spi/lms283gf05.h>
25#include <linux/power_supply.h> 26#include <linux/power_supply.h>
@@ -28,6 +29,7 @@
28#include <linux/gpio_keys.h> 29#include <linux/gpio_keys.h>
29#include <linux/delay.h> 30#include <linux/delay.h>
30#include <linux/regulator/machine.h> 31#include <linux/regulator/machine.h>
32#include <linux/i2c/pxa-i2c.h>
31 33
32#include <asm/mach-types.h> 34#include <asm/mach-types.h>
33#include <asm/mach/arch.h> 35#include <asm/mach/arch.h>
@@ -37,10 +39,7 @@
37#include <mach/z2.h> 39#include <mach/z2.h>
38#include <mach/pxafb.h> 40#include <mach/pxafb.h>
39#include <mach/mmc.h> 41#include <mach/mmc.h>
40#include <mach/pxa27x_keypad.h> 42#include <plat/pxa27x_keypad.h>
41#include <mach/pxa2xx_spi.h>
42
43#include <plat/i2c.h>
44 43
45#include "generic.h" 44#include "generic.h"
46#include "devices.h" 45#include "devices.h"
@@ -92,13 +91,13 @@ static unsigned long z2_pin_config[] = {
92 GPIO47_STUART_TXD, 91 GPIO47_STUART_TXD,
93 92
94 /* Keypad */ 93 /* Keypad */
95 GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH, 94 GPIO100_KP_MKIN_0,
96 GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH, 95 GPIO101_KP_MKIN_1,
97 GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH, 96 GPIO102_KP_MKIN_2,
98 GPIO34_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH, 97 GPIO34_KP_MKIN_3,
99 GPIO38_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH, 98 GPIO38_KP_MKIN_4,
100 GPIO16_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH, 99 GPIO16_KP_MKIN_5,
101 GPIO17_KP_MKIN_6 | WAKEUP_ON_LEVEL_HIGH, 100 GPIO17_KP_MKIN_6,
102 GPIO103_KP_MKOUT_0, 101 GPIO103_KP_MKOUT_0,
103 GPIO104_KP_MKOUT_1, 102 GPIO104_KP_MKOUT_1,
104 GPIO105_KP_MKOUT_2, 103 GPIO105_KP_MKOUT_2,
@@ -139,8 +138,7 @@ static unsigned long z2_pin_config[] = {
139 GPIO1_GPIO, /* Power button */ 138 GPIO1_GPIO, /* Power button */
140 GPIO37_GPIO, /* Headphone detect */ 139 GPIO37_GPIO, /* Headphone detect */
141 GPIO98_GPIO, /* Lid switch */ 140 GPIO98_GPIO, /* Lid switch */
142 GPIO14_GPIO, /* WiFi Reset */ 141 GPIO14_GPIO, /* WiFi Power */
143 GPIO15_GPIO, /* WiFi Power */
144 GPIO24_GPIO, /* WiFi CS */ 142 GPIO24_GPIO, /* WiFi CS */
145 GPIO36_GPIO, /* WiFi IRQ */ 143 GPIO36_GPIO, /* WiFi IRQ */
146 GPIO88_GPIO, /* LCD CS */ 144 GPIO88_GPIO, /* LCD CS */
@@ -205,7 +203,7 @@ static struct platform_pwm_backlight_data z2_backlight_data[] = {
205 /* Keypad Backlight */ 203 /* Keypad Backlight */
206 .pwm_id = 1, 204 .pwm_id = 1,
207 .max_brightness = 1023, 205 .max_brightness = 1023,
208 .dft_brightness = 512, 206 .dft_brightness = 0,
209 .pwm_period_ns = 1260320, 207 .pwm_period_ns = 1260320,
210 }, 208 },
211 [1] = { 209 [1] = {
@@ -272,7 +270,7 @@ static struct pxafb_mach_info z2_lcd_screen = {
272 270
273static void __init z2_lcd_init(void) 271static void __init z2_lcd_init(void)
274{ 272{
275 set_pxa_fb_info(&z2_lcd_screen); 273 pxa_set_fb_info(NULL, &z2_lcd_screen);
276} 274}
277#else 275#else
278static inline void z2_lcd_init(void) {} 276static inline void z2_lcd_init(void) {}
@@ -310,12 +308,12 @@ struct gpio_led z2_gpio_leds[] = {
310 .active_low = 1, 308 .active_low = 1,
311}, { 309}, {
312 .name = "z2:green:charged", 310 .name = "z2:green:charged",
313 .default_trigger = "none", 311 .default_trigger = "mmc0",
314 .gpio = GPIO85_ZIPITZ2_LED_CHARGED, 312 .gpio = GPIO85_ZIPITZ2_LED_CHARGED,
315 .active_low = 1, 313 .active_low = 1,
316}, { 314}, {
317 .name = "z2:amber:charging", 315 .name = "z2:amber:charging",
318 .default_trigger = "none", 316 .default_trigger = "Z2-charging-or-full",
319 .gpio = GPIO83_ZIPITZ2_LED_CHARGING, 317 .gpio = GPIO83_ZIPITZ2_LED_CHARGING,
320 .active_low = 1, 318 .active_low = 1,
321}, 319},
@@ -428,8 +426,22 @@ static inline void z2_mkp_init(void) {}
428 ******************************************************************************/ 426 ******************************************************************************/
429#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 427#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
430static struct gpio_keys_button z2_pxa_buttons[] = { 428static struct gpio_keys_button z2_pxa_buttons[] = {
431 {KEY_POWER, GPIO1_ZIPITZ2_POWER_BUTTON, 0, "Power Button" }, 429 {
432 {KEY_CLOSE, GPIO98_ZIPITZ2_LID_BUTTON, 0, "Lid Button" }, 430 .code = KEY_POWER,
431 .gpio = GPIO1_ZIPITZ2_POWER_BUTTON,
432 .active_low = 0,
433 .desc = "Power Button",
434 .wakeup = 1,
435 .type = EV_KEY,
436 },
437 {
438 .code = SW_LID,
439 .gpio = GPIO98_ZIPITZ2_LID_BUTTON,
440 .active_low = 1,
441 .desc = "Lid Switch",
442 .wakeup = 0,
443 .type = EV_SW,
444 },
433}; 445};
434 446
435static struct gpio_keys_platform_data z2_pxa_keys_data = { 447static struct gpio_keys_platform_data z2_pxa_keys_data = {
@@ -462,9 +474,9 @@ static struct z2_battery_info batt_chip_info = {
462 .batt_I2C_addr = 0x55, 474 .batt_I2C_addr = 0x55,
463 .batt_I2C_reg = 2, 475 .batt_I2C_reg = 2,
464 .charge_gpio = GPIO0_ZIPITZ2_AC_DETECT, 476 .charge_gpio = GPIO0_ZIPITZ2_AC_DETECT,
465 .min_voltage = 2400000, 477 .min_voltage = 3475000,
466 .max_voltage = 3700000, 478 .max_voltage = 4190000,
467 .batt_div = 69, 479 .batt_div = 59,
468 .batt_mult = 1000000, 480 .batt_mult = 1000000,
469 .batt_tech = POWER_SUPPLY_TECHNOLOGY_LION, 481 .batt_tech = POWER_SUPPLY_TECHNOLOGY_LION,
470 .batt_name = "Z2", 482 .batt_name = "Z2",
@@ -498,26 +510,16 @@ static int z2_lbs_spi_setup(struct spi_device *spi)
498{ 510{
499 int ret = 0; 511 int ret = 0;
500 512
501 ret = gpio_request(GPIO15_ZIPITZ2_WIFI_POWER, "WiFi Power"); 513 ret = gpio_request(GPIO14_ZIPITZ2_WIFI_POWER, "WiFi Power");
502 if (ret) 514 if (ret)
503 goto err; 515 goto err;
504 516
505 ret = gpio_direction_output(GPIO15_ZIPITZ2_WIFI_POWER, 1); 517 ret = gpio_direction_output(GPIO14_ZIPITZ2_WIFI_POWER, 1);
506 if (ret) 518 if (ret)
507 goto err2; 519 goto err2;
508 520
509 ret = gpio_request(GPIO14_ZIPITZ2_WIFI_RESET, "WiFi Reset"); 521 /* Wait until card is powered on */
510 if (ret)
511 goto err2;
512
513 ret = gpio_direction_output(GPIO14_ZIPITZ2_WIFI_RESET, 0);
514 if (ret)
515 goto err3;
516
517 /* Reset the card */
518 mdelay(180); 522 mdelay(180);
519 gpio_set_value(GPIO14_ZIPITZ2_WIFI_RESET, 1);
520 mdelay(20);
521 523
522 spi->bits_per_word = 16; 524 spi->bits_per_word = 16;
523 spi->mode = SPI_MODE_2, 525 spi->mode = SPI_MODE_2,
@@ -526,22 +528,18 @@ static int z2_lbs_spi_setup(struct spi_device *spi)
526 528
527 return 0; 529 return 0;
528 530
529err3:
530 gpio_free(GPIO14_ZIPITZ2_WIFI_RESET);
531err2: 531err2:
532 gpio_free(GPIO15_ZIPITZ2_WIFI_POWER); 532 gpio_free(GPIO14_ZIPITZ2_WIFI_POWER);
533err: 533err:
534 return ret; 534 return ret;
535}; 535};
536 536
537static int z2_lbs_spi_teardown(struct spi_device *spi) 537static int z2_lbs_spi_teardown(struct spi_device *spi)
538{ 538{
539 gpio_set_value(GPIO14_ZIPITZ2_WIFI_RESET, 0); 539 gpio_set_value(GPIO14_ZIPITZ2_WIFI_POWER, 0);
540 gpio_set_value(GPIO15_ZIPITZ2_WIFI_POWER, 0); 540 gpio_free(GPIO14_ZIPITZ2_WIFI_POWER);
541 gpio_free(GPIO14_ZIPITZ2_WIFI_RESET);
542 gpio_free(GPIO15_ZIPITZ2_WIFI_POWER);
543 return 0;
544 541
542 return 0;
545}; 543};
546 544
547static struct pxa2xx_spi_chip z2_lbs_chip_info = { 545static struct pxa2xx_spi_chip z2_lbs_chip_info = {
@@ -703,10 +701,8 @@ static void __init z2_init(void)
703} 701}
704 702
705MACHINE_START(ZIPIT2, "Zipit Z2") 703MACHINE_START(ZIPIT2, "Zipit Z2")
706 .phys_io = 0x40000000,
707 .boot_params = 0xa0000100, 704 .boot_params = 0xa0000100,
708 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, 705 .map_io = pxa27x_map_io,
709 .map_io = pxa_map_io,
710 .init_irq = pxa27x_init_irq, 706 .init_irq = pxa27x_init_irq,
711 .timer = &pxa_timer, 707 .timer = &pxa_timer,
712 .init_machine = z2_init, 708 .init_machine = z2_init,
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index 03b9cb910e08..00363c7ac182 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -20,10 +20,12 @@
20#include <linux/dm9000.h> 20#include <linux/dm9000.h>
21#include <linux/mmc/host.h> 21#include <linux/mmc/host.h>
22#include <linux/spi/spi.h> 22#include <linux/spi/spi.h>
23#include <linux/spi/pxa2xx_spi.h>
23#include <linux/mtd/mtd.h> 24#include <linux/mtd/mtd.h>
24#include <linux/mtd/partitions.h> 25#include <linux/mtd/partitions.h>
25#include <linux/mtd/physmap.h> 26#include <linux/mtd/physmap.h>
26#include <linux/i2c.h> 27#include <linux/i2c.h>
28#include <linux/i2c/pxa-i2c.h>
27#include <linux/i2c/pca953x.h> 29#include <linux/i2c/pca953x.h>
28#include <linux/apm-emulation.h> 30#include <linux/apm-emulation.h>
29#include <linux/can/platform/mcp251x.h> 31#include <linux/can/platform/mcp251x.h>
@@ -32,8 +34,6 @@
32#include <asm/mach/arch.h> 34#include <asm/mach/arch.h>
33#include <asm/mach/map.h> 35#include <asm/mach/map.h>
34 36
35#include <plat/i2c.h>
36
37#include <mach/pxa2xx-regs.h> 37#include <mach/pxa2xx-regs.h>
38#include <mach/regs-uart.h> 38#include <mach/regs-uart.h>
39#include <mach/ohci.h> 39#include <mach/ohci.h>
@@ -41,12 +41,12 @@
41#include <mach/pxa27x-udc.h> 41#include <mach/pxa27x-udc.h>
42#include <mach/udc.h> 42#include <mach/udc.h>
43#include <mach/pxafb.h> 43#include <mach/pxafb.h>
44#include <mach/pxa2xx_spi.h>
45#include <mach/mfp-pxa27x.h> 44#include <mach/mfp-pxa27x.h>
46#include <mach/pm.h> 45#include <mach/pm.h>
47#include <mach/audio.h> 46#include <mach/audio.h>
48#include <mach/arcom-pcmcia.h> 47#include <mach/arcom-pcmcia.h>
49#include <mach/zeus.h> 48#include <mach/zeus.h>
49#include <mach/smemc.h>
50 50
51#include "generic.h" 51#include "generic.h"
52 52
@@ -82,19 +82,19 @@ static inline int zeus_bit_to_irq(int bit)
82 return zeus_isa_irqs[bit] + PXA_ISA_IRQ(0); 82 return zeus_isa_irqs[bit] + PXA_ISA_IRQ(0);
83} 83}
84 84
85static void zeus_ack_irq(unsigned int irq) 85static void zeus_ack_irq(struct irq_data *d)
86{ 86{
87 __raw_writew(zeus_irq_to_bitmask(irq), ZEUS_CPLD_ISA_IRQ); 87 __raw_writew(zeus_irq_to_bitmask(d->irq), ZEUS_CPLD_ISA_IRQ);
88} 88}
89 89
90static void zeus_mask_irq(unsigned int irq) 90static void zeus_mask_irq(struct irq_data *d)
91{ 91{
92 zeus_irq_enabled_mask &= ~(zeus_irq_to_bitmask(irq)); 92 zeus_irq_enabled_mask &= ~(zeus_irq_to_bitmask(d->irq));
93} 93}
94 94
95static void zeus_unmask_irq(unsigned int irq) 95static void zeus_unmask_irq(struct irq_data *d)
96{ 96{
97 zeus_irq_enabled_mask |= zeus_irq_to_bitmask(irq); 97 zeus_irq_enabled_mask |= zeus_irq_to_bitmask(d->irq);
98} 98}
99 99
100static inline unsigned long zeus_irq_pending(void) 100static inline unsigned long zeus_irq_pending(void)
@@ -110,7 +110,7 @@ static void zeus_irq_handler(unsigned int irq, struct irq_desc *desc)
110 do { 110 do {
111 /* we're in a chained irq handler, 111 /* we're in a chained irq handler,
112 * so ack the interrupt by hand */ 112 * so ack the interrupt by hand */
113 desc->chip->ack(gpio_to_irq(ZEUS_ISA_GPIO)); 113 desc->irq_data.chip->irq_ack(&desc->irq_data);
114 114
115 if (likely(pending)) { 115 if (likely(pending)) {
116 irq = zeus_bit_to_irq(__ffs(pending)); 116 irq = zeus_bit_to_irq(__ffs(pending));
@@ -121,10 +121,10 @@ static void zeus_irq_handler(unsigned int irq, struct irq_desc *desc)
121} 121}
122 122
123static struct irq_chip zeus_irq_chip = { 123static struct irq_chip zeus_irq_chip = {
124 .name = "ISA", 124 .name = "ISA",
125 .ack = zeus_ack_irq, 125 .irq_ack = zeus_ack_irq,
126 .mask = zeus_mask_irq, 126 .irq_mask = zeus_mask_irq,
127 .unmask = zeus_unmask_irq, 127 .irq_unmask = zeus_unmask_irq,
128}; 128};
129 129
130static void __init zeus_init_irq(void) 130static void __init zeus_init_irq(void)
@@ -136,22 +136,23 @@ static void __init zeus_init_irq(void)
136 136
137 /* Peripheral IRQs. It would be nice to move those inside driver 137 /* Peripheral IRQs. It would be nice to move those inside driver
138 configuration, but it is not supported at the moment. */ 138 configuration, but it is not supported at the moment. */
139 set_irq_type(gpio_to_irq(ZEUS_AC97_GPIO), IRQ_TYPE_EDGE_RISING); 139 irq_set_irq_type(gpio_to_irq(ZEUS_AC97_GPIO), IRQ_TYPE_EDGE_RISING);
140 set_irq_type(gpio_to_irq(ZEUS_WAKEUP_GPIO), IRQ_TYPE_EDGE_RISING); 140 irq_set_irq_type(gpio_to_irq(ZEUS_WAKEUP_GPIO), IRQ_TYPE_EDGE_RISING);
141 set_irq_type(gpio_to_irq(ZEUS_PTT_GPIO), IRQ_TYPE_EDGE_RISING); 141 irq_set_irq_type(gpio_to_irq(ZEUS_PTT_GPIO), IRQ_TYPE_EDGE_RISING);
142 set_irq_type(gpio_to_irq(ZEUS_EXTGPIO_GPIO), IRQ_TYPE_EDGE_FALLING); 142 irq_set_irq_type(gpio_to_irq(ZEUS_EXTGPIO_GPIO),
143 set_irq_type(gpio_to_irq(ZEUS_CAN_GPIO), IRQ_TYPE_EDGE_FALLING); 143 IRQ_TYPE_EDGE_FALLING);
144 irq_set_irq_type(gpio_to_irq(ZEUS_CAN_GPIO), IRQ_TYPE_EDGE_FALLING);
144 145
145 /* Setup ISA IRQs */ 146 /* Setup ISA IRQs */
146 for (level = 0; level < ARRAY_SIZE(zeus_isa_irqs); level++) { 147 for (level = 0; level < ARRAY_SIZE(zeus_isa_irqs); level++) {
147 isa_irq = zeus_bit_to_irq(level); 148 isa_irq = zeus_bit_to_irq(level);
148 set_irq_chip(isa_irq, &zeus_irq_chip); 149 irq_set_chip_and_handler(isa_irq, &zeus_irq_chip,
149 set_irq_handler(isa_irq, handle_edge_irq); 150 handle_edge_irq);
150 set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE); 151 set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE);
151 } 152 }
152 153
153 set_irq_type(gpio_to_irq(ZEUS_ISA_GPIO), IRQ_TYPE_EDGE_RISING); 154 irq_set_irq_type(gpio_to_irq(ZEUS_ISA_GPIO), IRQ_TYPE_EDGE_RISING);
154 set_irq_chained_handler(gpio_to_irq(ZEUS_ISA_GPIO), zeus_irq_handler); 155 irq_set_chained_handler(gpio_to_irq(ZEUS_ISA_GPIO), zeus_irq_handler);
155} 156}
156 157
157 158
@@ -675,7 +676,7 @@ static struct pxa2xx_udc_mach_info zeus_udc_info = {
675static void zeus_power_off(void) 676static void zeus_power_off(void)
676{ 677{
677 local_irq_disable(); 678 local_irq_disable();
678 pxa27x_cpu_suspend(PWRMODE_DEEPSLEEP); 679 pxa27x_cpu_suspend(PWRMODE_DEEPSLEEP, PLAT_PHYS_OFFSET - PAGE_OFFSET);
679} 680}
680#else 681#else
681#define zeus_power_off NULL 682#define zeus_power_off NULL
@@ -823,13 +824,16 @@ static mfp_cfg_t zeus_pin_config[] __initdata = {
823static void __init zeus_init(void) 824static void __init zeus_init(void)
824{ 825{
825 u16 dm9000_msc = DM9K_MSC_VALUE; 826 u16 dm9000_msc = DM9K_MSC_VALUE;
827 u32 msc0, msc1;
826 828
827 system_rev = __raw_readw(ZEUS_CPLD_VERSION); 829 system_rev = __raw_readw(ZEUS_CPLD_VERSION);
828 pr_info("Zeus CPLD V%dI%d\n", (system_rev & 0xf0) >> 4, (system_rev & 0x0f)); 830 pr_info("Zeus CPLD V%dI%d\n", (system_rev & 0xf0) >> 4, (system_rev & 0x0f));
829 831
830 /* Fix timings for dm9000s (CS1/CS2)*/ 832 /* Fix timings for dm9000s (CS1/CS2)*/
831 MSC0 = (MSC0 & 0xffff) | (dm9000_msc << 16); 833 msc0 = (__raw_readl(MSC0) & 0x0000ffff) | (dm9000_msc << 16);
832 MSC1 = (MSC1 & 0xffff0000) | dm9000_msc; 834 msc1 = (__raw_readl(MSC1) & 0xffff0000) | dm9000_msc;
835 __raw_writel(msc0, MSC0);
836 __raw_writel(msc1, MSC1);
833 837
834 pm_power_off = zeus_power_off; 838 pm_power_off = zeus_power_off;
835 zeus_setup_apm(); 839 zeus_setup_apm();
@@ -843,7 +847,7 @@ static void __init zeus_init(void)
843 if (zeus_setup_fb_gpios()) 847 if (zeus_setup_fb_gpios())
844 pr_err("Failed to setup fb gpios\n"); 848 pr_err("Failed to setup fb gpios\n");
845 else 849 else
846 set_pxa_fb_info(&zeus_fb_info); 850 pxa_set_fb_info(NULL, &zeus_fb_info);
847 851
848 pxa_set_mci_info(&zeus_mci_platform_data); 852 pxa_set_mci_info(&zeus_mci_platform_data);
849 pxa_set_udc_info(&zeus_udc_info); 853 pxa_set_udc_info(&zeus_udc_info);
@@ -883,7 +887,7 @@ static struct map_desc zeus_io_desc[] __initdata = {
883 887
884static void __init zeus_map_io(void) 888static void __init zeus_map_io(void)
885{ 889{
886 pxa_map_io(); 890 pxa27x_map_io();
887 891
888 iotable_init(zeus_io_desc, ARRAY_SIZE(zeus_io_desc)); 892 iotable_init(zeus_io_desc, ARRAY_SIZE(zeus_io_desc));
889 893
@@ -900,10 +904,9 @@ static void __init zeus_map_io(void)
900 904
901MACHINE_START(ARCOM_ZEUS, "Arcom/Eurotech ZEUS") 905MACHINE_START(ARCOM_ZEUS, "Arcom/Eurotech ZEUS")
902 /* Maintainer: Marc Zyngier <maz@misterjones.org> */ 906 /* Maintainer: Marc Zyngier <maz@misterjones.org> */
903 .phys_io = 0x40000000,
904 .io_pg_offst = ((io_p2v(0x40000000) >> 18) & 0xfffc),
905 .boot_params = 0xa0000100, 907 .boot_params = 0xa0000100,
906 .map_io = zeus_map_io, 908 .map_io = zeus_map_io,
909 .nr_irqs = ZEUS_NR_IRQS,
907 .init_irq = zeus_init_irq, 910 .init_irq = zeus_init_irq,
908 .timer = &pxa_timer, 911 .timer = &pxa_timer,
909 .init_machine = zeus_init, 912 .init_machine = zeus_init,
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c
index c479cbecf784..5821185f77ab 100644
--- a/arch/arm/mach-pxa/zylonite.c
+++ b/arch/arm/mach-pxa/zylonite.c
@@ -30,7 +30,7 @@
30#include <mach/zylonite.h> 30#include <mach/zylonite.h>
31#include <mach/mmc.h> 31#include <mach/mmc.h>
32#include <mach/ohci.h> 32#include <mach/ohci.h>
33#include <mach/pxa27x_keypad.h> 33#include <plat/pxa27x_keypad.h>
34#include <plat/pxa3xx_nand.h> 34#include <plat/pxa3xx_nand.h>
35 35
36#include "devices.h" 36#include "devices.h"
@@ -45,6 +45,16 @@ int wm9713_irq;
45int lcd_id; 45int lcd_id;
46int lcd_orientation; 46int lcd_orientation;
47 47
48struct platform_device pxa_device_wm9713_audio = {
49 .name = "wm9713-codec",
50 .id = -1,
51};
52
53static void __init zylonite_init_wm9713_audio(void)
54{
55 platform_device_register(&pxa_device_wm9713_audio);
56}
57
48static struct resource smc91x_resources[] = { 58static struct resource smc91x_resources[] = {
49 [0] = { 59 [0] = {
50 .start = ZYLONITE_ETH_PHYS + 0x300, 60 .start = ZYLONITE_ETH_PHYS + 0x300,
@@ -198,7 +208,7 @@ static void __init zylonite_init_lcd(void)
198 platform_device_register(&zylonite_backlight_device); 208 platform_device_register(&zylonite_backlight_device);
199 209
200 if (lcd_id & 0x20) { 210 if (lcd_id & 0x20) {
201 set_pxa_fb_info(&zylonite_sharp_lcd_info); 211 pxa_set_fb_info(NULL, &zylonite_sharp_lcd_info);
202 return; 212 return;
203 } 213 }
204 214
@@ -210,7 +220,7 @@ static void __init zylonite_init_lcd(void)
210 else 220 else
211 zylonite_toshiba_lcd_info.modes = &toshiba_ltm04c380k_mode; 221 zylonite_toshiba_lcd_info.modes = &toshiba_ltm04c380k_mode;
212 222
213 set_pxa_fb_info(&zylonite_toshiba_lcd_info); 223 pxa_set_fb_info(NULL, &zylonite_toshiba_lcd_info);
214} 224}
215#else 225#else
216static inline void zylonite_init_lcd(void) {} 226static inline void zylonite_init_lcd(void) {}
@@ -408,13 +418,13 @@ static void __init zylonite_init(void)
408 zylonite_init_nand(); 418 zylonite_init_nand();
409 zylonite_init_leds(); 419 zylonite_init_leds();
410 zylonite_init_ohci(); 420 zylonite_init_ohci();
421 zylonite_init_wm9713_audio();
411} 422}
412 423
413MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)") 424MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)")
414 .phys_io = 0x40000000,
415 .boot_params = 0xa0000100, 425 .boot_params = 0xa0000100,
416 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, 426 .map_io = pxa3xx_map_io,
417 .map_io = pxa_map_io, 427 .nr_irqs = ZYLONITE_NR_IRQS,
418 .init_irq = pxa3xx_init_irq, 428 .init_irq = pxa3xx_init_irq,
419 .timer = &pxa_timer, 429 .timer = &pxa_timer,
420 .init_machine = zylonite_init, 430 .init_machine = zylonite_init,
diff --git a/arch/arm/mach-pxa/zylonite_pxa300.c b/arch/arm/mach-pxa/zylonite_pxa300.c
index 3aa73b3e33f2..93c64d8d7de9 100644
--- a/arch/arm/mach-pxa/zylonite_pxa300.c
+++ b/arch/arm/mach-pxa/zylonite_pxa300.c
@@ -17,11 +17,11 @@
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/i2c.h> 19#include <linux/i2c.h>
20#include <linux/i2c/pxa-i2c.h>
20#include <linux/i2c/pca953x.h> 21#include <linux/i2c/pca953x.h>
21#include <linux/gpio.h> 22#include <linux/gpio.h>
22 23
23#include <mach/pxa300.h> 24#include <mach/pxa300.h>
24#include <plat/i2c.h>
25#include <mach/zylonite.h> 25#include <mach/zylonite.h>
26 26
27#include "generic.h" 27#include "generic.h"