diff options
author | Dmitry Baryshkov <dbaryshkov@gmail.com> | 2008-04-10 06:00:32 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-04-19 06:29:07 -0400 |
commit | 2cb4734232e62ee95c1f7dafdc032b652eef49d7 (patch) | |
tree | a62d969fc66e5cfab04302d74705d70bd26f0ac1 /arch/arm/mach-pxa/tosa.c | |
parent | 64c1dd3bbf67c958992c098d5d464a014df3fa46 (diff) |
[ARM] 4960/1: Rewrite tosa pin configuration to use MFP tables.
Clean up all pins configuration to use currently proposed MFP table
schema.
Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Acked-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-pxa/tosa.c')
-rw-r--r-- | arch/arm/mach-pxa/tosa.c | 151 |
1 files changed, 109 insertions, 42 deletions
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c index d427d87b4fe8..7d35f9ef8567 100644 --- a/arch/arm/mach-pxa/tosa.c +++ b/arch/arm/mach-pxa/tosa.c | |||
@@ -32,7 +32,7 @@ | |||
32 | #include <asm/system.h> | 32 | #include <asm/system.h> |
33 | #include <asm/arch/pxa-regs.h> | 33 | #include <asm/arch/pxa-regs.h> |
34 | #include <asm/arch/pxa2xx-regs.h> | 34 | #include <asm/arch/pxa2xx-regs.h> |
35 | #include <asm/arch/pxa2xx-gpio.h> | 35 | #include <asm/arch/mfp-pxa25x.h> |
36 | #include <asm/arch/irda.h> | 36 | #include <asm/arch/irda.h> |
37 | #include <asm/arch/mmc.h> | 37 | #include <asm/arch/mmc.h> |
38 | #include <asm/arch/udc.h> | 38 | #include <asm/arch/udc.h> |
@@ -48,6 +48,110 @@ | |||
48 | #include "generic.h" | 48 | #include "generic.h" |
49 | #include "devices.h" | 49 | #include "devices.h" |
50 | 50 | ||
51 | static unsigned long tosa_pin_config[] = { | ||
52 | GPIO78_nCS_2, /* Scoop */ | ||
53 | GPIO80_nCS_4, /* tg6393xb */ | ||
54 | GPIO33_nCS_5, /* Scoop */ | ||
55 | |||
56 | // GPIO76 CARD_VCC_ON1 | ||
57 | |||
58 | GPIO19_GPIO, /* Reset out */ | ||
59 | GPIO1_RST | WAKEUP_ON_EDGE_FALL, | ||
60 | |||
61 | GPIO0_GPIO | WAKEUP_ON_EDGE_FALL, /* WAKE_UP */ | ||
62 | GPIO2_GPIO | WAKEUP_ON_EDGE_BOTH, /* AC_IN */ | ||
63 | GPIO3_GPIO | WAKEUP_ON_EDGE_FALL, /* RECORD */ | ||
64 | GPIO4_GPIO | WAKEUP_ON_EDGE_FALL, /* SYNC */ | ||
65 | GPIO20_GPIO, /* EAR_IN */ | ||
66 | GPIO22_GPIO, /* On */ | ||
67 | |||
68 | GPIO5_GPIO, /* USB_IN */ | ||
69 | GPIO32_GPIO, /* Pen IRQ */ | ||
70 | |||
71 | GPIO7_GPIO, /* Jacket Detect */ | ||
72 | GPIO14_GPIO, /* BAT0_CRG */ | ||
73 | GPIO12_GPIO, /* BAT1_CRG */ | ||
74 | GPIO17_GPIO, /* BAT0_LOW */ | ||
75 | GPIO84_GPIO, /* BAT1_LOW */ | ||
76 | GPIO38_GPIO, /* BAT_LOCK */ | ||
77 | |||
78 | GPIO11_3_6MHz, | ||
79 | GPIO15_GPIO, /* TC6393XB IRQ */ | ||
80 | GPIO18_RDY, | ||
81 | GPIO27_GPIO, /* LCD Sync */ | ||
82 | |||
83 | /* MMC */ | ||
84 | GPIO6_MMC_CLK, | ||
85 | GPIO8_MMC_CS0, | ||
86 | GPIO9_GPIO, /* Detect */ | ||
87 | // GPIO10 nSD_INT | ||
88 | |||
89 | /* CF */ | ||
90 | GPIO13_GPIO, /* CD_IRQ */ | ||
91 | GPIO21_GPIO, /* Main Slot IRQ */ | ||
92 | GPIO36_GPIO, /* Jacket Slot IRQ */ | ||
93 | GPIO48_nPOE, | ||
94 | GPIO49_nPWE, | ||
95 | GPIO50_nPIOR, | ||
96 | GPIO51_nPIOW, | ||
97 | GPIO52_nPCE_1, | ||
98 | GPIO53_nPCE_2, | ||
99 | GPIO54_nPSKTSEL, | ||
100 | GPIO55_nPREG, | ||
101 | GPIO56_nPWAIT, | ||
102 | GPIO57_nIOIS16, | ||
103 | |||
104 | /* AC97 */ | ||
105 | GPIO31_AC97_SYNC, | ||
106 | GPIO30_AC97_SDATA_OUT, | ||
107 | GPIO28_AC97_BITCLK, | ||
108 | GPIO29_AC97_SDATA_IN_0, | ||
109 | // GPIO79 nAUD_IRQ | ||
110 | |||
111 | /* FFUART */ | ||
112 | GPIO34_FFUART_RXD, | ||
113 | GPIO35_FFUART_CTS, | ||
114 | GPIO37_FFUART_DSR, | ||
115 | GPIO39_FFUART_TXD, | ||
116 | GPIO40_FFUART_DTR, | ||
117 | GPIO41_FFUART_RTS, | ||
118 | |||
119 | /* BTUART */ | ||
120 | GPIO42_BTUART_RXD, | ||
121 | GPIO43_BTUART_TXD, | ||
122 | GPIO44_BTUART_CTS, | ||
123 | GPIO45_BTUART_RTS, | ||
124 | |||
125 | /* IrDA */ | ||
126 | GPIO46_STUART_RXD, | ||
127 | GPIO47_STUART_TXD, | ||
128 | |||
129 | /* Keybd */ | ||
130 | GPIO58_GPIO, | ||
131 | GPIO59_GPIO, | ||
132 | GPIO60_GPIO, | ||
133 | GPIO61_GPIO, | ||
134 | GPIO62_GPIO, | ||
135 | GPIO63_GPIO, | ||
136 | GPIO64_GPIO, | ||
137 | GPIO65_GPIO, | ||
138 | GPIO66_GPIO, | ||
139 | GPIO67_GPIO, | ||
140 | GPIO68_GPIO, | ||
141 | GPIO69_GPIO, | ||
142 | GPIO70_GPIO, | ||
143 | GPIO71_GPIO, | ||
144 | GPIO72_GPIO, | ||
145 | GPIO73_GPIO, | ||
146 | GPIO74_GPIO, | ||
147 | GPIO75_GPIO, | ||
148 | |||
149 | /* SPI */ | ||
150 | GPIO81_SSP2_CLK_OUT, | ||
151 | GPIO82_SSP2_FRM_OUT, | ||
152 | GPIO83_SSP2_TXD, | ||
153 | }; | ||
154 | |||
51 | /* | 155 | /* |
52 | * SCOOP Device | 156 | * SCOOP Device |
53 | */ | 157 | */ |
@@ -119,31 +223,9 @@ static struct scoop_pcmcia_dev tosa_pcmcia_scoop[] = { | |||
119 | }, | 223 | }, |
120 | }; | 224 | }; |
121 | 225 | ||
122 | static void tosa_pcmcia_init(void) | ||
123 | { | ||
124 | /* Setup default state of GPIO outputs | ||
125 | before we enable them as outputs. */ | ||
126 | GPSR(GPIO48_nPOE) = GPIO_bit(GPIO48_nPOE) | | ||
127 | GPIO_bit(GPIO49_nPWE) | GPIO_bit(GPIO50_nPIOR) | | ||
128 | GPIO_bit(GPIO51_nPIOW) | GPIO_bit(GPIO52_nPCE_1) | | ||
129 | GPIO_bit(GPIO53_nPCE_2); | ||
130 | |||
131 | pxa_gpio_mode(GPIO48_nPOE_MD); | ||
132 | pxa_gpio_mode(GPIO49_nPWE_MD); | ||
133 | pxa_gpio_mode(GPIO50_nPIOR_MD); | ||
134 | pxa_gpio_mode(GPIO51_nPIOW_MD); | ||
135 | pxa_gpio_mode(GPIO55_nPREG_MD); | ||
136 | pxa_gpio_mode(GPIO56_nPWAIT_MD); | ||
137 | pxa_gpio_mode(GPIO57_nIOIS16_MD); | ||
138 | pxa_gpio_mode(GPIO52_nPCE_1_MD); | ||
139 | pxa_gpio_mode(GPIO53_nPCE_2_MD); | ||
140 | pxa_gpio_mode(GPIO54_pSKTSEL_MD); | ||
141 | } | ||
142 | |||
143 | static struct scoop_pcmcia_config tosa_pcmcia_config = { | 226 | static struct scoop_pcmcia_config tosa_pcmcia_config = { |
144 | .devs = &tosa_pcmcia_scoop[0], | 227 | .devs = &tosa_pcmcia_scoop[0], |
145 | .num_devs = 2, | 228 | .num_devs = 2, |
146 | .pcmcia_init = tosa_pcmcia_init, | ||
147 | }; | 229 | }; |
148 | 230 | ||
149 | /* | 231 | /* |
@@ -176,11 +258,6 @@ static int tosa_mci_init(struct device *dev, irq_handler_t tosa_detect_int, void | |||
176 | { | 258 | { |
177 | int err; | 259 | int err; |
178 | 260 | ||
179 | /* setup GPIO for PXA25x MMC controller */ | ||
180 | pxa_gpio_mode(GPIO6_MMCCLK_MD); | ||
181 | pxa_gpio_mode(GPIO8_MMCCS0_MD); | ||
182 | pxa_gpio_mode(TOSA_GPIO_nSD_DETECT | GPIO_IN); | ||
183 | |||
184 | tosa_mci_platform_data.detect_delay = msecs_to_jiffies(250); | 261 | tosa_mci_platform_data.detect_delay = msecs_to_jiffies(250); |
185 | 262 | ||
186 | err = request_irq(TOSA_IRQ_GPIO_nSD_DETECT, tosa_detect_int, | 263 | err = request_irq(TOSA_IRQ_GPIO_nSD_DETECT, tosa_detect_int, |
@@ -228,10 +305,7 @@ static void tosa_irda_transceiver_mode(struct device *dev, int mode) | |||
228 | { | 305 | { |
229 | if (mode & IR_OFF) { | 306 | if (mode & IR_OFF) { |
230 | reset_scoop_gpio(&tosascoop_device.dev,TOSA_SCOOP_IR_POWERDWN); | 307 | reset_scoop_gpio(&tosascoop_device.dev,TOSA_SCOOP_IR_POWERDWN); |
231 | pxa_gpio_mode(GPIO47_STTXD|GPIO_DFLT_LOW); | ||
232 | pxa_gpio_mode(GPIO47_STTXD|GPIO_OUT); | ||
233 | } else { | 308 | } else { |
234 | pxa_gpio_mode(GPIO47_STTXD_MD); | ||
235 | set_scoop_gpio(&tosascoop_device.dev,TOSA_SCOOP_IR_POWERDWN); | 309 | set_scoop_gpio(&tosascoop_device.dev,TOSA_SCOOP_IR_POWERDWN); |
236 | } | 310 | } |
237 | } | 311 | } |
@@ -327,20 +401,13 @@ static void tosa_restart(char mode) | |||
327 | 401 | ||
328 | static void __init tosa_init(void) | 402 | static void __init tosa_init(void) |
329 | { | 403 | { |
404 | pxa2xx_mfp_config(ARRAY_AND_SIZE(tosa_pin_config)); | ||
405 | gpio_set_wake(MFP_PIN_GPIO1, 1); | ||
406 | /* We can't pass to gpio-keys since it will drop the Reset altfunc */ | ||
407 | |||
330 | pm_power_off = tosa_poweroff; | 408 | pm_power_off = tosa_poweroff; |
331 | arm_pm_restart = tosa_restart; | 409 | arm_pm_restart = tosa_restart; |
332 | 410 | ||
333 | pxa_gpio_mode(TOSA_GPIO_ON_RESET | GPIO_IN); | ||
334 | pxa_gpio_mode(TOSA_GPIO_TC6393_INT | GPIO_IN); | ||
335 | pxa_gpio_mode(TOSA_GPIO_USB_IN | GPIO_IN); | ||
336 | |||
337 | /* setup sleep mode values */ | ||
338 | PWER = 0x00000002; | ||
339 | PFER = 0x00000000; | ||
340 | PRER = 0x00000002; | ||
341 | PGSR0 = 0x00000000; | ||
342 | PGSR1 = 0x00FF0002; | ||
343 | PGSR2 = 0x00014000; | ||
344 | PCFR |= PCFR_OPDE; | 411 | PCFR |= PCFR_OPDE; |
345 | 412 | ||
346 | /* enable batt_fault */ | 413 | /* enable batt_fault */ |