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authorEric Miao <eric.miao@marvell.com>2008-07-29 02:26:00 -0400
committerEric Miao <eric.miao@marvell.com>2008-08-04 21:26:02 -0400
commit04fef228fb00dd79475a2313f4ba73b4fbfe2faa (patch)
treefee94286fb6b53562e1f9a3c2d6f7f20f8014346 /arch/arm/mach-pxa/pxa3xx.c
parentab277121426edca2ee0601fc6318c9467350771e (diff)
[ARM] pxa: introduce reset_status and clear_reset_status for driver's usage
Due to the problem of reset status bits being handled by different registers between pxa2xx and pxa3xx, introduce a global reset_status variable, initialized by SoC-specific code and later being used by other drivers. And also introduce clear_reset_status(), which is used to clear the corresponding status bits. Pass RESET_STATUS_ALL to clear all bits. Signed-off-by: Eric Miao <eric.miao@marvell.com>
Diffstat (limited to 'arch/arm/mach-pxa/pxa3xx.c')
-rw-r--r--arch/arm/mach-pxa/pxa3xx.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index f491025a0c82..3d36c790f5ce 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -24,6 +24,7 @@
24 24
25#include <asm/hardware.h> 25#include <asm/hardware.h>
26#include <asm/arch/pxa3xx-regs.h> 26#include <asm/arch/pxa3xx-regs.h>
27#include <asm/arch/reset.h>
27#include <asm/arch/ohci.h> 28#include <asm/arch/ohci.h>
28#include <asm/arch/pm.h> 29#include <asm/arch/pm.h>
29#include <asm/arch/dma.h> 30#include <asm/arch/dma.h>
@@ -109,6 +110,12 @@ unsigned int pxa3xx_get_memclk_frequency_10khz(void)
109 return (clk / 10000); 110 return (clk / 10000);
110} 111}
111 112
113void pxa3xx_clear_reset_status(unsigned int mask)
114{
115 /* RESET_STATUS_* has a 1:1 mapping with ARSR */
116 ARSR = mask;
117}
118
112/* 119/*
113 * Return the current AC97 clock frequency. 120 * Return the current AC97 clock frequency.
114 */ 121 */
@@ -532,6 +539,9 @@ static int __init pxa3xx_init(void)
532 int i, ret = 0; 539 int i, ret = 0;
533 540
534 if (cpu_is_pxa3xx()) { 541 if (cpu_is_pxa3xx()) {
542
543 reset_status = ARSR;
544
535 /* 545 /*
536 * clear RDH bit every time after reset 546 * clear RDH bit every time after reset
537 * 547 *